55 lines
1.6 KiB
Zig
55 lines
1.6 KiB
Zig
const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
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const checkCond = @import("../../cpu.zig").checkCond;
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const sext = @import("../../../util.zig").sext;
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pub fn fmt16(comptime cond: u4) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
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// B
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const offset = sext(u32, u8, opcode & 0xFF) << 1;
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const should_execute = switch (cond) {
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0xE, 0xF => cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond}),
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else => checkCond(cpu.cpsr, cond),
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};
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if (should_execute) {
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cpu.r[15] = (cpu.r[15] + 2) +% offset;
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}
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}
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}.inner;
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}
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pub fn fmt18() InstrFn {
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return struct {
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// B but conditional
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fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
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const offset = sext(u32, u11, opcode & 0x7FF) << 1;
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cpu.r[15] = (cpu.r[15] + 2) +% offset;
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}
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}.inner;
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}
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pub fn fmt19(comptime is_low: bool) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
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// BL
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const offset = opcode & 0x7FF;
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if (is_low) {
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// Instruction 2
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const old_pc = cpu.r[15];
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cpu.r[15] = cpu.r[14] +% (offset << 1);
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cpu.r[14] = old_pc | 1;
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} else {
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// Instruction 1
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cpu.r[14] = (cpu.r[15] + 2) +% (sext(u32, u11, offset) << 12);
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}
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}
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}.inner;
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}
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