32 lines
972 B
Zig
32 lines
972 B
Zig
const std = @import("std");
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").ArmInstrFn;
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const rotr = @import("../../util.zig").rotr;
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pub fn singleDataSwap(comptime B: bool) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
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const rn = opcode >> 16 & 0xF;
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const rd = opcode >> 12 & 0xF;
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const rm = opcode & 0xF;
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const address = cpu.r[rn];
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if (B) {
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// SWPB
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const value = bus.read(u8, address);
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bus.write(u8, address, @truncate(u8, cpu.r[rm]));
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cpu.r[rd] = value;
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} else {
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// SWP
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const value = rotr(u32, bus.read(u32, address), 8 * (address & 0x3));
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bus.write(u32, address, cpu.r[rm]);
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cpu.r[rd] = value;
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}
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}
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}.inner;
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}
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