61 lines
2.2 KiB
Zig
61 lines
2.2 KiB
Zig
const std = @import("std");
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
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const u32SignExtend = @import("../../util.zig").u32SignExtend;
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pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
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const ro = opcode >> 6 & 0x7;
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const rb = opcode >> 3 & 0x7;
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const rd = opcode & 0x7;
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const address = cpu.r[rb] + cpu.r[ro];
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if (T) {
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switch (op) {
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0b00 => {
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// STRH
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bus.write16(address & 0xFFFF_FFFE, @truncate(u16, cpu.r[rd]));
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},
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0b01 => {
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// LDRH
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const value = bus.read16(address & 0xFFFF_FFFE);
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cpu.r[rd] = std.math.rotr(u32, @as(u32, value), 8 * (address & 1));
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},
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0b10 => {
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// LDSB
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cpu.r[rd] = u32SignExtend(8, @as(u32, bus.read8(address)));
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},
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0b11 => {
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// LDSH
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cpu.r[rd] = u32SignExtend(16, @as(u32, bus.read16(address & 0xFFFF_FFFE)));
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},
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}
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} else {
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switch (op) {
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0b00 => {
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// STR
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bus.write32(address & 0xFFFF_FFFC, cpu.r[rd]);
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},
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0b01 => {
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// STRB
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bus.write8(address, @truncate(u8, cpu.r[rd]));
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},
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0b10 => {
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// LDR
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const value = bus.read32(address & 0xFFFF_FFFC);
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cpu.r[rd] = std.math.rotr(u32, value, 8 * (address & 0x3));
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},
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0b11 => {
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// LDRB
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cpu.r[rd] = bus.read8(address);
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},
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}
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}
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}
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}.inner;
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}
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