chore(emu): refactor code

Also took the chance to rework parts of the logic that determines
ZBA's save path

.github/workflows/main.yml

@@ -1,59 +0,0 @@
-name: Nightly
-
-on:
-  push:
-    paths:
-      - "**.zig"
-    branches:
-      - main
-  schedule:
-    - cron: '0 0 * * *'
-  workflow_dispatch:
-
-jobs:
-  build:
-    strategy:
-      matrix:
-        # os: [ubuntu-latest, windows-latest, macos-latest]
-        os: [ubuntu-latest, windows-latest]
-    runs-on: ${{matrix.os}}
-    steps:
-      - uses: goto-bus-stop/setup-zig@v2
-        with:
-          version: master
-      - name: prepare-linux
-        if: runner.os == 'Linux'
-        run: |
-            sudo apt-get update
-            sudo apt-get install libsdl2-dev
-      - name: prepare-windows
-        if: runner.os == 'Windows'
-        run: |
-            vcpkg integrate install
-            vcpkg install sdl2:x64-windows
-            git config --global core.autocrlf false
-      - name: prepare-macos
-        if: runner.os == 'macOS'
-        run: |
-            brew install sdl2
-      - uses: actions/checkout@v3
-        with:
-          submodules: recursive
-      - name: build 
-        run: zig build -Doptimize=ReleaseSafe -Dcpu=baseline
-      - name: upload
-        uses: actions/upload-artifact@v3
-        with:
-          name: zba-${{matrix.os}}
-          path: zig-out/bin
-  lint:
-    runs-on: ubuntu-latest
-    steps: 
-      - uses: actions/checkout@v3
-        with:
-          submodules: recursive
-      - uses: goto-bus-stop/setup-zig@v2
-        with:
-          version: master
-      - run: zig fmt src/**/*.zig
-  

.gitignore

@@ -1,7 +1,7 @@
 /.vscode
 /bin
-**/zig-cache
-**/zig-out
+/zig-cache
+/zig-out
 /docs
 **/*.log
 **/*.bin

.gitmodules

@@ -13,6 +13,3 @@
 [submodule "lib/zig-toml"]
 	path = lib/zig-toml
 	url = https://github.com/aeronavery/zig-toml
-[submodule "lib/zba-gdbstub"]
-	path = lib/zba-gdbstub
-	url = https://git.musuka.dev/paoda/zba-gdbstub

.vscode/extensions.json

@@ -0,0 +1,8 @@
+{
+    "recommendations": [
+        "augusterame.zls-vscode",
+        "usernamehw.errorlens",
+        "vadimcn.vscode-lldb",
+        "dan-c-underwood.arm"
+    ]
+}

README.md

@@ -1,110 +1,63 @@
 # ZBA (working title)
-
-A Game Boy Advance Emulator written in Zig ⚡!
-
-## Scope
-
-I'm hardly the first to write a Game Boy Advance Emulator nor will I be the last. This project isn't going to compete with the GOATs like [mGBA](https://github.com/mgba-emu) or [NanoBoyAdvance](https://github.com/nba-emu/NanoBoyAdvance). There aren't any interesting ideas either like in [DSHBA](https://github.com/DenSinH/DSHBA).
-
-This is a simple (read: incomplete) for-fun long-term project. I hope to get "mostly there", which to me means that I'm not missing any major hardware features and the set of possible improvements would be in memory timing or in UI/UX. With respect to that goal, here's what's outstanding:
-
-### TODO
-
-- [x] Affine Sprites
-- [ ] Windowing (see [this branch](https://git.musuka.dev/paoda/zba/src/branch/window))
-- [ ] Audio Resampler (Having issues with SDL2's)
-- [x] Immediate Mode GUI (see [this branch](https://git.musuka.dev/paoda/zba/src/branch/imgui))
-- [ ] Refactoring for easy-ish perf boosts
-
-## Usage
-
-As it currently exists, ZBA is run from the terminal. In your console of choice, type `./zba --help` to see what you can do.
-
-I typically find myself typing `./zba -b ./bin/bios.bin ./bin/test/suite.gba` to see how badly my "cool new feature" broke everything else.
-
-Need a BIOS? Why not try using the open-source [Cult-Of-GBA BIOS](https://github.com/Cult-of-GBA/BIOS) written by [fleroviux](https://github.com/fleroviux) and [DenSinH](https://github.com/DenSinH)?
-
-Finally it's worth noting that ZBA uses a TOML config file it'll store in your OS's data directory. See `example.toml` to learn about the defaults and what exactly you can mess around with.
+An in-progress Game Boy Advance Emulator written in Zig ⚡!
 
 ## Tests 
-
-GBA Tests | [jsmolka](https://github.com/jsmolka/)
---- | ---
-`arm.gba`,  `thumb.gba` | PASS
-`memory.gba`, `bios.gba` | PASS
-`flash64.gba`, `flash128.gba` | PASS
-`sram.gba` | PASS
-`none.gba` | PASS
-`hello.gba`, `shades.gba`, `stripes.gba` | PASS
-`nes.gba` | PASS
-
-GBARoms | [DenSinH](https://github.com/DenSinH/)
---- | ---
-`eeprom-test`, `flash-test` | PASS
-`midikey2freq` | PASS
-`swi-tests-random` | FAIL
-
-gba_tests | [destoer](https://github.com/destoer/)
---- | ---
-`cond_invalid.gba` | PASS
-`dma_priority.gba` | PASS
-`hello_world.gba` | PASS
-`if_ack.gba` | PASS
-`line_timing.gba` | FAIL
-`lyc_midline.gba` | FAIL
-`window_midframe.gba` | FAIL
-
-GBA Test Collection | [ladystarbreeze](https://github.com/ladystarbreeze)
---- | ---
-`retAddr.gba` | PASS
-`helloWorld.gba` | PASS
-`helloAudio.gba` | PASS
-
-FuzzARM | [DenSinH](https://github.com/DenSinH/)
---- | ---
-`main.gba` | PASS
-
-arm7wrestler GBA Fixed | [destoer](https://github.com/destoer)
---- | ---
-`armwrestler-gba-fixed.gba` | PASS
+- [ ] [jsmolka's GBA Test Collection](https://github.com/jsmolka/gba-tests)
+    - [x] `arm.gba` and `thumb.gba`
+    - [x] `flash64.gba`, `flash128.gba`, `none.gba`, and `sram.gba`
+    - [x] `hello.gba`, `shades.gba`, and `stripes.gba`
+    - [x] `memory.gba`
+    - [x] `bios.gba`
+    - [ ] `nes.gba`
+- [ ] [DenSinH's GBA ROMs](https://github.com/DenSinH/GBARoms)
+    - [x] `eeprom-test` and `flash-test`
+    - [x] `midikey2freq`
+    - [ ] `swi-tests-random`
+- [ ] [destoer's GBA Tests](https://github.com/destoer/gba_tests)
+    - [x] `cond_invalid.gba`
+    - [x] `dma_priority.gba`
+    - [x] `hello_world.gba`
+    - [x] `if_ack.gba`
+    - [ ] `line_timing.gba`
+    - [ ] `lyc_midline.gba`
+    - [ ] `window_midframe.gba`
+- [x] [ladystarbreeze's GBA Test Collection](https://github.com/ladystarbreeze/GBA-Test-Collection)
+    - [x] `retAddr.gba`
+    - [x] `helloWorld.gba`
+    - [x] `helloAudio.gba`
+- [x] [`armwrestler-gba-fixed.gba`](https://github.com/destoer/armwrestler-gba-fixed)
+- [x] [FuzzARM](https://github.com/DenSinH/FuzzARM)
 
 ## Resources
-
-- [GBATEK](https://problemkaputt.de/gbatek.htm)
-- [TONC](https://coranac.com/tonc/text/toc.htm)
-- [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
-- [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
+* [GBATEK](https://problemkaputt.de/gbatek.htm)
+* [TONC](https://coranac.com/tonc/text/toc.htm)
+* [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
+* [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
 
 ## Compiling
-
-Most recently built on Zig [v0.11.0-dev.1580+a5b34a61a](https://github.com/ziglang/zig/tree/a5b34a61a)
+Most recently built on Zig [0.10.0-dev.3900+ab4b26d8a](https://github.com/ziglang/zig/tree/ab4b26d8a)
 
 ### Dependencies
+* [SDL.zig](https://github.com/MasterQ32/SDL.zig)
+    * [SDL2](https://www.libsdl.org/download-2.0.php)
+* [zig-clap](https://github.com/Hejsil/zig-clap)
+* [known-folders](https://github.com/ziglibs/known-folders)
+* [`bitfields.zig`](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568197ad24780ec9adb421217530d4466/lib/util/bitfields.zig)
 
-Dependency | Source
---- | ---
-SDL.zig | <https://github.com/MasterQ32/SDL.zig>
-zig-clap | <https://github.com/Hejsil/zig-clap>
-known-folders | <https://github.com/ziglibs/known-folders>
-zig-toml | <https://github.com/aeronavery/zig-toml>
-zig-datetime | <https://github.com/frmdstryr/zig-datetime>
-`bitfields.zig` | [https://github.com/FlorenceOS/Florence](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568/lib/util/bitfields.zig)
-`gl.zig` | <https://github.com/MasterQ32/zig-opengl>
+`bitfields.zig` from [FlorenceOS](https://github.com/FlorenceOS) is included under `lib/util/bitfield.zig`.
 
-Use `git submodule update --init` from the project root to pull the git relevant git submodules
+Use `git submodule update --init` from the project root to pull the git submodules `SDL.zig`, `zig-clap`, and `known-folders`
 
 Be sure to provide SDL2 using: 
-
-- Linux: Your distro's package manager
-- macOS: ¯\\\_(ツ)_/¯ (try [this formula](https://formulae.brew.sh/formula/sdl2)?)
-- Windows: [`vcpkg`](https://github.com/Microsoft/vcpkg) (install `sdl2:x64-windows`)
+* Linux: Your distro's package manager
+* MacOS: ¯\\\_(ツ)_/¯
+* Windows: [`vcpkg`](https://github.com/Microsoft/vcpkg) (install `sdl2:x64-windows`)
 
 `SDL.zig` will provide a helpful compile error if the zig compiler is unable to find SDL2. 
 
-Once you've got all the dependencies, execute `zig build -Doptimize=ReleaseSafe`. The executable is located at `zig-out/bin/`.
+Once you've got all the dependencies, execute `zig build -Drelease-fast`. The executable is located at `zig-out/bin/`. 
 
 ## Controls
-
 Key | Button
 --- | ---
 <kbd>X</kbd> | A

build.zig

@@ -1,55 +1,42 @@
 const std = @import("std");
-const builtin = @import("builtin");
-
 const Sdk = @import("lib/SDL.zig/Sdk.zig");
-const Gdbstub = @import("lib/zba-gdbstub/build.zig");
 
 pub fn build(b: *std.build.Builder) void {
-    // Minimum Zig Version
-    const min_ver = std.SemanticVersion.parse("0.11.0-dev.1580+a5b34a61a") catch return; // https://github.com/ziglang/zig/commit/a5b34a61a
-    if (builtin.zig_version.order(min_ver).compare(.lt)) {
-        std.log.err("{s}", .{b.fmt("Zig v{} does not meet the minimum version requirement. (Zig v{})", .{ builtin.zig_version, min_ver })});
-        std.os.exit(1);
-    }
-
+    // Standard target options allows the person running `zig build` to choose
+    // what target to build for. Here we do not override the defaults, which
+    // means any target is allowed, and the default is native. Other options
+    // for restricting supported target set are available.
     const target = b.standardTargetOptions(.{});
-    const optimize = b.standardOptimizeOption(.{});
 
-    const exe = b.addExecutable(.{
-        .name = "zba",
-        .root_source_file = .{ .path = "src/main.zig" },
-        .target = target,
-        .optimize = optimize,
-    });
+    // Standard release options allow the person running `zig build` to select
+    // between Debug, ReleaseSafe, ReleaseFast, and ReleaseSmall.
+    const mode = b.standardReleaseOptions();
 
-    exe.setMainPkgPath("."); // Necessary so that src/main.zig can embed example.toml
+    const exe = b.addExecutable("zba", "src/main.zig");
+    exe.setTarget(target);
 
     // Known Folders (%APPDATA%, XDG, etc.)
-    exe.addAnonymousModule("known_folders", .{ .source_file = .{ .path = "lib/known-folders/known-folders.zig" } });
+    exe.addPackagePath("known_folders", "lib/known-folders/known-folders.zig");
 
     // DateTime Library
-    exe.addAnonymousModule("datetime", .{ .source_file = .{ .path = "lib/zig-datetime/src/main.zig" } });
+    exe.addPackagePath("datetime", "lib/zig-datetime/src/main.zig");
 
     // Bitfield type from FlorenceOS: https://github.com/FlorenceOS/
-    exe.addAnonymousModule("bitfield", .{ .source_file = .{ .path = "lib/util/bitfield.zig" } });
+    // exe.addPackage(.{ .name = "bitfield", .path = .{ .path = "lib/util/bitfield.zig" } });
+    exe.addPackagePath("bitfield", "lib/util/bitfield.zig");
 
     // Argument Parsing Library
-    exe.addAnonymousModule("clap", .{ .source_file = .{ .path = "lib/zig-clap/clap.zig" } });
+    exe.addPackagePath("clap", "lib/zig-clap/clap.zig");
 
     // TOML Library
-    exe.addAnonymousModule("toml", .{ .source_file = .{ .path = "lib/zig-toml/src/toml.zig" } });
-
-    // OpenGL 3.3 Bindings
-    exe.addAnonymousModule("gl", .{ .source_file = .{ .path = "lib/gl.zig" } });
-
-    // gdbstub
-    Gdbstub.link(exe);
+    exe.addPackagePath("toml", "lib/zig-toml/src/toml.zig");
 
     // Zig SDL Bindings: https://github.com/MasterQ32/SDL.zig
-    const sdk = Sdk.init(b, null);
+    const sdk = Sdk.init(b);
     sdk.link(exe, .dynamic);
-    exe.addModule("sdl2", sdk.getNativeModule());
+    exe.addPackage(sdk.getNativePackage("sdl2"));
 
+    exe.setBuildMode(mode);
     exe.install();
 
     const run_cmd = exe.run();
@@ -61,11 +48,9 @@ pub fn build(b: *std.build.Builder) void {
     const run_step = b.step("run", "Run the app");
     run_step.dependOn(&run_cmd.step);
 
-    const exe_tests = b.addTest(.{
-        .root_source_file = .{ .path = "src/main.zig" },
-        .target = target,
-        .optimize = optimize,
-    });
+    const exe_tests = b.addTest("src/main.zig");
+    exe_tests.setTarget(target);
+    exe_tests.setBuildMode(mode);
 
     const test_step = b.step("test", "Run unit tests");
     test_step.dependOn(&exe_tests.step);

example.toml

@@ -1,25 +0,0 @@
-[Host]
-# Using nearest-neighbour scaling, how many times the native resolution 
-# of the game bow should the screen be?
-win_scale = 3
-# Enable VSYNC on the UI thread
-vsync = true
-# Mute ZBA
-mute = false
-
-[Guest]
-# Sync Emulation to Audio 
-audio_sync = true
-# Sync Emulation to Video
-video_sync = true
-# Force RTC support
-force_rtc = false
-# Skip BIOS
-skip_bios = false
-
-[Debug]
-# Enable detailed CPU logs
-cpu_trace = false
-# When false and builtin.mode == .Debug, ZBA will panic
-# on unknown I/O reads
-unhandled_io = true

src/config.zig

@@ -3,7 +3,6 @@ const toml = @import("toml");
 
 const Allocator = std.mem.Allocator;
 
-const log = std.log.scoped(.Config);
 var state: Config = .{};
 
 const Config = struct {
@@ -19,8 +18,6 @@ const Config = struct {
         ///
         /// Note: This does not affect whether Emulation is synced to 59Hz
         vsync: bool = true,
-        /// Mute ZBA
-        mute: bool = false,
     };
 
     // Settings realted to the emulation itself
@@ -31,15 +28,13 @@ const Config = struct {
         video_sync: bool = true,
         /// Whether RTC I/O should always be enabled
         force_rtc: bool = false,
-        /// Skip BIOS
-        skip_bios: bool = false,
     };
 
     /// Settings related to debugging ZBA
     const Debug = struct {
         /// Enable CPU Trace logs
         cpu_trace: bool = false,
-        /// If false and ZBA is built in debug mode, ZBA will panic on unhandled I/O
+        /// If false and ZBA is build in debug mode, ZBA will panic on unhandled I/O
         unhandled_io: bool = true,
     };
 };
@@ -49,19 +44,14 @@ pub fn config() *const Config {
 }
 
 /// Reads a config file and then loads it into the global state
-pub fn load(allocator: Allocator, file_path: []const u8) !void {
-    var config_file = try std.fs.cwd().openFile(file_path, .{});
+pub fn load(allocator: Allocator, config_path: []const u8) !void {
+    var config_file = try std.fs.cwd().openFile(config_path, .{});
     defer config_file.close();
 
-    log.info("loaded from {s}", .{file_path});
-
     const contents = try config_file.readToEndAlloc(allocator, try config_file.getEndPos());
     defer allocator.free(contents);
 
-    var parser = try toml.parseFile(allocator, file_path);
-    defer parser.deinit();
-
-    const table = try parser.parse();
+    const table = try toml.parseContents(allocator, contents, null);
     defer table.deinit();
 
     // TODO: Report unknown config options
@@ -69,14 +59,12 @@ pub fn load(allocator: Allocator, file_path: []const u8) !void {
     if (table.keys.get("Host")) |host| {
         if (host.Table.keys.get("win_scale")) |scale| state.host.win_scale = scale.Integer;
         if (host.Table.keys.get("vsync")) |vsync| state.host.vsync = vsync.Boolean;
-        if (host.Table.keys.get("mute")) |mute| state.host.mute = mute.Boolean;
     }
 
     if (table.keys.get("Guest")) |guest| {
         if (guest.Table.keys.get("audio_sync")) |sync| state.guest.audio_sync = sync.Boolean;
         if (guest.Table.keys.get("video_sync")) |sync| state.guest.video_sync = sync.Boolean;
         if (guest.Table.keys.get("force_rtc")) |forced| state.guest.force_rtc = forced.Boolean;
-        if (guest.Table.keys.get("skip_bios")) |skip| state.guest.skip_bios = skip.Boolean;
     }
 
     if (table.keys.get("Debug")) |debug| {

src/core/Bus.zig

@@ -1,5 +1,6 @@
 const std = @import("std");
 
+const AudioDeviceId = @import("sdl2").SDL_AudioDeviceID;
 const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
 const Bios = @import("bus/Bios.zig");
 const Ewram = @import("bus/Ewram.zig");
@@ -33,11 +34,6 @@ pub const fetch_timings: [2][0x10]u8 = [_][0x10]u8{
     [_]u8{ 1, 1, 6, 1, 1, 2, 2, 1, 4, 4, 4, 4, 4, 4, 8, 8 }, // 32-bit
 };
 
-// Fastmem Related
-const page_size = 1 * 0x400; // 1KiB
-const address_space_size = 0x1000_0000;
-const table_len = address_space_size / page_size;
-
 const Self = @This();
 
 pak: GamePak,
@@ -50,19 +46,10 @@ iwram: Iwram,
 ewram: Ewram,
 io: Io,
 
-cpu: *Arm7tdmi,
+cpu: ?*Arm7tdmi,
 sched: *Scheduler,
 
-read_table: *const [table_len]?*const anyopaque,
-write_tables: [2]*const [table_len]?*anyopaque,
-allocator: Allocator,
-
 pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi, paths: FilePaths) !void {
-    const tables = try allocator.alloc(?*anyopaque, 3 * table_len); // Allocate all tables
-
-    const read_table = tables[0..table_len];
-    const write_tables = .{ tables[table_len .. 2 * table_len], tables[2 * table_len .. 3 * table_len] };
-
     self.* = .{
         .pak = try GamePak.init(allocator, cpu, paths.rom, paths.save),
         .bios = try Bios.init(allocator, paths.bios),
@@ -75,17 +62,7 @@ pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi
         .io = Io.init(),
         .cpu = cpu,
         .sched = sched,
-
-        .read_table = read_table,
-        .write_tables = write_tables,
-        .allocator = allocator,
     };
-
-    self.fillReadTable(read_table);
-
-    // Internal Display Memory behaves differently on 8-bit reads
-    self.fillWriteTable(u32, write_tables[0]);
-    self.fillWriteTable(u8, write_tables[1]);
 }
 
 pub fn deinit(self: *Self) void {
@@ -94,280 +71,34 @@ pub fn deinit(self: *Self) void {
     self.pak.deinit();
     self.bios.deinit();
     self.ppu.deinit();
-
-    // This is so I can deallocate the original `allocator.alloc`. I have to re-make the type
-    // since I'm not keeping it around, This is very jank and bad though
-    // FIXME: please figure out another way
-    self.allocator.free(@ptrCast([*]const ?*anyopaque, self.read_table[0..])[0 .. 3 * table_len]);
     self.* = undefined;
 }
 
-fn fillReadTable(self: *Self, table: *[table_len]?*const anyopaque) void {
-    const vramMirror = @import("ppu/Vram.zig").mirror;
-
-    for (table, 0..) |*ptr, i| {
-        const addr = @intCast(u32, page_size * i);
-
-        ptr.* = switch (addr) {
-            // General Internal Memory
-            0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
-            0x0200_0000...0x02FF_FFFF => &self.ewram.buf[addr & 0x3FFFF],
-            0x0300_0000...0x03FF_FFFF => &self.iwram.buf[addr & 0x7FFF],
-            0x0400_0000...0x0400_03FF => null, // I/O
-
-            // Internal Display Memory
-            0x0500_0000...0x05FF_FFFF => &self.ppu.palette.buf[addr & 0x3FF],
-            0x0600_0000...0x06FF_FFFF => &self.ppu.vram.buf[vramMirror(addr)],
-            0x0700_0000...0x07FF_FFFF => &self.ppu.oam.buf[addr & 0x3FF],
-
-            // External Memory (Game Pak)
-            0x0800_0000...0x0DFF_FFFF => self.fillReadTableExternal(addr),
-            0x0E00_0000...0x0FFF_FFFF => null, // SRAM
-            else => null,
-        };
-    }
-}
-
-fn fillWriteTable(self: *Self, comptime T: type, table: *[table_len]?*const anyopaque) void {
-    comptime std.debug.assert(T == u32 or T == u16 or T == u8);
-    const vramMirror = @import("ppu/Vram.zig").mirror;
-
-    for (table, 0..) |*ptr, i| {
-        const addr = @intCast(u32, page_size * i);
-
-        ptr.* = switch (addr) {
-            // General Internal Memory
-            0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
-            0x0200_0000...0x02FF_FFFF => &self.ewram.buf[addr & 0x3FFFF],
-            0x0300_0000...0x03FF_FFFF => &self.iwram.buf[addr & 0x7FFF],
-            0x0400_0000...0x0400_03FF => null, // I/O
-
-            // Internal Display Memory
-            0x0500_0000...0x05FF_FFFF => if (T != u8) &self.ppu.palette.buf[addr & 0x3FF] else null,
-            0x0600_0000...0x06FF_FFFF => if (T != u8) &self.ppu.vram.buf[vramMirror(addr)] else null,
-            0x0700_0000...0x07FF_FFFF => if (T != u8) &self.ppu.oam.buf[addr & 0x3FF] else null,
-
-            // External Memory (Game Pak)
-            0x0800_0000...0x0DFF_FFFF => null, // ROM
-            0x0E00_0000...0x0FFF_FFFF => null, // SRAM
-            else => null,
-        };
-    }
-}
-
-fn fillReadTableExternal(self: *Self, addr: u32) ?*anyopaque {
-    // see `GamePak.zig` for more information about what conditions need to be true
-    // so that a simple pointer dereference isn't possible
-
-    std.debug.assert(addr & @as(u32, page_size - 1) == 0); // addr is guaranteed to be page-aligned
-
-    const start_addr = addr;
-    const end_addr = start_addr + page_size;
-
-    {
-        const data = start_addr <= 0x0800_00C4 and 0x0800_00C4 < end_addr; // GPIO Data
-        const direction = start_addr <= 0x0800_00C6 and 0x0800_00C6 < end_addr; // GPIO Direction
-        const control = start_addr <= 0x0800_00C8 and 0x0800_00C8 < end_addr; // GPIO Control
-
-        const has_gpio = data or direction or control;
-        const gpio_kind = self.pak.gpio.device.kind;
-
-        // There is a GPIO Device, and the current page contains at least one memory-mapped GPIO register
-        if (gpio_kind != .None and has_gpio) return null;
-    }
-
-    if (self.pak.backup.kind == .Eeprom) {
-        if (self.pak.buf.len > 0x100_000) {
-            // We are using a "large" EEPROM which means that if the below check is true
-            // this page has an address that's reserved for the EEPROM and therefore must
-            // be handled in slowmem
-            if (addr & 0x1FF_FFFF > 0x1FF_FEFF) return null;
-        } else {
-            // We are using a "small" EEPROM which means that if the below check is true
-            // (that is, we're in the 0xD address page) then we must handle at least one
-            // address in this page in slowmem
-            if (@truncate(u4, addr >> 24) == 0xD) return null;
-        }
-    }
-
-    // Finally, the GamePak has some unique behaviour for reads past the end of the ROM,
-    // so those will be handled by slowmem as well
-    const masked_addr = addr & 0x1FF_FFFF;
-    if (masked_addr >= self.pak.buf.len) return null;
-
-    return &self.pak.buf[masked_addr];
-}
-
-fn readIo(self: *const Self, comptime T: type, address: u32) T {
-    return io.read(self, T, address) orelse self.openBus(T, address);
-}
-
-fn openBus(self: *const Self, comptime T: type, address: u32) T {
-    @setCold(true);
-    const r15 = self.cpu.r[15];
-
-    const word = blk: {
-        // If Arm, get the most recently fetched instruction (PC + 8)
-        //
-        // FIXME: This is most likely a faulty assumption.
-        // I think what *actually* happens is that the Bus has a latch for the most
-        // recently fetched piece of data, which is then returned during Open Bus (also DMA open bus?)
-        // I can "get away" with this because it's very statistically likely that the most recently latched value is
-        // the most recently fetched instruction by the pipeline
-        if (!self.cpu.cpsr.t.read()) break :blk self.cpu.pipe.stage[1].?;
-
-        const page = @truncate(u8, r15 >> 24);
-
-        // PC + 2 = stage[0]
-        // PC + 4 = stage[1]
-        // PC + 6 = Need a Debug Read for this?
-
-        switch (page) {
-            // EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
-            0x02, 0x05, 0x06, 0x08...0x0D => {
-                const halfword: u32 = @truncate(u16, self.cpu.pipe.stage[1].?);
-                break :blk halfword << 16 | halfword;
-            },
-
-            // BIOS or OAM (32-bit)
-            0x00, 0x07 => {
-                // Aligned: (PC + 6) | (PC + 4)
-                // Unaligned: (PC + 4) | (PC + 2)
-                const aligned = address & 3 == 0b00;
-
-                // TODO: What to do on PC + 6?
-                const high: u32 = if (aligned) self.dbgRead(u16, r15 + 4) else @truncate(u16, self.cpu.pipe.stage[1].?);
-                const low: u32 = @truncate(u16, self.cpu.pipe.stage[@boolToInt(aligned)].?);
-
-                break :blk high << 16 | low;
-            },
-
-            // IWRAM (16-bit but special)
-            0x03 => {
-                // Aligned: (PC + 2) | (PC + 4)
-                // Unaligned: (PC + 4) | (PC + 2)
-                const aligned = address & 3 == 0b00;
-
-                const high: u32 = @truncate(u16, self.cpu.pipe.stage[1 - @boolToInt(aligned)].?);
-                const low: u32 = @truncate(u16, self.cpu.pipe.stage[@boolToInt(aligned)].?);
-
-                break :blk high << 16 | low;
-            },
-            else => {
-                log.err("THUMB open bus read from 0x{X:0>2} page @0x{X:0>8}", .{ page, address });
-                @panic("invariant most-likely broken");
-            },
-        }
-    };
-
-    return @truncate(T, word);
-}
-
-pub fn read(self: *Self, comptime T: type, unaligned_address: u32) T {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // whether or not we do this in slowmem or fastmem, we should advance the scheduler
-    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
-
-    // We're doing some serious out-of-bounds open-bus reads
-    if (page >= table_len) return self.openBus(T, unaligned_address);
-
-    if (self.read_table[page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const Ptr = [*]const T;
-        const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        return ptr[forceAlign(T, offset) / @sizeOf(T)];
-    }
-
-    return self.slowRead(T, unaligned_address);
-}
-
-pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // We're doing some serious out-of-bounds open-bus reads
-    if (page >= table_len) return self.openBus(T, unaligned_address);
-
-    if (self.read_table[page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const Ptr = [*]const T;
-        const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        return ptr[forceAlign(T, offset) / @sizeOf(T)];
-    }
-
-    return self.dbgSlowRead(T, unaligned_address);
-}
-
-fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
-    @setCold(true);
-
-    const page = @truncate(u8, unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
+pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
+    const page = @truncate(u8, address >> 24);
+    const aligned_addr = forceAlign(T, address);
 
     return switch (page) {
         // General Internal Memory
         0x00 => blk: {
             if (address < Bios.size)
-                break :blk self.bios.read(T, self.cpu.r[15], unaligned_address);
+                break :blk self.bios.dbgRead(T, self.cpu.?.r[15], aligned_addr);
 
-            break :blk self.openBus(T, address);
+            break :blk self.readOpenBus(T, address);
         },
-        0x02 => unreachable, // completely handled by fastmeme
-        0x03 => unreachable, // completely handled by fastmeme
+        0x02 => self.ewram.read(T, aligned_addr),
+        0x03 => self.iwram.read(T, aligned_addr),
         0x04 => self.readIo(T, address),
 
         // Internal Display Memory
-        0x05 => unreachable, // completely handled by fastmeme
-        0x06 => unreachable, // completely handled by fastmeme
-        0x07 => unreachable, // completely handled by fastmeme
+        0x05 => self.ppu.palette.read(T, aligned_addr),
+        0x06 => self.ppu.vram.read(T, aligned_addr),
+        0x07 => self.ppu.oam.read(T, aligned_addr),
 
         // External Memory (Game Pak)
-        0x08...0x0D => self.pak.read(T, address),
-        0x0E...0x0F => self.readBackup(T, unaligned_address),
-        else => self.openBus(T, address),
-    };
-}
-
-fn dbgSlowRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const page = @truncate(u8, unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
-
-    return switch (page) {
-        // General Internal Memory
-        0x00 => blk: {
-            if (address < Bios.size)
-                break :blk self.bios.dbgRead(T, self.cpu.r[15], unaligned_address);
-
-            break :blk self.openBus(T, address);
-        },
-        0x02 => unreachable, // handled by fastmem
-        0x03 => unreachable, // handled by fastmem
-        0x04 => self.readIo(T, address),
-
-        // Internal Display Memory
-        0x05 => unreachable, // handled by fastmem
-        0x06 => unreachable, // handled by fastmem
-        0x07 => unreachable, // handled by fastmem
-
-        // External Memory (Game Pak)
-        0x08...0x0D => self.pak.dbgRead(T, address),
-        0x0E...0x0F => self.readBackup(T, unaligned_address),
-        else => self.openBus(T, address),
-    };
-}
-
-fn readBackup(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const value = self.pak.backup.read(unaligned_address);
+        0x08...0x0D => self.pak.dbgRead(T, aligned_addr),
+        0x0E...0x0F => blk: {
+            const value = self.pak.backup.read(address);
 
             const multiplier = switch (T) {
                 u32 => 0x01010101,
@@ -376,124 +107,135 @@ fn readBackup(self: *const Self, comptime T: type, unaligned_address: u32) T {
                 else => @compileError("Backup: Unsupported read width"),
             };
 
-    return @as(T, value) * multiplier;
-}
-
-pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // whether or not we do this in slowmem or fastmem, we should advance the scheduler
-    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
-
-    // We're doing some serious out-of-bounds open-bus writes, they do nothing though
-    if (page >= table_len) return;
-
-    if (self.write_tables[@boolToInt(T == u8)][page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const Ptr = [*]T;
-        const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
-    } else {
-        // we can return early if this is an 8-bit OAM write
-        if (T == u8 and @truncate(u8, unaligned_address >> 24) == 0x07) return;
-
-        self.slowWrite(T, unaligned_address, value);
-    }
-}
-
-/// Mostly Identical to `Bus.write`, slowmeme is handled by `Bus.dbgSlowWrite`
-pub fn dbgWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // We're doing some serious out-of-bounds open-bus writes, they do nothing though
-    if (page >= table_len) return;
-
-    if (self.write_tables[@boolToInt(T == u8)][page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const Ptr = [*]T;
-        const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
-    } else {
-        // we can return early if this is an 8-bit OAM write
-        if (T == u8 and @truncate(u8, unaligned_address >> 24) == 0x07) return;
-
-        self.dbgSlowWrite(T, unaligned_address, value);
-    }
-}
-
-fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    @setCold(true);
-
-    const page = @truncate(u8, unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
-
-    switch (page) {
-        // General Internal Memory
-        0x00 => self.bios.write(T, address, value),
-        0x02 => unreachable, // completely handled by fastmem
-        0x03 => unreachable, // completely handled by fastmem
-        0x04 => io.write(self, T, address, value),
-
-        // Internal Display Memory
-        0x05 => self.ppu.palette.write(T, address, value),
-        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, address, value),
-        0x07 => unreachable, // completely handled by fastmem
-
-        // External Memory (Game Pak)
-        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, address, value),
-        0x0E...0x0F => self.pak.backup.write(unaligned_address, @truncate(u8, rotr(T, value, 8 * rotateBy(T, unaligned_address)))),
-        else => {},
-    }
-}
-
-fn dbgSlowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    @setCold(true);
-
-    const page = @truncate(u8, unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
-
-    switch (page) {
-        // General Internal Memory
-        0x00 => self.bios.write(T, address, value),
-        0x02 => unreachable, // completely handled by fastmem
-        0x03 => unreachable, // completely handled by fastmem
-        0x04 => return, // FIXME: Let debug writes mess with I/O
-
-        // Internal Display Memory
-        0x05 => self.ppu.palette.write(T, address, value),
-        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, address, value),
-        0x07 => unreachable, // completely handled by fastmem
-
-        // External Memory (Game Pak)
-        0x08...0x0D => return, // FIXME: Debug Write to Backup/GPIO w/out messing with state
-        0x0E...0x0F => return, // FIXME: Debug Write to Backup w/out messing with state
-        else => {},
-    }
-}
-
-inline fn rotateBy(comptime T: type, address: u32) u32 {
-    return switch (T) {
-        u32 => address & 3,
-        u16 => address & 1,
-        u8 => 0,
-        else => @compileError("Unsupported write width"),
+            break :blk @as(T, value) * multiplier;
+        },
+        else => self.readOpenBus(T, address),
     };
 }
 
-pub inline fn forceAlign(comptime T: type, address: u32) u32 {
+fn readIo(self: *const Self, comptime T: type, unaligned_address: u32) T {
+    const maybe_value = io.read(self, T, forceAlign(T, unaligned_address));
+    return if (maybe_value) |value| value else self.readOpenBus(T, unaligned_address);
+}
+
+fn readOpenBus(self: *const Self, comptime T: type, address: u32) T {
+    const r15 = self.cpu.?.r[15];
+
+    const word = blk: {
+        // If u32 Open Bus, read recently fetched opcode (PC + 8)
+        if (!self.cpu.?.cpsr.t.read()) break :blk self.dbgRead(u32, r15 + 4);
+        const page = @truncate(u8, r15 >> 24);
+
+        switch (page) {
+            // EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
+            0x02, 0x05, 0x06, 0x08...0x0D => {
+                // (PC + 4)
+                const halfword = self.dbgRead(u16, r15 + 2);
+
+                break :blk @as(u32, halfword) << 16 | halfword;
+            },
+            // BIOS or OAM (32-bit)
+            0x00, 0x07 => {
+                // Aligned: (PC + 6) | (PC + 4)
+                // Unaligned: (PC + 4) | (PC + 2)
+                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
+
+                break :blk @as(u32, self.dbgRead(u16, r15 + 2 + offset)) << 16 | self.dbgRead(u16, r15 + offset);
+            },
+            // IWRAM (16-bit but special)
+            0x03 => {
+                // Aligned: (PC + 2) | (PC + 4)
+                // Unaligned: (PC + 4) | (PC + 2)
+                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
+
+                break :blk @as(u32, self.dbgRead(u16, r15 + 2 - offset)) << 16 | self.dbgRead(u16, r15 + offset);
+            },
+            else => unreachable,
+        }
+    };
+
+    return @truncate(T, rotr(u32, word, 8 * (address & 3)));
+}
+
+pub fn read(self: *Self, comptime T: type, address: u32) T {
+    const page = @truncate(u8, address >> 24);
+    const aligned_addr = forceAlign(T, address);
+
+    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+
+    return switch (page) {
+        // General Internal Memory
+        0x00 => blk: {
+            if (address < Bios.size)
+                break :blk self.bios.read(T, self.cpu.?.r[15], aligned_addr);
+
+            break :blk self.readOpenBus(T, address);
+        },
+        0x02 => self.ewram.read(T, aligned_addr),
+        0x03 => self.iwram.read(T, aligned_addr),
+        0x04 => self.readIo(T, address),
+
+        // Internal Display Memory
+        0x05 => self.ppu.palette.read(T, aligned_addr),
+        0x06 => self.ppu.vram.read(T, aligned_addr),
+        0x07 => self.ppu.oam.read(T, aligned_addr),
+
+        // External Memory (Game Pak)
+        0x08...0x0D => self.pak.read(T, aligned_addr),
+        0x0E...0x0F => blk: {
+            const value = self.pak.backup.read(address);
+
+            const multiplier = switch (T) {
+                u32 => 0x01010101,
+                u16 => 0x0101,
+                u8 => 1,
+                else => @compileError("Backup: Unsupported read width"),
+            };
+
+            break :blk @as(T, value) * multiplier;
+        },
+        else => self.readOpenBus(T, address),
+    };
+}
+
+pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
+    const page = @truncate(u8, address >> 24);
+    const aligned_addr = forceAlign(T, address);
+
+    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+
+    switch (page) {
+        // General Internal Memory
+        0x00 => self.bios.write(T, aligned_addr, value),
+        0x02 => self.ewram.write(T, aligned_addr, value),
+        0x03 => self.iwram.write(T, aligned_addr, value),
+        0x04 => io.write(self, T, aligned_addr, value),
+
+        // Internal Display Memory
+        0x05 => self.ppu.palette.write(T, aligned_addr, value),
+        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, aligned_addr, value),
+        0x07 => self.ppu.oam.write(T, aligned_addr, value),
+
+        // External Memory (Game Pak)
+        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, aligned_addr, value),
+        0x0E...0x0F => {
+            const rotate_by = switch (T) {
+                u32 => address & 3,
+                u16 => address & 1,
+                u8 => 0,
+                else => @compileError("Backup: Unsupported write width"),
+            };
+
+            self.pak.backup.write(address, @truncate(u8, rotr(T, value, 8 * rotate_by)));
+        },
+        else => {},
+    }
+}
+
+fn forceAlign(comptime T: type, address: u32) u32 {
     return switch (T) {
-        u32 => address & ~@as(u32, 3),
-        u16 => address & ~@as(u32, 1),
+        u32 => address & 0xFFFF_FFFC,
+        u16 => address & 0xFFFF_FFFE,
         u8 => address,
         else => @compileError("Bus: Invalid read/write type"),
     };

src/core/apu/Noise.zig

@@ -1,145 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Tick = @import("../apu.zig").Apu.Tick;
-const Envelope = @import("device/Envelope.zig");
-const Length = @import("device/Length.zig");
-const Lfsr = @import("signal/Lfsr.zig");
-
-const Self = @This();
-
-/// Write-only
-/// NR41
-len: u6,
-/// NR42
-envelope: io.Envelope,
-/// NR43
-poly: io.PolyCounter,
-/// NR44
-cnt: io.NoiseControl,
-
-/// Length Functionarlity
-len_dev: Length,
-
-/// Envelope Functionality
-env_dev: Envelope,
-
-// Linear Feedback Shift Register
-lfsr: Lfsr,
-
-enabled: bool,
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .len = 0,
-        .envelope = .{ .raw = 0 },
-        .poly = .{ .raw = 0 },
-        .cnt = .{ .raw = 0 },
-        .enabled = false,
-
-        .len_dev = Length.create(),
-        .env_dev = Envelope.create(),
-        .lfsr = Lfsr.create(sched),
-
-        .sample = 0,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.len = 0; // NR41
-    self.envelope.raw = 0; // NR42
-    self.poly.raw = 0; // NR43
-    self.cnt.raw = 0; // NR44
-
-    self.len_dev.reset();
-    self.env_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.cnt.length_enable.read(), &self.enabled),
-        .Envelope => self.env_dev.tick(self.envelope),
-        .Sweep => @compileError("Channel 4 does not implement Sweep"),
-    }
-}
-
-/// NR41, NR42
-pub fn sound4CntL(self: *const Self) u16 {
-    return @as(u16, self.envelope.raw) << 8;
-}
-
-/// NR41, NR42
-pub fn setSound4CntL(self: *Self, value: u16) void {
-    self.setNr41(@truncate(u8, value));
-    self.setNr42(@truncate(u8, value >> 8));
-}
-
-/// NR41
-pub fn setNr41(self: *Self, len: u8) void {
-    self.len = @truncate(u6, len);
-    self.len_dev.timer = @as(u7, 64) - @truncate(u6, len);
-}
-
-/// NR42
-pub fn setNr42(self: *Self, value: u8) void {
-    self.envelope.raw = value;
-    if (!self.isDacEnabled()) self.enabled = false;
-}
-
-/// NR43, NR44
-pub fn sound4CntH(self: *const Self) u16 {
-    return @as(u16, self.poly.raw & 0x40) << 8 | self.cnt.raw;
-}
-
-/// NR43, NR44
-pub fn setSound4CntH(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.poly.raw = @truncate(u8, value);
-    self.setNr44(fs, @truncate(u8, value >> 8));
-}
-
-/// NR44
-pub fn setNr44(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.NoiseControl = .{ .raw = byte };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 63 else 64;
-        }
-
-        // Update The Frequency Timer
-        self.lfsr.reload(self.poly);
-        self.lfsr.shift = 0x7FFF;
-
-        // Update Envelope and Volume
-        self.env_dev.timer = self.envelope.period.read();
-        if (fs.isEnvelopeNext() and self.env_dev.timer != 0b111) self.env_dev.timer += 1;
-
-        self.env_dev.vol = self.envelope.init_vol.read();
-
-        self.enabled = self.isDacEnabled();
-    }
-
-    util.audio.length.ch4.update(self, fs, new);
-    self.cnt = new;
-}
-
-pub fn onNoiseEvent(self: *Self, late: u64) void {
-    self.lfsr.onLfsrTimerExpire(self.poly, late);
-
-    self.sample = 0;
-    if (!self.isDacEnabled()) return;
-    self.sample = if (self.enabled) self.lfsr.sample() * @as(i8, self.env_dev.vol) else 0;
-}
-
-fn isDacEnabled(self: *const Self) bool {
-    return self.envelope.raw & 0xF8 != 0x00;
-}

src/core/apu/Tone.zig

@@ -1,141 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Tick = @import("../apu.zig").Apu.Tick;
-const Length = @import("device/Length.zig");
-const Envelope = @import("device/Envelope.zig");
-const Square = @import("signal/Square.zig");
-
-const Self = @This();
-
-/// NR21
-duty: io.Duty,
-/// NR22
-envelope: io.Envelope,
-/// NR23, NR24
-freq: io.Frequency,
-
-/// Length Functionarlity
-len_dev: Length,
-/// Envelope Functionality
-env_dev: Envelope,
-/// FrequencyTimer Functionality
-square: Square,
-
-enabled: bool,
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .duty = .{ .raw = 0 },
-        .envelope = .{ .raw = 0 },
-        .freq = .{ .raw = 0 },
-        .enabled = false,
-
-        .square = Square.init(sched),
-        .len_dev = Length.create(),
-        .env_dev = Envelope.create(),
-
-        .sample = 0,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.duty.raw = 0; // NR21
-    self.envelope.raw = 0; // NR22
-    self.freq.raw = 0; // NR32, NR24
-
-    self.len_dev.reset();
-    self.env_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.freq.length_enable.read(), &self.enabled),
-        .Envelope => self.env_dev.tick(self.envelope),
-        .Sweep => @compileError("Channel 2 does not implement Sweep"),
-    }
-}
-
-pub fn onToneEvent(self: *Self, late: u64) void {
-    self.square.onSquareTimerExpire(Self, self.freq, late);
-
-    self.sample = 0;
-    if (!self.isDacEnabled()) return;
-    self.sample = if (self.enabled) self.square.sample(self.duty) * @as(i8, self.env_dev.vol) else 0;
-}
-
-/// NR21, NR22
-pub fn sound2CntL(self: *const Self) u16 {
-    return @as(u16, self.envelope.raw) << 8 | (self.duty.raw & 0xC0);
-}
-
-/// NR21, NR22
-pub fn setSound2CntL(self: *Self, value: u16) void {
-    self.setNr21(@truncate(u8, value));
-    self.setNr22(@truncate(u8, value >> 8));
-}
-
-/// NR21
-pub fn setNr21(self: *Self, value: u8) void {
-    self.duty.raw = value;
-    self.len_dev.timer = @as(u7, 64) - @truncate(u6, value);
-}
-
-/// NR22
-pub fn setNr22(self: *Self, value: u8) void {
-    self.envelope.raw = value;
-    if (!self.isDacEnabled()) self.enabled = false;
-}
-
-/// NR23, NR24
-pub fn sound2CntH(self: *const Self) u16 {
-    return self.freq.raw & 0x4000;
-}
-
-/// NR23, NR24
-pub fn setSound2CntH(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.setNr23(@truncate(u8, value));
-    self.setNr24(fs, @truncate(u8, value >> 8));
-}
-
-/// NR23
-pub fn setNr23(self: *Self, byte: u8) void {
-    self.freq.raw = (self.freq.raw & 0xFF00) | byte;
-}
-
-/// NR24
-pub fn setNr24(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.Frequency = .{ .raw = (@as(u16, byte) << 8) | (self.freq.raw & 0xFF) };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 63 else 64;
-        }
-
-        self.square.reload(Self, self.freq.frequency.read());
-
-        // Reload Envelope period and timer
-        self.env_dev.timer = self.envelope.period.read();
-        if (fs.isEnvelopeNext() and self.env_dev.timer != 0b111) self.env_dev.timer += 1;
-
-        self.env_dev.vol = self.envelope.init_vol.read();
-
-        self.enabled = self.isDacEnabled();
-    }
-
-    util.audio.length.update(Self, self, fs, new);
-    self.freq = new;
-}
-
-fn isDacEnabled(self: *const Self) bool {
-    return self.envelope.raw & 0xF8 != 0;
-}

src/core/apu/ToneSweep.zig

@@ -1,185 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Length = @import("device/Length.zig");
-const Envelope = @import("device/Envelope.zig");
-const Sweep = @import("device/Sweep.zig");
-const Square = @import("signal/Square.zig");
-
-const Tick = @import("../apu.zig").Apu.Tick;
-
-const Self = @This();
-
-/// NR10
-sweep: io.Sweep,
-/// NR11
-duty: io.Duty,
-/// NR12
-envelope: io.Envelope,
-/// NR13, NR14
-freq: io.Frequency,
-
-/// Length Functionality
-len_dev: Length,
-/// Sweep Functionality
-sweep_dev: Sweep,
-/// Envelope Functionality
-env_dev: Envelope,
-/// Frequency Timer Functionality
-square: Square,
-enabled: bool,
-
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .sweep = .{ .raw = 0 },
-        .duty = .{ .raw = 0 },
-        .envelope = .{ .raw = 0 },
-        .freq = .{ .raw = 0 },
-        .sample = 0,
-        .enabled = false,
-
-        .square = Square.init(sched),
-        .len_dev = Length.create(),
-        .sweep_dev = Sweep.create(),
-        .env_dev = Envelope.create(),
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.sweep.raw = 0; // NR10
-    self.duty.raw = 0; // NR11
-    self.envelope.raw = 0; // NR12
-    self.freq.raw = 0; // NR13, NR14
-
-    self.len_dev.reset();
-    self.sweep_dev.reset();
-    self.env_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.freq.length_enable.read(), &self.enabled),
-        .Envelope => self.env_dev.tick(self.envelope),
-        .Sweep => self.sweep_dev.tick(self),
-    }
-}
-
-pub fn onToneSweepEvent(self: *Self, late: u64) void {
-    self.square.onSquareTimerExpire(Self, self.freq, late);
-
-    self.sample = 0;
-    if (!self.isDacEnabled()) return;
-    self.sample = if (self.enabled) self.square.sample(self.duty) * @as(i8, self.env_dev.vol) else 0;
-}
-
-/// NR10, NR11, NR12
-pub fn setSound1Cnt(self: *Self, value: u32) void {
-    self.setSound1CntL(@truncate(u8, value));
-    self.setSound1CntH(@truncate(u16, value >> 16));
-}
-
-/// NR10
-pub fn sound1CntL(self: *const Self) u8 {
-    return self.sweep.raw & 0x7F;
-}
-
-/// NR10
-pub fn setSound1CntL(self: *Self, value: u8) void {
-    const new = io.Sweep{ .raw = value };
-
-    if (!new.direction.read()) {
-        // If at least one (1) sweep calculation has been made with
-        // the negate bit set (since last trigger), disable the channel
-
-        if (self.sweep_dev.calc_performed) self.enabled = false;
-    }
-
-    self.sweep.raw = value;
-}
-
-/// NR11, NR12
-pub fn sound1CntH(self: *const Self) u16 {
-    return @as(u16, self.envelope.raw) << 8 | (self.duty.raw & 0xC0);
-}
-
-/// NR11, NR12
-pub fn setSound1CntH(self: *Self, value: u16) void {
-    self.setNr11(@truncate(u8, value));
-    self.setNr12(@truncate(u8, value >> 8));
-}
-
-/// NR11
-pub fn setNr11(self: *Self, value: u8) void {
-    self.duty.raw = value;
-    self.len_dev.timer = @as(u7, 64) - @truncate(u6, value);
-}
-
-/// NR12
-pub fn setNr12(self: *Self, value: u8) void {
-    self.envelope.raw = value;
-    if (!self.isDacEnabled()) self.enabled = false;
-}
-
-/// NR13, NR14
-pub fn sound1CntX(self: *const Self) u16 {
-    return self.freq.raw & 0x4000;
-}
-
-/// NR13, NR14
-pub fn setSound1CntX(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.setNr13(@truncate(u8, value));
-    self.setNr14(fs, @truncate(u8, value >> 8));
-}
-
-/// NR13
-pub fn setNr13(self: *Self, byte: u8) void {
-    self.freq.raw = (self.freq.raw & 0xFF00) | byte;
-}
-
-/// NR14
-pub fn setNr14(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.Frequency = .{ .raw = (@as(u16, byte) << 8) | (self.freq.raw & 0xFF) };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 63 else 64;
-        }
-
-        self.square.reload(Self, self.freq.frequency.read());
-
-        // Reload Envelope period and timer
-        self.env_dev.timer = self.envelope.period.read();
-        if (fs.isEnvelopeNext() and self.env_dev.timer != 0b111) self.env_dev.timer += 1;
-
-        self.env_dev.vol = self.envelope.init_vol.read();
-
-        // Sweep Trigger Behaviour
-        const sw_period = self.sweep.period.read();
-        const sw_shift = self.sweep.shift.read();
-
-        self.sweep_dev.calc_performed = false;
-        self.sweep_dev.shadow = self.freq.frequency.read();
-        self.sweep_dev.timer = if (sw_period == 0) 8 else sw_period;
-        self.sweep_dev.enabled = sw_period != 0 or sw_shift != 0;
-        if (sw_shift != 0) _ = self.sweep_dev.calculate(self.sweep, &self.enabled);
-
-        self.enabled = self.isDacEnabled();
-    }
-
-    util.audio.length.update(Self, self, fs, new);
-    self.freq = new;
-}
-
-fn isDacEnabled(self: *const Self) bool {
-    return self.envelope.raw & 0xF8 != 0;
-}

src/core/apu/Wave.zig

@@ -1,145 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Tick = @import("../apu.zig").Apu.Tick;
-
-const Length = @import("device/Length.zig");
-const Wave = @import("signal/Wave.zig");
-
-const Self = @This();
-
-/// Write-only
-/// NR30
-select: io.WaveSelect,
-/// NR31
-length: u8,
-/// NR32
-vol: io.WaveVolume,
-/// NR33, NR34
-freq: io.Frequency,
-
-/// Length Functionarlity
-len_dev: Length,
-wave_dev: Wave,
-
-enabled: bool,
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .select = .{ .raw = 0 },
-        .vol = .{ .raw = 0 },
-        .freq = .{ .raw = 0 },
-        .length = 0,
-
-        .len_dev = Length.create(),
-        .wave_dev = Wave.init(sched),
-        .enabled = false,
-        .sample = 0,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.select.raw = 0; // NR30
-    self.length = 0; // NR31
-    self.vol.raw = 0; // NR32
-    self.freq.raw = 0; // NR33, NR34
-
-    self.len_dev.reset();
-    self.wave_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.freq.length_enable.read(), &self.enabled),
-        .Envelope => @compileError("Channel 3 does not implement Envelope"),
-        .Sweep => @compileError("Channel 3 does not implement Sweep"),
-    }
-}
-
-/// NR30, NR31, NR32
-pub fn setSound3Cnt(self: *Self, value: u32) void {
-    self.setSound3CntL(@truncate(u8, value));
-    self.setSound3CntH(@truncate(u16, value >> 16));
-}
-
-/// NR30
-pub fn setSound3CntL(self: *Self, value: u8) void {
-    self.select.raw = value;
-    if (!self.select.enabled.read()) self.enabled = false;
-}
-
-/// NR30
-pub fn sound3CntL(self: *const Self) u8 {
-    return self.select.raw & 0xE0;
-}
-
-/// NR31, NR32
-pub fn sound3CntH(self: *const Self) u16 {
-    return @as(u16, self.length & 0xE0) << 8;
-}
-
-/// NR31, NR32
-pub fn setSound3CntH(self: *Self, value: u16) void {
-    self.setNr31(@truncate(u8, value));
-    self.vol.raw = (@truncate(u8, value >> 8));
-}
-
-/// NR31
-pub fn setNr31(self: *Self, len: u8) void {
-    self.length = len;
-    self.len_dev.timer = 256 - @as(u9, len);
-}
-
-/// NR33, NR34
-pub fn setSound3CntX(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.setNr33(@truncate(u8, value));
-    self.setNr34(fs, @truncate(u8, value >> 8));
-}
-
-/// NR33, NR34
-pub fn sound3CntX(self: *const Self) u16 {
-    return self.freq.raw & 0x4000;
-}
-
-/// NR33
-pub fn setNr33(self: *Self, byte: u8) void {
-    self.freq.raw = (self.freq.raw & 0xFF00) | byte;
-}
-
-/// NR34
-pub fn setNr34(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.Frequency = .{ .raw = (@as(u16, byte) << 8) | (self.freq.raw & 0xFF) };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 255 else 256;
-        }
-
-        // Update The Frequency Timer
-        self.wave_dev.reload(self.freq.frequency.read());
-        self.wave_dev.offset = 0;
-
-        self.enabled = self.select.enabled.read();
-    }
-
-    util.audio.length.update(Self, self, fs, new);
-    self.freq = new;
-}
-
-pub fn onWaveEvent(self: *Self, late: u64) void {
-    self.wave_dev.onWaveTimerExpire(self.freq, self.select, late);
-
-    self.sample = 0;
-    if (!self.select.enabled.read()) return;
-    // Convert unsigned 4-bit wave sample to signed 8-bit sample
-    self.sample = (2 * @as(i8, self.wave_dev.sample(self.select)) - 15) >> self.wave_dev.shift(self.vol);
-}

src/core/apu/device/Envelope.zig

@@ -1,33 +0,0 @@
-const io = @import("../../bus/io.zig");
-
-const Self = @This();
-
-/// Period Timer
-timer: u3,
-/// Current Volume
-vol: u4,
-
-pub fn create() Self {
-    return .{ .timer = 0, .vol = 0 };
-}
-
-pub fn reset(self: *Self) void {
-    self.timer = 0;
-    self.vol = 0;
-}
-
-pub fn tick(self: *Self, nrx2: io.Envelope) void {
-    if (nrx2.period.read() != 0) {
-        if (self.timer != 0) self.timer -= 1;
-
-        if (self.timer == 0) {
-            self.timer = nrx2.period.read();
-
-            if (nrx2.direction.read()) {
-                if (self.vol < 0xF) self.vol += 1;
-            } else {
-                if (self.vol > 0x0) self.vol -= 1;
-            }
-        }
-    }
-}

src/core/apu/device/Length.zig

@@ -1,22 +0,0 @@
-const Self = @This();
-
-timer: u9,
-
-pub fn create() Self {
-    return .{ .timer = 0 };
-}
-
-pub fn reset(self: *Self) void {
-    self.timer = 0;
-}
-
-pub fn tick(self: *Self, enabled: bool, ch_enable: *bool) void {
-    if (enabled) {
-        if (self.timer == 0) return;
-        self.timer -= 1;
-
-        // By returning early if timer == 0, this is only
-        // true if timer == 0 because of the decrement we just did
-        if (self.timer == 0) ch_enable.* = false;
-    }
-}

src/core/apu/device/Sweep.zig

@@ -1,61 +0,0 @@
-const io = @import("../../bus/io.zig");
-const ToneSweep = @import("../ToneSweep.zig");
-
-const Self = @This();
-
-timer: u8,
-enabled: bool,
-shadow: u11,
-
-calc_performed: bool,
-
-pub fn create() Self {
-    return .{
-        .timer = 0,
-        .enabled = false,
-        .shadow = 0,
-        .calc_performed = false,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.timer = 0;
-    self.enabled = false;
-    self.shadow = 0;
-    self.calc_performed = false;
-}
-
-pub fn tick(self: *Self, ch1: *ToneSweep) void {
-    if (self.timer != 0) self.timer -= 1;
-
-    if (self.timer == 0) {
-        const period = ch1.sweep.period.read();
-        self.timer = if (period == 0) 8 else period;
-
-        if (self.enabled and period != 0) {
-            const new_freq = self.calculate(ch1.sweep, &ch1.enabled);
-
-            if (new_freq <= 0x7FF and ch1.sweep.shift.read() != 0) {
-                ch1.freq.frequency.write(@truncate(u11, new_freq));
-                self.shadow = @truncate(u11, new_freq);
-
-                _ = self.calculate(ch1.sweep, &ch1.enabled);
-            }
-        }
-    }
-}
-
-/// Calculates the Sweep Frequency
-pub fn calculate(self: *Self, sweep: io.Sweep, ch_enable: *bool) u12 {
-    const shadow = @as(u12, self.shadow);
-    const shadow_shifted = shadow >> sweep.shift.read();
-    const decrease = sweep.direction.read();
-
-    const freq = if (decrease) blk: {
-        self.calc_performed = true;
-        break :blk shadow - shadow_shifted;
-    } else shadow + shadow_shifted;
-    if (freq > 0x7FF) ch_enable.* = false;
-
-    return freq;
-}

src/core/apu/signal/Lfsr.zig

@@ -1,62 +0,0 @@
-//! Linear Feedback Shift Register
-const io = @import("../../bus/io.zig");
-
-const Scheduler = @import("../../scheduler.zig").Scheduler;
-
-const Self = @This();
-pub const interval: u64 = (1 << 24) / (1 << 22);
-
-shift: u15,
-timer: u16,
-
-sched: *Scheduler,
-
-pub fn create(sched: *Scheduler) Self {
-    return .{
-        .shift = 0,
-        .timer = 0,
-        .sched = sched,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.shift = 0;
-    self.timer = 0;
-}
-
-pub fn sample(self: *const Self) i8 {
-    return if ((~self.shift & 1) == 1) 1 else -1;
-}
-
-/// Reload LFSR Timer
-pub fn reload(self: *Self, poly: io.PolyCounter) void {
-    self.sched.removeScheduledEvent(.{ .ApuChannel = 3 });
-
-    const div = Self.divisor(poly.div_ratio.read());
-    const timer = div << poly.shift.read();
-    self.sched.push(.{ .ApuChannel = 3 }, @as(u64, timer) * interval);
-}
-
-/// Scheduler Event Handler for LFSR Timer Expire
-/// FIXME: This gets called a lot, slowing down the scheduler
-pub fn onLfsrTimerExpire(self: *Self, poly: io.PolyCounter, late: u64) void {
-    // Obscure: "Using a noise channel clock shift of 14 or 15
-    // results in the LFSR receiving no clocks."
-    if (poly.shift.read() >= 14) return;
-
-    const div = Self.divisor(poly.div_ratio.read());
-    const timer = div << poly.shift.read();
-
-    const tmp = (self.shift & 1) ^ ((self.shift & 2) >> 1);
-    self.shift = (self.shift >> 1) | (tmp << 14);
-
-    if (poly.width.read())
-        self.shift = (self.shift & ~@as(u15, 0x40)) | tmp << 6;
-
-    self.sched.push(.{ .ApuChannel = 3 }, @as(u64, timer) * interval -| late);
-}
-
-fn divisor(code: u3) u16 {
-    if (code == 0) return 8;
-    return @as(u16, code) << 4;
-}

src/core/apu/signal/Square.zig

@@ -1,62 +0,0 @@
-const std = @import("std");
-const io = @import("../../bus/io.zig");
-
-const Scheduler = @import("../../scheduler.zig").Scheduler;
-const ToneSweep = @import("../ToneSweep.zig");
-const Tone = @import("../Tone.zig");
-
-const Self = @This();
-pub const interval: u64 = (1 << 24) / (1 << 22);
-
-pos: u3,
-sched: *Scheduler,
-timer: u16,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .timer = 0,
-        .pos = 0,
-        .sched = sched,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.timer = 0;
-    self.pos = 0;
-}
-
-/// Scheduler Event Handler for Square Synth Timer Expire
-pub fn onSquareTimerExpire(self: *Self, comptime T: type, nrx34: io.Frequency, late: u64) void {
-    comptime std.debug.assert(T == ToneSweep or T == Tone);
-    self.pos +%= 1;
-
-    self.timer = (@as(u16, 2048) - nrx34.frequency.read()) * 4;
-    self.sched.push(.{ .ApuChannel = if (T == ToneSweep) 0 else 1 }, @as(u64, self.timer) * interval -| late);
-}
-
-/// Reload Square Wave Timer
-pub fn reload(self: *Self, comptime T: type, value: u11) void {
-    comptime std.debug.assert(T == ToneSweep or T == Tone);
-    const channel = if (T == ToneSweep) 0 else 1;
-
-    self.sched.removeScheduledEvent(.{ .ApuChannel = channel });
-
-    const tmp = (@as(u16, 2048) - value) * 4; // What Freq Timer should be assuming no weird behaviour
-    self.timer = (tmp & ~@as(u16, 0x3)) | self.timer & 0x3; // Keep the last two bits from the old timer;
-
-    self.sched.push(.{ .ApuChannel = channel }, @as(u64, self.timer) * interval);
-}
-
-pub fn sample(self: *const Self, nrx1: io.Duty) i8 {
-    const pattern = nrx1.pattern.read();
-
-    const i = self.pos ^ 7; // index of 0 should get highest bit
-    const result = switch (pattern) {
-        0b00 => @as(u8, 0b00000001) >> i, // 12.5%
-        0b01 => @as(u8, 0b00000011) >> i, // 25%
-        0b10 => @as(u8, 0b00001111) >> i, // 50%
-        0b11 => @as(u8, 0b11111100) >> i, // 75%
-    };
-
-    return if (result & 1 == 1) 1 else -1;
-}

src/core/apu/signal/Wave.zig

@@ -1,84 +0,0 @@
-const std = @import("std");
-const io = @import("../../bus/io.zig");
-
-const Scheduler = @import("../../scheduler.zig").Scheduler;
-
-const buf_len = 0x20;
-pub const interval: u64 = (1 << 24) / (1 << 22);
-const Self = @This();
-
-buf: [buf_len]u8,
-timer: u16,
-offset: u12,
-
-sched: *Scheduler,
-
-pub fn read(self: *const Self, comptime T: type, nr30: io.WaveSelect, addr: u32) T {
-    // TODO: Handle reads when Channel 3 is disabled
-    const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Read from the Opposite Bank in Use
-
-    const i = base + addr - 0x0400_0090;
-    return std.mem.readIntSliceLittle(T, self.buf[i..][0..@sizeOf(T)]);
-}
-
-pub fn write(self: *Self, comptime T: type, nr30: io.WaveSelect, addr: u32, value: T) void {
-    // TODO: Handle writes when Channel 3 is disabled
-    const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Write to the Opposite Bank in Use
-
-    const i = base + addr - 0x0400_0090;
-    std.mem.writeIntSliceLittle(T, self.buf[i..][0..@sizeOf(T)], value);
-}
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .buf = [_]u8{0x00} ** buf_len,
-        .timer = 0,
-        .offset = 0,
-        .sched = sched,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.timer = 0;
-    self.offset = 0;
-
-    // sample buffer isn't reset because it's outside of the range of what NR52{7}'s effects
-}
-
-/// Reload internal Wave Timer
-pub fn reload(self: *Self, value: u11) void {
-    self.sched.removeScheduledEvent(.{ .ApuChannel = 2 });
-
-    self.timer = (@as(u16, 2048) - value) * 2;
-    self.sched.push(.{ .ApuChannel = 2 }, @as(u64, self.timer) * interval);
-}
-
-/// Scheduler Event Handler
-pub fn onWaveTimerExpire(self: *Self, nrx34: io.Frequency, nr30: io.WaveSelect, late: u64) void {
-    if (nr30.dimension.read()) {
-        self.offset = (self.offset + 1) % 0x40; // 0x20 bytes (both banks), which contain 2 samples each
-    } else {
-        self.offset = (self.offset + 1) % 0x20; // 0x10 bytes, which contain 2 samples each
-    }
-
-    self.timer = (@as(u16, 2048) - nrx34.frequency.read()) * 2;
-    self.sched.push(.{ .ApuChannel = 2 }, @as(u64, self.timer) * interval -| late);
-}
-
-/// Generate Sample from Wave Synth
-pub fn sample(self: *const Self, nr30: io.WaveSelect) u4 {
-    const base = if (nr30.bank.read()) @as(u32, 0x10) else 0;
-
-    const value = self.buf[base + self.offset / 2];
-    return if (self.offset & 1 == 0) @truncate(u4, value >> 4) else @truncate(u4, value);
-}
-
-/// TODO: Write comment
-pub fn shift(_: *const Self, nr32: io.WaveVolume) u2 {
-    return switch (nr32.kind.read()) {
-        0b00 => 3, // Mute / Zero
-        0b01 => 0, // 100% Volume
-        0b10 => 1, // 50% Volume
-        0b11 => 2, // 25% Volume
-    };
-}

src/core/bus/Bios.zig

@@ -3,9 +3,6 @@ const std = @import("std");
 const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.Bios);
 
-const rotr = @import("../../util.zig").rotr;
-const forceAlign = @import("../Bus.zig").forceAlign;
-
 /// Size of the BIOS in bytes
 pub const size = 0x4000;
 const Self = @This();
@@ -13,71 +10,55 @@ const Self = @This();
 buf: ?[]u8,
 allocator: Allocator,
 
-addr_latch: u32 = 0,
-
-// https://github.com/ITotalJustice/notorious_beeg/issues/106
-pub fn read(self: *Self, comptime T: type, r15: u32, address: u32) T {
-    if (r15 < Self.size) {
-        const addr = forceAlign(T, address);
-
-        self.addr_latch = addr;
-        return self._read(T, addr);
-    }
-
-    log.warn("Open Bus! Read from 0x{X:0>8}, but PC was 0x{X:0>8}", .{ address, r15 });
-    const value = self._read(u32, self.addr_latch);
-
-    return @truncate(T, rotr(u32, value, 8 * rotateBy(T, address)));
-}
-
-fn rotateBy(comptime T: type, address: u32) u32 {
-    return switch (T) {
-        u8 => address & 3,
-        u16 => address & 2,
-        u32 => 0,
-        else => @compileError("bios: unsupported read width"),
-    };
-}
-
-pub fn dbgRead(self: *const Self, comptime T: type, r15: u32, address: u32) T {
-    if (r15 < Self.size) return self._read(T, forceAlign(T, address));
-
-    const value = self._read(u32, self.addr_latch);
-    return @truncate(T, rotr(u32, value, 8 * rotateBy(T, address)));
-}
-
-/// Read without the GBA safety checks
-fn _read(self: *const Self, comptime T: type, addr: u32) T {
-    const buf = self.buf orelse std.debug.panic("[BIOS] ZBA tried to read {} from 0x{X:0>8} but not BIOS was present", .{ T, addr });
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, buf[addr..][0..@sizeOf(T)]),
-        else => @compileError("BIOS: Unsupported read width"),
-    };
-}
-
-pub fn write(_: *Self, comptime T: type, addr: u32, value: T) void {
-    @setCold(true);
-    log.debug("Tried to write {} 0x{X:} to 0x{X:0>8} ", .{ T, value, addr });
-}
+addr_latch: u32,
 
 pub fn init(allocator: Allocator, maybe_path: ?[]const u8) !Self {
-    if (maybe_path == null) return .{ .buf = null, .allocator = allocator };
-    const path = maybe_path.?;
-
-    const buf = try allocator.alloc(u8, Self.size);
-    errdefer allocator.free(buf);
-
+    const buf: ?[]u8 = if (maybe_path) |path| blk: {
         const file = try std.fs.cwd().openFile(path, .{});
         defer file.close();
 
-    const file_len = try file.readAll(buf);
-    if (file_len != Self.size) log.err("Expected BIOS to be {}B, was {}B", .{ Self.size, file_len });
+        break :blk try file.readToEndAlloc(allocator, try file.getEndPos());
+    } else null;
 
-    return Self{ .buf = buf, .allocator = allocator };
+    return Self{
+        .buf = buf,
+        .allocator = allocator,
+        .addr_latch = 0,
+    };
 }
 
 pub fn deinit(self: *Self) void {
     if (self.buf) |buf| self.allocator.free(buf);
     self.* = undefined;
 }
+
+pub fn read(self: *Self, comptime T: type, r15: u32, addr: u32) T {
+    if (r15 < Self.size) {
+        self.addr_latch = addr;
+        return self.uncheckedRead(T, addr);
+    }
+
+    log.debug("Rejected read since r15=0x{X:0>8}", .{r15});
+    return @truncate(T, self.uncheckedRead(T, self.addr_latch + 8));
+}
+
+pub fn dbgRead(self: *const Self, comptime T: type, r15: u32, addr: u32) T {
+    if (r15 < Self.size) return self.uncheckedRead(T, addr);
+    return @truncate(T, self.uncheckedRead(T, self.addr_latch + 8));
+}
+
+fn uncheckedRead(self: *const Self, comptime T: type, addr: u32) T {
+    if (self.buf) |buf| {
+        return switch (T) {
+            u32, u16, u8 => std.mem.readIntSliceLittle(T, buf[addr..][0..@sizeOf(T)]),
+            else => @compileError("BIOS: Unsupported read width"),
+        };
+    }
+
+    std.debug.panic("[BIOS] ZBA tried to read {} from 0x{X:0>8} but not BIOS was present", .{ T, addr });
+}
+
+pub fn write(_: *Self, comptime T: type, addr: u32, value: T) void {
+    @setCold(true);
+    log.debug("Tried to write {} 0x{X:} to 0x{X:0>8} ", .{ T, value, addr });
+}

src/core/bus/Ewram.zig

@@ -7,6 +7,21 @@ const Self = @This();
 buf: []u8,
 allocator: Allocator,
 
+pub fn init(allocator: Allocator) !Self {
+    const buf = try allocator.alloc(u8, ewram_size);
+    std.mem.set(u8, buf, 0);
+
+    return Self{
+        .buf = buf,
+        .allocator = allocator,
+    };
+}
+
+pub fn deinit(self: *Self) void {
+    self.allocator.free(self.buf);
+    self.* = undefined;
+}
+
 pub fn read(self: *const Self, comptime T: type, address: usize) T {
     const addr = address & 0x3FFFF;
 
@@ -24,18 +39,3 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
         else => @compileError("EWRAM: Unsupported write width"),
     };
 }
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, ewram_size);
-    std.mem.set(u8, buf, 0);
-
-    return Self{
-        .buf = buf,
-        .allocator = allocator,
-    };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}

src/core/bus/GamePak.zig

@@ -1,6 +1,10 @@
 const std = @import("std");
 const config = @import("../../config.zig");
 
+const Bit = @import("bitfield").Bit;
+const Bitfield = @import("bitfield").Bitfield;
+const DateTime = @import("datetime").datetime.Datetime;
+
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
 const Backup = @import("backup.zig").Backup;
 const Gpio = @import("gpio.zig").Gpio;
@@ -16,11 +20,78 @@ allocator: Allocator,
 backup: Backup,
 gpio: *Gpio,
 
+pub fn init(allocator: Allocator, cpu: *Arm7tdmi, rom_path: []const u8, save_path: ?[]const u8) !Self {
+    const file = try std.fs.cwd().openFile(rom_path, .{});
+    defer file.close();
+
+    const file_buf = try file.readToEndAlloc(allocator, try file.getEndPos());
+    const title = file_buf[0xA0..0xAC].*;
+    const kind = Backup.guessKind(file_buf);
+    const device = if (config.config().guest.force_rtc) .Rtc else guessDevice(file_buf);
+
+    logHeader(file_buf, &title);
+
+    return .{
+        .buf = file_buf,
+        .allocator = allocator,
+        .title = title,
+        .backup = try Backup.init(allocator, kind, title, save_path),
+        .gpio = try Gpio.init(allocator, cpu, device),
+    };
+}
+
+/// Searches the ROM to see if it can determine whether the ROM it's searching uses
+/// any GPIO device, like a RTC for example.
+fn guessDevice(buf: []const u8) Gpio.Device.Kind {
+    // Try to Guess if ROM uses RTC
+    const needle = "RTC_V"; // I was told SIIRTC_V, though Pokemen Firered (USA) is a false negative
+
+    var i: usize = 0;
+    while ((i + needle.len) < buf.len) : (i += 1) {
+        if (std.mem.eql(u8, needle, buf[i..(i + needle.len)])) return .Rtc;
+    }
+
+    // TODO: Detect other GPIO devices
+
+    return .None;
+}
+
+fn logHeader(buf: []const u8, title: *const [12]u8) void {
+    const code = buf[0xAC..0xB0];
+    const maker = buf[0xB0..0xB2];
+    const version = buf[0xBC];
+
+    log.info("Title: {s}", .{title});
+    if (version != 0) log.info("Version: {}", .{version});
+    log.info("Game Code: {s}", .{code});
+    if (lookupMaker(maker)) |c| log.info("Maker: {s}", .{c}) else log.info("Maker Code: {s}", .{maker});
+}
+
+fn lookupMaker(slice: *const [2]u8) ?[]const u8 {
+    const id = @as(u16, slice[1]) << 8 | @as(u16, slice[0]);
+    return switch (id) {
+        0x3130 => "Nintendo",
+        else => null,
+    };
+}
+
+inline fn isLarge(self: *const Self) bool {
+    return self.buf.len > 0x100_0000;
+}
+
+pub fn deinit(self: *Self) void {
+    self.backup.deinit();
+    self.gpio.deinit(self.allocator);
+    self.allocator.destroy(self.gpio);
+    self.allocator.free(self.buf);
+    self.* = undefined;
+}
+
 pub fn read(self: *Self, comptime T: type, address: u32) T {
     const addr = address & 0x1FF_FFFF;
 
     if (self.backup.kind == .Eeprom) {
-        if (self.buf.len > 0x100_0000) { // Large
+        if (self.isLarge()) {
             // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
             // * Backup type is EEPROM
             // * Large ROM (Size is greater than 16MB)
@@ -72,19 +143,11 @@ pub fn read(self: *Self, comptime T: type, address: u32) T {
     };
 }
 
-inline fn get(self: *const Self, i: u32) u8 {
-    @setRuntimeSafety(false);
-    if (i < self.buf.len) return self.buf[i];
-
-    const lhs = i >> 1 & 0xFFFF;
-    return @truncate(u8, lhs >> 8 * @truncate(u5, i & 1));
-}
-
 pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
     const addr = address & 0x1FF_FFFF;
 
     if (self.backup.kind == .Eeprom) {
-        if (self.buf.len > 0x100_0000) { // Large
+        if (self.isLarge()) {
             // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
             // * Backup type is EEPROM
             // * Large ROM (Size is greater than 16MB)
@@ -99,34 +162,6 @@ pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
         }
     }
 
-    if (self.gpio.cnt == 1) {
-        // GPIO Can be read from
-        // We assume that this will only be true when a ROM actually does want something from GPIO
-
-        switch (T) {
-            u32 => switch (address) {
-                // FIXME: Do I even need to implement these?
-                0x0800_00C4 => std.debug.panic("Handle 32-bit GPIO Data/Direction Reads", .{}),
-                0x0800_00C6 => std.debug.panic("Handle 32-bit GPIO Direction/Control Reads", .{}),
-                0x0800_00C8 => std.debug.panic("Handle 32-bit GPIO Control Reads", .{}),
-                else => {},
-            },
-            u16 => switch (address) {
-                0x0800_00C4 => return self.gpio.read(.Data),
-                0x0800_00C6 => return self.gpio.read(.Direction),
-                0x0800_00C8 => return self.gpio.read(.Control),
-                else => {},
-            },
-            u8 => switch (address) {
-                0x0800_00C4 => return self.gpio.read(.Data),
-                0x0800_00C6 => return self.gpio.read(.Direction),
-                0x0800_00C8 => return self.gpio.read(.Control),
-                else => {},
-            },
-            else => @compileError("GamePak[GPIO]: Unsupported read width"),
-        }
-    }
-
     return switch (T) {
         u32 => (@as(T, self.get(addr + 3)) << 24) | (@as(T, self.get(addr + 2)) << 16) | (@as(T, self.get(addr + 1)) << 8) | (@as(T, self.get(addr))),
         u16 => (@as(T, self.get(addr + 1)) << 8) | @as(T, self.get(addr)),
@@ -141,7 +176,7 @@ pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value
     if (self.backup.kind == .Eeprom) {
         const bit = @truncate(u1, value);
 
-        if (self.buf.len > 0x100_0000) { // Large
+        if (self.isLarge()) {
             // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
             // * Backup type is EEPROM
             // * Large ROM (Size is greater than 16MB)
@@ -179,60 +214,12 @@ pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value
     }
 }
 
-pub fn init(allocator: Allocator, cpu: *Arm7tdmi, rom_path: []const u8, save_path: ?[]const u8) !Self {
-    const file = try std.fs.cwd().openFile(rom_path, .{});
-    defer file.close();
+fn get(self: *const Self, i: u32) u8 {
+    @setRuntimeSafety(false);
+    if (i < self.buf.len) return self.buf[i];
 
-    const file_buf = try file.readToEndAlloc(allocator, try file.getEndPos());
-    const title = file_buf[0xA0..0xAC].*;
-    const kind = Backup.guess(file_buf);
-    const device = if (config.config().guest.force_rtc) .Rtc else guessDevice(file_buf);
-
-    logHeader(file_buf, &title);
-
-    return .{
-        .buf = file_buf,
-        .allocator = allocator,
-        .title = title,
-        .backup = try Backup.init(allocator, kind, title, save_path),
-        .gpio = try Gpio.init(allocator, cpu, device),
-    };
-}
-
-pub fn deinit(self: *Self) void {
-    self.backup.deinit();
-    self.gpio.deinit(self.allocator);
-    self.allocator.destroy(self.gpio);
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-/// Searches the ROM to see if it can determine whether the ROM it's searching uses
-/// any GPIO device, like a RTC for example.
-fn guessDevice(buf: []const u8) Gpio.Device.Kind {
-    // Try to Guess if ROM uses RTC
-    const needle = "RTC_V"; // I was told SIIRTC_V, though Pokemen Firered (USA) is a false negative
-
-    // TODO: Use new for loop syntax?
-    var i: usize = 0;
-    while ((i + needle.len) < buf.len) : (i += 1) {
-        if (std.mem.eql(u8, needle, buf[i..(i + needle.len)])) return .Rtc;
-    }
-
-    // TODO: Detect other GPIO devices
-
-    return .None;
-}
-
-fn logHeader(buf: []const u8, title: *const [12]u8) void {
-    const code = buf[0xAC..0xB0];
-    const maker = buf[0xB0..0xB2];
-    const version = buf[0xBC];
-
-    log.info("Title: {s}", .{title});
-    if (version != 0) log.info("Version: {}", .{version});
-    log.info("Game Code: {s}", .{code});
-    log.info("Maker Code: {s}", .{maker});
+    const lhs = i >> 1 & 0xFFFF;
+    return @truncate(u8, lhs >> 8 * @truncate(u5, i & 1));
 }
 
 test "OOB Access" {

src/core/bus/Iwram.zig

@@ -7,6 +7,21 @@ const Self = @This();
 buf: []u8,
 allocator: Allocator,
 
+pub fn init(allocator: Allocator) !Self {
+    const buf = try allocator.alloc(u8, iwram_size);
+    std.mem.set(u8, buf, 0);
+
+    return Self{
+        .buf = buf,
+        .allocator = allocator,
+    };
+}
+
+pub fn deinit(self: *Self) void {
+    self.allocator.free(self.buf);
+    self.* = undefined;
+}
+
 pub fn read(self: *const Self, comptime T: type, address: usize) T {
     const addr = address & 0x7FFF;
 
@@ -24,18 +39,3 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
         else => @compileError("IWRAM: Unsupported write width"),
     };
 }
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, iwram_size);
-    std.mem.set(u8, buf, 0);
-
-    return Self{
-        .buf = buf,
-        .allocator = allocator,
-    };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}

src/core/bus/backup.zig

@@ -2,12 +2,9 @@ const std = @import("std");
 const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.Backup);
 
-const Eeprom = @import("backup/eeprom.zig").Eeprom;
-const Flash = @import("backup/Flash.zig");
-
 const escape = @import("../../util.zig").escape;
+const span = @import("../../util.zig").span;
 
-const Needle = struct { str: []const u8, kind: Backup.Kind };
 const backup_kinds = [6]Needle{
     .{ .str = "EEPROM_V", .kind = .Eeprom },
     .{ .str = "SRAM_V", .kind = .Sram },
@@ -17,8 +14,6 @@ const backup_kinds = [6]Needle{
     .{ .str = "FLASH1M_V", .kind = .Flash1M },
 };
 
-const SaveError = error{Unsupported};
-
 pub const Backup = struct {
     const Self = @This();
 
@@ -40,6 +35,122 @@ pub const Backup = struct {
         None,
     };
 
+    pub fn init(allocator: Allocator, kind: Kind, title: [12]u8, path: ?[]const u8) !Self {
+        log.info("Kind: {}", .{kind});
+
+        const buf_size: usize = switch (kind) {
+            .Sram => 0x8000, // 32K
+            .Flash => 0x10000, // 64K
+            .Flash1M => 0x20000, // 128K
+            .None, .Eeprom => 0, // EEPROM is handled upon first Read Request to it
+        };
+
+        const buf = try allocator.alloc(u8, buf_size);
+        std.mem.set(u8, buf, 0xFF);
+
+        var backup = Self{
+            .buf = buf,
+            .allocator = allocator,
+            .kind = kind,
+            .title = title,
+            .save_path = path,
+            .flash = Flash.init(),
+            .eeprom = Eeprom.init(allocator),
+        };
+
+        if (backup.save_path) |p| backup.loadSaveFromDisk(allocator, p) catch |e| log.err("Failed to load save: {}", .{e});
+        return backup;
+    }
+
+    pub fn guessKind(rom: []const u8) Kind {
+        for (backup_kinds) |needle| {
+            const needle_len = needle.str.len;
+
+            var i: usize = 0;
+            while ((i + needle_len) < rom.len) : (i += 1) {
+                if (std.mem.eql(u8, needle.str, rom[i..][0..needle_len])) return needle.kind;
+            }
+        }
+
+        return .None;
+    }
+
+    pub fn deinit(self: *Self) void {
+        if (self.save_path) |path| self.writeSaveToDisk(self.allocator, path) catch |e| log.err("Failed to write save: {}", .{e});
+        self.allocator.free(self.buf);
+        self.* = undefined;
+    }
+
+    fn loadSaveFromDisk(self: *Self, allocator: Allocator, path: []const u8) !void {
+        const file_path = try self.getSaveFilePath(allocator, path);
+        defer allocator.free(file_path);
+
+        // FIXME: Don't rely on this lol
+        if (std.mem.eql(u8, file_path[file_path.len - 12 .. file_path.len], "untitled.sav")) {
+            return log.err("ROM header lacks title, no save loaded", .{});
+        }
+
+        const file: std.fs.File = try std.fs.openFileAbsolute(file_path, .{});
+        const file_buf = try file.readToEndAlloc(allocator, try file.getEndPos());
+        defer allocator.free(file_buf);
+
+        switch (self.kind) {
+            .Sram, .Flash, .Flash1M => {
+                if (self.buf.len == file_buf.len) {
+                    std.mem.copy(u8, self.buf, file_buf);
+                    return log.info("Loaded Save from {s}", .{file_path});
+                }
+
+                log.err("{s} is {} bytes, but we expected {} bytes", .{ file_path, file_buf.len, self.buf.len });
+            },
+            .Eeprom => {
+                if (file_buf.len == 0x200 or file_buf.len == 0x2000) {
+                    self.eeprom.kind = if (file_buf.len == 0x200) .Small else .Large;
+
+                    self.buf = try allocator.alloc(u8, file_buf.len);
+                    std.mem.copy(u8, self.buf, file_buf);
+                    return log.info("Loaded Save from {s}", .{file_path});
+                }
+
+                log.err("EEPROM can either be 0x200 bytes or 0x2000 byes, but {s} was {X:} bytes", .{
+                    file_path,
+                    file_buf.len,
+                });
+            },
+            .None => return SaveError.UnsupportedBackupKind,
+        }
+    }
+
+    fn getSaveFilePath(self: *const Self, allocator: Allocator, path: []const u8) ![]const u8 {
+        const filename = try self.getSaveFilename(allocator);
+        defer allocator.free(filename);
+
+        return try std.fs.path.join(allocator, &[_][]const u8{ path, filename });
+    }
+
+    fn getSaveFilename(self: *const Self, allocator: Allocator) ![]const u8 {
+        const title_str = span(&escape(self.title));
+        const name = if (title_str.len != 0) title_str else "untitled";
+
+        return try std.mem.concat(allocator, u8, &[_][]const u8{ name, ".sav" });
+    }
+
+    fn writeSaveToDisk(self: Self, allocator: Allocator, path: []const u8) !void {
+        const file_path = try self.getSaveFilePath(allocator, path);
+        defer allocator.free(file_path);
+
+        switch (self.kind) {
+            .Sram, .Flash, .Flash1M, .Eeprom => {
+                const file = try std.fs.createFileAbsolute(file_path, .{});
+                defer file.close();
+
+                try file.writeAll(self.buf);
+                log.info("Wrote Save to {s}", .{file_path});
+            },
+            else => return SaveError.UnsupportedBackupKind,
+        }
+    }
+
     pub fn read(self: *const Self, address: usize) u8 {
         const addr = address & 0xFFFF;
 
@@ -73,7 +184,7 @@ pub const Backup = struct {
         switch (self.kind) {
             .Flash, .Flash1M => {
                 if (self.flash.prep_write) return self.flash.write(self.buf, addr, byte);
-                if (self.flash.shouldEraseSector(addr, byte)) return self.flash.erase(self.buf, addr);
+                if (self.flash.shouldEraseSector(addr, byte)) return self.flash.eraseSector(self.buf, addr);
 
                 switch (addr) {
                     0x0000 => if (self.kind == .Flash1M and self.flash.set_bank) {
@@ -98,122 +209,358 @@ pub const Backup = struct {
             .None, .Eeprom => {},
         }
     }
-
-    pub fn init(allocator: Allocator, kind: Kind, title: [12]u8, path: ?[]const u8) !Self {
-        log.info("Kind: {}", .{kind});
-
-        const buf_size: usize = switch (kind) {
-            .Sram => 0x8000, // 32K
-            .Flash => 0x10000, // 64K
-            .Flash1M => 0x20000, // 128K
-            .None, .Eeprom => 0, // EEPROM is handled upon first Read Request to it
 };
 
-        const buf = try allocator.alloc(u8, buf_size);
-        std.mem.set(u8, buf, 0xFF);
+const Needle = struct {
+    const Self = @This();
 
-        var backup = Self{
-            .buf = buf,
-            .allocator = allocator,
+    str: []const u8,
+    kind: Backup.Kind,
+
+    fn init(str: []const u8, kind: Backup.Kind) Self {
+        return .{
+            .str = str,
             .kind = kind,
-            .title = title,
-            .save_path = path,
-            .flash = Flash.create(),
-            .eeprom = Eeprom.create(allocator),
+        };
+    }
 };
 
-        if (backup.save_path) |p| backup.readSave(allocator, p) catch |e| log.err("Failed to load save: {}", .{e});
-        return backup;
+const SaveError = error{
+    UnsupportedBackupKind,
+};
+
+const Flash = struct {
+    const Self = @This();
+
+    state: State,
+
+    id_mode: bool,
+    set_bank: bool,
+    prep_erase: bool,
+    prep_write: bool,
+
+    bank: u1,
+
+    const State = enum {
+        Ready,
+        Set,
+        Command,
+    };
+
+    fn init() Self {
+        return .{
+            .state = .Ready,
+            .id_mode = false,
+            .set_bank = false,
+            .prep_erase = false,
+            .prep_write = false,
+            .bank = 0,
+        };
     }
 
-    pub fn deinit(self: *Self) void {
-        if (self.save_path) |path| self.writeSave(self.allocator, path) catch |e| log.err("Failed to write save: {}", .{e});
-        self.allocator.free(self.buf);
-        self.* = undefined;
-    }
-
-    /// Guesses the Backup Kind of a GBA ROM
-    pub fn guess(rom: []const u8) Kind {
-        for (backup_kinds) |needle| {
-            const needle_len = needle.str.len;
-
-            // TODO: Use new for loop syntax?
-            var i: usize = 0;
-            while ((i + needle_len) < rom.len) : (i += 1) {
-                if (std.mem.eql(u8, needle.str, rom[i..][0..needle_len])) return needle.kind;
-            }
-        }
-
-        return .None;
-    }
-
-    fn readSave(self: *Self, allocator: Allocator, path: []const u8) !void {
-        const file_path = try self.savePath(allocator, path);
-        defer allocator.free(file_path);
-
-        const expected = "untitled.sav";
-        if (std.mem.eql(u8, file_path[file_path.len - expected.len .. file_path.len], expected)) {
-            return log.err("ROM header lacks title, no save loaded", .{});
-        }
-
-        const file: std.fs.File = try std.fs.openFileAbsolute(file_path, .{});
-        const file_buf = try file.readToEndAlloc(allocator, try file.getEndPos());
-        defer allocator.free(file_buf);
-
-        switch (self.kind) {
-            .Sram, .Flash, .Flash1M => {
-                if (self.buf.len == file_buf.len) {
-                    std.mem.copy(u8, self.buf, file_buf);
-                    return log.info("Loaded Save from {s}", .{file_path});
-                }
-
-                log.err("{s} is {} bytes, but we expected {} bytes", .{ file_path, file_buf.len, self.buf.len });
+    fn handleCommand(self: *Self, buf: []u8, byte: u8) void {
+        switch (byte) {
+            0x90 => self.id_mode = true,
+            0xF0 => self.id_mode = false,
+            0xB0 => self.set_bank = true,
+            0x80 => self.prep_erase = true,
+            0x10 => {
+                std.mem.set(u8, buf, 0xFF);
+                self.prep_erase = false;
             },
-            .Eeprom => {
-                if (file_buf.len == 0x200 or file_buf.len == 0x2000) {
-                    self.eeprom.kind = if (file_buf.len == 0x200) .Small else .Large;
-
-                    self.buf = try allocator.alloc(u8, file_buf.len);
-                    std.mem.copy(u8, self.buf, file_buf);
-                    return log.info("Loaded Save from {s}", .{file_path});
+            0xA0 => self.prep_write = true,
+            else => std.debug.panic("Unhandled Flash Command: 0x{X:0>2}", .{byte}),
         }
 
-                log.err("EEPROM can either be 0x200 bytes or 0x2000 byes, but {s} was {X:} bytes", .{
-                    file_path,
-                    file_buf.len,
-                });
-            },
-            .None => return SaveError.Unsupported,
-        }
+        self.state = .Ready;
     }
 
-    fn savePath(self: *const Self, allocator: Allocator, path: []const u8) ![]const u8 {
-        const filename = try self.saveName(allocator);
-        defer allocator.free(filename);
-
-        return try std.fs.path.join(allocator, &[_][]const u8{ path, filename });
+    fn shouldEraseSector(self: *const Self, addr: usize, byte: u8) bool {
+        return self.state == .Command and self.prep_erase and byte == 0x30 and addr & 0xFFF == 0x000;
     }
 
-    fn saveName(self: *const Self, allocator: Allocator) ![]const u8 {
-        const title_str = std.mem.sliceTo(&escape(self.title), 0);
-        const name = if (title_str.len != 0) title_str else "untitled";
-
-        return try std.mem.concat(allocator, u8, &[_][]const u8{ name, ".sav" });
+    fn write(self: *Self, buf: []u8, idx: usize, byte: u8) void {
+        buf[self.baseAddress() + idx] = byte;
+        self.prep_write = false;
     }
 
-    fn writeSave(self: Self, allocator: Allocator, path: []const u8) !void {
-        const file_path = try self.savePath(allocator, path);
-        defer allocator.free(file_path);
-
-        switch (self.kind) {
-            .Sram, .Flash, .Flash1M, .Eeprom => {
-                const file = try std.fs.createFileAbsolute(file_path, .{});
-                defer file.close();
-
-                try file.writeAll(self.buf);
-                log.info("Wrote Save to {s}", .{file_path});
-            },
-            else => return SaveError.Unsupported,
+    fn read(self: *const Self, buf: []u8, idx: usize) u8 {
+        return buf[self.baseAddress() + idx];
     }
+
+    fn eraseSector(self: *Self, buf: []u8, idx: usize) void {
+        const start = self.baseAddress() + (idx & 0xF000);
+
+        std.mem.set(u8, buf[start..][0..0x1000], 0xFF);
+        self.prep_erase = false;
+        self.state = .Ready;
+    }
+
+    inline fn baseAddress(self: *const Self) usize {
+        return if (self.bank == 1) 0x10000 else @as(usize, 0);
     }
 };
+
+const Eeprom = struct {
+    const Self = @This();
+
+    addr: u14,
+
+    kind: Kind,
+    state: State,
+    writer: Writer,
+    reader: Reader,
+
+    allocator: Allocator,
+
+    const Kind = enum {
+        Unknown,
+        Small, // 512B
+        Large, // 8KB
+    };
+
+    const State = enum {
+        Ready,
+        Read,
+        Write,
+        WriteTransfer,
+        RequestEnd,
+    };
+
+    fn init(allocator: Allocator) Self {
+        return .{
+            .kind = .Unknown,
+            .state = .Ready,
+            .writer = Writer.init(),
+            .reader = Reader.init(),
+            .addr = 0,
+            .allocator = allocator,
+        };
+    }
+
+    pub fn read(self: *Self) u1 {
+        return self.reader.read();
+    }
+
+    pub fn dbgRead(self: *const Self) u1 {
+        return self.reader.dbgRead();
+    }
+
+    pub fn write(self: *Self, word_count: u16, buf: *[]u8, bit: u1) void {
+        if (self.guessKind(word_count)) |found| {
+            log.info("EEPROM Kind: {}", .{found});
+            self.kind = found;
+
+            // buf.len will not equal zero when a save file was found and loaded.
+            // Right now, we assume that the save file is of the correct size which
+            // isn't necessarily true, since we can't trust anything a user can influence
+            // TODO: use ?[]u8 instead of a 0-sized slice?
+            if (buf.len == 0) {
+                const len: usize = switch (found) {
+                    .Small => 0x200,
+                    .Large => 0x2000,
+                    else => unreachable,
+                };
+
+                buf.* = self.allocator.alloc(u8, len) catch |e| {
+                    log.err("Failed to resize EEPROM buf to {} bytes", .{len});
+                    std.debug.panic("EEPROM entered irrecoverable state {}", .{e});
+                };
+                std.mem.set(u8, buf.*, 0xFF);
+            }
+        }
+
+        if (self.state == .RequestEnd) {
+            if (bit != 0) log.debug("EEPROM Request did not end in 0u1. TODO: is this ok?", .{});
+            self.state = .Ready;
+            return;
+        }
+
+        switch (self.state) {
+            .Ready => self.writer.requestWrite(bit),
+            .Read, .Write => self.writer.addressWrite(self.kind, bit),
+            .WriteTransfer => self.writer.dataWrite(bit),
+            .RequestEnd => unreachable, // We return early just above this block
+        }
+
+        self.tick(buf.*);
+    }
+
+    fn guessKind(self: *const Self, word_count: u16) ?Kind {
+        if (self.kind != .Unknown or self.state != .Read) return null;
+
+        return switch (word_count) {
+            17 => .Large,
+            9 => .Small,
+            else => blk: {
+                log.err("Unexpected length of DMA3 Transfer upon initial EEPROM read: {}", .{word_count});
+                break :blk null;
+            },
+        };
+    }
+
+    fn tick(self: *Self, buf: []u8) void {
+        switch (self.state) {
+            .Ready => {
+                if (self.writer.len() == 2) {
+                    const req = @intCast(u2, self.writer.finish());
+                    switch (req) {
+                        0b11 => self.state = .Read,
+                        0b10 => self.state = .Write,
+                        else => log.err("Unknown EEPROM Request 0b{b:0>2}", .{req}),
+                    }
+                }
+            },
+            .Read => {
+                switch (self.kind) {
+                    .Large => {
+                        if (self.writer.len() == 14) {
+                            const addr = @intCast(u10, self.writer.finish());
+                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
+
+                            self.reader.configure(value);
+                            self.state = .RequestEnd;
+                        }
+                    },
+                    .Small => {
+                        if (self.writer.len() == 6) {
+                            // FIXME: Duplicated code from above
+                            const addr = @intCast(u6, self.writer.finish());
+                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
+
+                            self.reader.configure(value);
+                            self.state = .RequestEnd;
+                        }
+                    },
+                    else => log.err("Unable to calculate EEPROM read address. EEPROM size UNKNOWN", .{}),
+                }
+            },
+            .Write => {
+                switch (self.kind) {
+                    .Large => {
+                        if (self.writer.len() == 14) {
+                            self.addr = @intCast(u10, self.writer.finish());
+                            self.state = .WriteTransfer;
+                        }
+                    },
+                    .Small => {
+                        if (self.writer.len() == 6) {
+                            self.addr = @intCast(u6, self.writer.finish());
+                            self.state = .WriteTransfer;
+                        }
+                    },
+                    else => log.err("Unable to calculate EEPROM write address. EEPROM size UNKNOWN", .{}),
+                }
+            },
+            .WriteTransfer => {
+                if (self.writer.len() == 64) {
+                    std.mem.writeIntSliceLittle(u64, buf[self.addr * 8 ..][0..8], self.writer.finish());
+                    self.state = .RequestEnd;
+                }
+            },
+            .RequestEnd => unreachable, // We return early in write() if state is .RequestEnd
+        }
+    }
+
+    const Reader = struct {
+        const This = @This();
+
+        data: u64,
+        i: u8,
+        enabled: bool,
+
+        fn init() This {
+            return .{
+                .data = 0,
+                .i = 0,
+                .enabled = false,
+            };
+        }
+
+        fn configure(self: *This, value: u64) void {
+            self.data = value;
+            self.i = 0;
+            self.enabled = true;
+        }
+
+        fn read(self: *This) u1 {
+            if (!self.enabled) return 1;
+
+            const bit = if (self.i < 4) blk: {
+                break :blk 0;
+            } else blk: {
+                const idx = @intCast(u6, 63 - (self.i - 4));
+                break :blk @truncate(u1, self.data >> idx);
+            };
+
+            self.i = (self.i + 1) % (64 + 4);
+            if (self.i == 0) self.enabled = false;
+
+            return bit;
+        }
+
+        fn dbgRead(self: *const This) u1 {
+            if (!self.enabled) return 1;
+
+            const bit = if (self.i < 4) blk: {
+                break :blk 0;
+            } else blk: {
+                const idx = @intCast(u6, 63 - (self.i - 4));
+                break :blk @truncate(u1, self.data >> idx);
+            };
+
+            return bit;
+        }
+    };
+
+    const Writer = struct {
+        const This = @This();
+
+        data: u64,
+        i: u8,
+
+        fn init() This {
+            return .{ .data = 0, .i = 0 };
+        }
+
+        fn requestWrite(self: *This, bit: u1) void {
+            const idx = @intCast(u1, 1 - self.i);
+            self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
+            self.i += 1;
+        }
+
+        fn addressWrite(self: *This, kind: Eeprom.Kind, bit: u1) void {
+            if (kind == .Unknown) return;
+
+            const size: u4 = switch (kind) {
+                .Large => 13,
+                .Small => 5,
+                .Unknown => unreachable,
+            };
+
+            const idx = @intCast(u4, size - self.i);
+            self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
+            self.i += 1;
+        }
+
+        fn dataWrite(self: *This, bit: u1) void {
+            const idx = @intCast(u6, 63 - self.i);
+            self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
+            self.i += 1;
+        }
+
+        fn len(self: *const This) u8 {
+            return self.i;
+        }
+
+        fn finish(self: *This) u64 {
+            defer self.reset();
+            return self.data;
+        }
+
+        fn reset(self: *This) void {
+            self.i = 0;
+            self.data = 0;
+        }
+    };
+};

src/core/bus/backup/Flash.zig

@@ -1,72 +0,0 @@
-const std = @import("std");
-
-const Self = @This();
-
-state: State,
-
-id_mode: bool,
-set_bank: bool,
-prep_erase: bool,
-prep_write: bool,
-
-bank: u1,
-
-const State = enum {
-    Ready,
-    Set,
-    Command,
-};
-
-pub fn read(self: *const Self, buf: []u8, idx: usize) u8 {
-    return buf[self.address() + idx];
-}
-
-pub fn write(self: *Self, buf: []u8, idx: usize, byte: u8) void {
-    buf[self.address() + idx] = byte;
-    self.prep_write = false;
-}
-
-pub fn create() Self {
-    return .{
-        .state = .Ready,
-        .id_mode = false,
-        .set_bank = false,
-        .prep_erase = false,
-        .prep_write = false,
-        .bank = 0,
-    };
-}
-
-pub fn handleCommand(self: *Self, buf: []u8, byte: u8) void {
-    switch (byte) {
-        0x90 => self.id_mode = true,
-        0xF0 => self.id_mode = false,
-        0xB0 => self.set_bank = true,
-        0x80 => self.prep_erase = true,
-        0x10 => {
-            std.mem.set(u8, buf, 0xFF);
-            self.prep_erase = false;
-        },
-        0xA0 => self.prep_write = true,
-        else => std.debug.panic("Unhandled Flash Command: 0x{X:0>2}", .{byte}),
-    }
-
-    self.state = .Ready;
-}
-
-pub fn shouldEraseSector(self: *const Self, addr: usize, byte: u8) bool {
-    return self.state == .Command and self.prep_erase and byte == 0x30 and addr & 0xFFF == 0x000;
-}
-
-pub fn erase(self: *Self, buf: []u8, sector: usize) void {
-    const start = self.address() + (sector & 0xF000);
-
-    std.mem.set(u8, buf[start..][0..0x1000], 0xFF);
-    self.prep_erase = false;
-    self.state = .Ready;
-}
-
-/// Base Address
-inline fn address(self: *const Self) usize {
-    return if (self.bank == 1) 0x10000 else @as(usize, 0);
-}

src/core/bus/backup/eeprom.zig

@@ -1,269 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const log = std.log.scoped(.Eeprom);
-
-pub const Eeprom = struct {
-    const Self = @This();
-
-    addr: u14,
-
-    kind: Kind,
-    state: State,
-    writer: Writer,
-    reader: Reader,
-
-    allocator: Allocator,
-
-    const Kind = enum {
-        Unknown,
-        Small, // 512B
-        Large, // 8KB
-    };
-
-    const State = enum {
-        Ready,
-        Read,
-        Write,
-        WriteTransfer,
-        RequestEnd,
-    };
-
-    pub fn read(self: *Self) u1 {
-        return self.reader.read();
-    }
-
-    pub fn dbgRead(self: *const Self) u1 {
-        return self.reader.dbgRead();
-    }
-
-    pub fn write(self: *Self, word_count: u16, buf: *[]u8, bit: u1) void {
-        if (self.guessKind(word_count)) |found| {
-            log.info("EEPROM Kind: {}", .{found});
-            self.kind = found;
-
-            // buf.len will not equal zero when a save file was found and loaded.
-            // Right now, we assume that the save file is of the correct size which
-            // isn't necessarily true, since we can't trust anything a user can influence
-            // TODO: use ?[]u8 instead of a 0-sized slice?
-            if (buf.len == 0) {
-                const len: usize = switch (found) {
-                    .Small => 0x200,
-                    .Large => 0x2000,
-                    else => unreachable,
-                };
-
-                buf.* = self.allocator.alloc(u8, len) catch |e| {
-                    log.err("Failed to resize EEPROM buf to {} bytes", .{len});
-                    std.debug.panic("EEPROM entered irrecoverable state {}", .{e});
-                };
-                std.mem.set(u8, buf.*, 0xFF);
-            }
-        }
-
-        if (self.state == .RequestEnd) {
-            // if (bit != 0) log.debug("EEPROM Request did not end in 0u1. TODO: is this ok?", .{});
-            self.state = .Ready;
-            return;
-        }
-
-        switch (self.state) {
-            .Ready => self.writer.requestWrite(bit),
-            .Read, .Write => self.writer.addressWrite(self.kind, bit),
-            .WriteTransfer => self.writer.dataWrite(bit),
-            .RequestEnd => unreachable, // We return early just above this block
-        }
-
-        self.tick(buf.*);
-    }
-
-    pub fn create(allocator: Allocator) Self {
-        return .{
-            .kind = .Unknown,
-            .state = .Ready,
-            .writer = Writer.create(),
-            .reader = Reader.create(),
-            .addr = 0,
-            .allocator = allocator,
-        };
-    }
-
-    fn guessKind(self: *const Self, word_count: u16) ?Kind {
-        if (self.kind != .Unknown or self.state != .Read) return null;
-
-        return switch (word_count) {
-            17 => .Large,
-            9 => .Small,
-            else => blk: {
-                log.err("Unexpected length of DMA3 Transfer upon initial EEPROM read: {}", .{word_count});
-                break :blk null;
-            },
-        };
-    }
-
-    fn tick(self: *Self, buf: []u8) void {
-        switch (self.state) {
-            .Ready => {
-                if (self.writer.len() == 2) {
-                    const req = @intCast(u2, self.writer.finish());
-                    switch (req) {
-                        0b11 => self.state = .Read,
-                        0b10 => self.state = .Write,
-                        else => log.err("Unknown EEPROM Request 0b{b:0>2}", .{req}),
-                    }
-                }
-            },
-            .Read => {
-                switch (self.kind) {
-                    .Large => {
-                        if (self.writer.len() == 14) {
-                            const addr = @intCast(u10, self.writer.finish());
-                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
-
-                            self.reader.configure(value);
-                            self.state = .RequestEnd;
-                        }
-                    },
-                    .Small => {
-                        if (self.writer.len() == 6) {
-                            // FIXME: Duplicated code from above
-                            const addr = @intCast(u6, self.writer.finish());
-                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
-
-                            self.reader.configure(value);
-                            self.state = .RequestEnd;
-                        }
-                    },
-                    else => log.err("Unable to calculate EEPROM read address. EEPROM size UNKNOWN", .{}),
-                }
-            },
-            .Write => {
-                switch (self.kind) {
-                    .Large => {
-                        if (self.writer.len() == 14) {
-                            self.addr = @intCast(u10, self.writer.finish());
-                            self.state = .WriteTransfer;
-                        }
-                    },
-                    .Small => {
-                        if (self.writer.len() == 6) {
-                            self.addr = @intCast(u6, self.writer.finish());
-                            self.state = .WriteTransfer;
-                        }
-                    },
-                    else => log.err("Unable to calculate EEPROM write address. EEPROM size UNKNOWN", .{}),
-                }
-            },
-            .WriteTransfer => {
-                if (self.writer.len() == 64) {
-                    std.mem.writeIntSliceLittle(u64, buf[self.addr * 8 ..][0..8], self.writer.finish());
-                    self.state = .RequestEnd;
-                }
-            },
-            .RequestEnd => unreachable, // We return early in write() if state is .RequestEnd
-        }
-    }
-};
-
-const Reader = struct {
-    const Self = @This();
-
-    data: u64,
-    i: u8,
-    enabled: bool,
-
-    fn create() Self {
-        return .{
-            .data = 0,
-            .i = 0,
-            .enabled = false,
-        };
-    }
-
-    fn read(self: *Self) u1 {
-        if (!self.enabled) return 1;
-
-        const bit = if (self.i < 4) blk: {
-            break :blk 0;
-        } else blk: {
-            const idx = @intCast(u6, 63 - (self.i - 4));
-            break :blk @truncate(u1, self.data >> idx);
-        };
-
-        self.i = (self.i + 1) % (64 + 4);
-        if (self.i == 0) self.enabled = false;
-
-        return bit;
-    }
-
-    fn dbgRead(self: *const Self) u1 {
-        if (!self.enabled) return 1;
-
-        const bit = if (self.i < 4) blk: {
-            break :blk 0;
-        } else blk: {
-            const idx = @intCast(u6, 63 - (self.i - 4));
-            break :blk @truncate(u1, self.data >> idx);
-        };
-
-        return bit;
-    }
-
-    fn configure(self: *Self, value: u64) void {
-        self.data = value;
-        self.i = 0;
-        self.enabled = true;
-    }
-};
-
-const Writer = struct {
-    const Self = @This();
-
-    data: u64,
-    i: u8,
-
-    fn create() Self {
-        return .{ .data = 0, .i = 0 };
-    }
-
-    fn requestWrite(self: *Self, bit: u1) void {
-        const idx = @intCast(u1, 1 - self.i);
-        self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
-        self.i += 1;
-    }
-
-    fn addressWrite(self: *Self, kind: Eeprom.Kind, bit: u1) void {
-        if (kind == .Unknown) return;
-
-        const size: u4 = switch (kind) {
-            .Large => 13,
-            .Small => 5,
-            .Unknown => unreachable,
-        };
-
-        const idx = @intCast(u4, size - self.i);
-        self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
-        self.i += 1;
-    }
-
-    fn dataWrite(self: *Self, bit: u1) void {
-        const idx = @intCast(u6, 63 - self.i);
-        self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
-        self.i += 1;
-    }
-
-    fn len(self: *const Self) u8 {
-        return self.i;
-    }
-
-    fn finish(self: *Self) u64 {
-        defer self.reset();
-        return self.data;
-    }
-
-    fn reset(self: *Self) void {
-        self.i = 0;
-        self.data = 0;
-    }
-};

src/core/bus/dma.zig

@@ -5,140 +5,86 @@ const DmaControl = @import("io.zig").DmaControl;
 const Bus = @import("../Bus.zig");
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
 
-pub const DmaTuple = struct { DmaController(0), DmaController(1), DmaController(2), DmaController(3) };
+pub const DmaTuple = std.meta.Tuple(&[_]type{ DmaController(0), DmaController(1), DmaController(2), DmaController(3) });
 const log = std.log.scoped(.DmaTransfer);
 
-const getHalf = util.getHalf;
-const setHalf = util.setHalf;
-const setQuart = util.setQuart;
-
-const rotr = @import("../../util.zig").rotr;
-
 pub fn create() DmaTuple {
     return .{ DmaController(0).init(), DmaController(1).init(), DmaController(2).init(), DmaController(3).init() };
 }
 
 pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) ?T {
-    const byte_addr = @truncate(u8, addr);
+    const byte = @truncate(u8, addr);
 
     return switch (T) {
-        u32 => switch (byte_addr) {
-            0xB0, 0xB4 => null, // DMA0SAD, DMA0DAD,
-            0xB8 => @as(T, dma.*[0].dmacntH()) << 16, // DMA0CNT_L is write-only
-            0xBC, 0xC0 => null, // DMA1SAD, DMA1DAD
-            0xC4 => @as(T, dma.*[1].dmacntH()) << 16, // DMA1CNT_L is write-only
-            0xC8, 0xCC => null, // DMA2SAD, DMA2DAD
-            0xD0 => @as(T, dma.*[2].dmacntH()) << 16, // DMA2CNT_L is write-only
-            0xD4, 0xD8 => null, // DMA3SAD, DMA3DAD
-            0xDC => @as(T, dma.*[3].dmacntH()) << 16, // DMA3CNT_L is write-only
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
+        u32 => switch (byte) {
+            0xB8 => @as(T, dma.*[0].cnt.raw) << 16,
+            0xC4 => @as(T, dma.*[1].cnt.raw) << 16,
+            0xD0 => @as(T, dma.*[2].cnt.raw) << 16,
+            0xDC => @as(T, dma.*[3].cnt.raw) << 16,
+            else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
         },
-        u16 => switch (byte_addr) {
-            0xB0, 0xB2, 0xB4, 0xB6 => null, // DMA0SAD, DMA0DAD
-            0xB8 => 0x0000, // DMA0CNT_L, suite.gba expects 0x0000 instead of 0xDEAD
-            0xBA => dma.*[0].dmacntH(),
-
-            0xBC, 0xBE, 0xC0, 0xC2 => null, // DMA1SAD, DMA1DAD
-            0xC4 => 0x0000, // DMA1CNT_L
-            0xC6 => dma.*[1].dmacntH(),
-
-            0xC8, 0xCA, 0xCC, 0xCE => null, // DMA2SAD, DMA2DAD
-            0xD0 => 0x0000, // DMA2CNT_L
-            0xD2 => dma.*[2].dmacntH(),
-
-            0xD4, 0xD6, 0xD8, 0xDA => null, // DMA3SAD, DMA3DAD
-            0xDC => 0x0000, // DMA3CNT_L
-            0xDE => dma.*[3].dmacntH(),
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u8 => switch (byte_addr) {
-            0xB0...0xB7 => null, // DMA0SAD, DMA0DAD
-            0xB8, 0xB9 => 0x00, // DMA0CNT_L
-            0xBA, 0xBB => @truncate(T, dma.*[0].dmacntH() >> getHalf(byte_addr)),
-
-            0xBC...0xC3 => null, // DMA1SAD, DMA1DAD
-            0xC4, 0xC5 => 0x00, // DMA1CNT_L
-            0xC6, 0xC7 => @truncate(T, dma.*[1].dmacntH() >> getHalf(byte_addr)),
-
-            0xC8...0xCF => null, // DMA2SAD, DMA2DAD
-            0xD0, 0xD1 => 0x00, // DMA2CNT_L
-            0xD2, 0xD3 => @truncate(T, dma.*[2].dmacntH() >> getHalf(byte_addr)),
-
-            0xD4...0xDB => null, // DMA3SAD, DMA3DAD
-            0xDC, 0xDD => 0x00, // DMA3CNT_L
-            0xDE, 0xDF => @truncate(T, dma.*[3].dmacntH() >> getHalf(byte_addr)),
-            else => util.io.read.err(T, log, "unexpected {} read from 0x{X:0>8}", .{ T, addr }),
+        u16 => switch (byte) {
+            0xBA => dma.*[0].cnt.raw,
+            0xC6 => dma.*[1].cnt.raw,
+            0xD2 => dma.*[2].cnt.raw,
+            0xDE => dma.*[3].cnt.raw,
+            else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
         },
+        u8 => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
         else => @compileError("DMA: Unsupported read width"),
     };
 }
 
 pub fn write(comptime T: type, dma: *DmaTuple, addr: u32, value: T) void {
-    const byte_addr = @truncate(u8, addr);
+    const byte = @truncate(u8, addr);
 
     switch (T) {
-        u32 => switch (byte_addr) {
-            0xB0 => dma.*[0].setDmasad(value),
-            0xB4 => dma.*[0].setDmadad(value),
-            0xB8 => dma.*[0].setDmacnt(value),
-
-            0xBC => dma.*[1].setDmasad(value),
-            0xC0 => dma.*[1].setDmadad(value),
-            0xC4 => dma.*[1].setDmacnt(value),
-
-            0xC8 => dma.*[2].setDmasad(value),
-            0xCC => dma.*[2].setDmadad(value),
-            0xD0 => dma.*[2].setDmacnt(value),
-
-            0xD4 => dma.*[3].setDmasad(value),
-            0xD8 => dma.*[3].setDmadad(value),
-            0xDC => dma.*[3].setDmacnt(value),
+        u32 => switch (byte) {
+            0xB0 => dma.*[0].setSad(value),
+            0xB4 => dma.*[0].setDad(value),
+            0xB8 => dma.*[0].setCnt(value),
+            0xBC => dma.*[1].setSad(value),
+            0xC0 => dma.*[1].setDad(value),
+            0xC4 => dma.*[1].setCnt(value),
+            0xC8 => dma.*[2].setSad(value),
+            0xCC => dma.*[2].setDad(value),
+            0xD0 => dma.*[2].setCnt(value),
+            0xD4 => dma.*[3].setSad(value),
+            0xD8 => dma.*[3].setDad(value),
+            0xDC => dma.*[3].setCnt(value),
             else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
         },
-        u16 => switch (byte_addr) {
-            0xB0, 0xB2 => dma.*[0].setDmasad(setHalf(u32, dma.*[0].sad, byte_addr, value)),
-            0xB4, 0xB6 => dma.*[0].setDmadad(setHalf(u32, dma.*[0].dad, byte_addr, value)),
-            0xB8 => dma.*[0].setDmacntL(value),
-            0xBA => dma.*[0].setDmacntH(value),
+        u16 => switch (byte) {
+            0xB0 => dma.*[0].setSad(setU32L(dma.*[0].sad, value)),
+            0xB2 => dma.*[0].setSad(setU32H(dma.*[0].sad, value)),
+            0xB4 => dma.*[0].setDad(setU32L(dma.*[0].dad, value)),
+            0xB6 => dma.*[0].setDad(setU32H(dma.*[0].dad, value)),
+            0xB8 => dma.*[0].setCntL(value),
+            0xBA => dma.*[0].setCntH(value),
 
-            0xBC, 0xBE => dma.*[1].setDmasad(setHalf(u32, dma.*[1].sad, byte_addr, value)),
-            0xC0, 0xC2 => dma.*[1].setDmadad(setHalf(u32, dma.*[1].dad, byte_addr, value)),
-            0xC4 => dma.*[1].setDmacntL(value),
-            0xC6 => dma.*[1].setDmacntH(value),
+            0xBC => dma.*[1].setSad(setU32L(dma.*[1].sad, value)),
+            0xBE => dma.*[1].setSad(setU32H(dma.*[1].sad, value)),
+            0xC0 => dma.*[1].setDad(setU32L(dma.*[1].dad, value)),
+            0xC2 => dma.*[1].setDad(setU32H(dma.*[1].dad, value)),
+            0xC4 => dma.*[1].setCntL(value),
+            0xC6 => dma.*[1].setCntH(value),
 
-            0xC8, 0xCA => dma.*[2].setDmasad(setHalf(u32, dma.*[2].sad, byte_addr, value)),
-            0xCC, 0xCE => dma.*[2].setDmadad(setHalf(u32, dma.*[2].dad, byte_addr, value)),
-            0xD0 => dma.*[2].setDmacntL(value),
-            0xD2 => dma.*[2].setDmacntH(value),
+            0xC8 => dma.*[2].setSad(setU32L(dma.*[2].sad, value)),
+            0xCA => dma.*[2].setSad(setU32H(dma.*[2].sad, value)),
+            0xCC => dma.*[2].setDad(setU32L(dma.*[2].dad, value)),
+            0xCE => dma.*[2].setDad(setU32H(dma.*[2].dad, value)),
+            0xD0 => dma.*[2].setCntL(value),
+            0xD2 => dma.*[2].setCntH(value),
 
-            0xD4, 0xD6 => dma.*[3].setDmasad(setHalf(u32, dma.*[3].sad, byte_addr, value)),
-            0xD8, 0xDA => dma.*[3].setDmadad(setHalf(u32, dma.*[3].dad, byte_addr, value)),
-            0xDC => dma.*[3].setDmacntL(value),
-            0xDE => dma.*[3].setDmacntH(value),
+            0xD4 => dma.*[3].setSad(setU32L(dma.*[3].sad, value)),
+            0xD6 => dma.*[3].setSad(setU32H(dma.*[3].sad, value)),
+            0xD8 => dma.*[3].setDad(setU32L(dma.*[3].dad, value)),
+            0xDA => dma.*[3].setDad(setU32H(dma.*[3].dad, value)),
+            0xDC => dma.*[3].setCntL(value),
+            0xDE => dma.*[3].setCntH(value),
             else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
         },
-        u8 => switch (byte_addr) {
-            0xB0, 0xB1, 0xB2, 0xB3 => dma.*[0].setDmasad(setQuart(dma.*[0].sad, byte_addr, value)),
-            0xB4, 0xB5, 0xB6, 0xB7 => dma.*[0].setDmadad(setQuart(dma.*[0].dad, byte_addr, value)),
-            0xB8, 0xB9 => dma.*[0].setDmacntL(setHalf(u16, dma.*[0].word_count, byte_addr, value)),
-            0xBA, 0xBB => dma.*[0].setDmacntH(setHalf(u16, dma.*[0].cnt.raw, byte_addr, value)),
-
-            0xBC, 0xBD, 0xBE, 0xBF => dma.*[1].setDmasad(setQuart(dma.*[1].sad, byte_addr, value)),
-            0xC0, 0xC1, 0xC2, 0xC3 => dma.*[1].setDmadad(setQuart(dma.*[1].dad, byte_addr, value)),
-            0xC4, 0xC5 => dma.*[1].setDmacntL(setHalf(u16, dma.*[1].word_count, byte_addr, value)),
-            0xC6, 0xC7 => dma.*[1].setDmacntH(setHalf(u16, dma.*[1].cnt.raw, byte_addr, value)),
-
-            0xC8, 0xC9, 0xCA, 0xCB => dma.*[2].setDmasad(setQuart(dma.*[2].sad, byte_addr, value)),
-            0xCC, 0xCD, 0xCE, 0xCF => dma.*[2].setDmadad(setQuart(dma.*[2].dad, byte_addr, value)),
-            0xD0, 0xD1 => dma.*[2].setDmacntL(setHalf(u16, dma.*[2].word_count, byte_addr, value)),
-            0xD2, 0xD3 => dma.*[2].setDmacntH(setHalf(u16, dma.*[2].cnt.raw, byte_addr, value)),
-
-            0xD4, 0xD5, 0xD6, 0xD7 => dma.*[3].setDmasad(setQuart(dma.*[3].sad, byte_addr, value)),
-            0xD8, 0xD9, 0xDA, 0xDB => dma.*[3].setDmadad(setQuart(dma.*[3].dad, byte_addr, value)),
-            0xDC, 0xDD => dma.*[3].setDmacntL(setHalf(u16, dma.*[3].word_count, byte_addr, value)),
-            0xDE, 0xDF => dma.*[3].setDmacntH(setHalf(u16, dma.*[3].cnt.raw, byte_addr, value)),
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
-        },
+        u8 => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
         else => @compileError("DMA: Unsupported write width"),
     }
 }
@@ -150,7 +96,6 @@ fn DmaController(comptime id: u2) type {
 
         const sad_mask: u32 = if (id == 0) 0x07FF_FFFF else 0x0FFF_FFFF;
         const dad_mask: u32 = if (id != 3) 0x07FF_FFFF else 0x0FFF_FFFF;
-        const WordCount = if (id == 3) u16 else u14;
 
         /// Write-only. The first address in a DMA transfer. (DMASAD)
         /// Note: use writeSrc instead of manipulating src_addr directly
@@ -159,19 +104,20 @@ fn DmaController(comptime id: u2) type {
         /// Note: Use writeDst instead of manipulatig dst_addr directly
         dad: u32,
         /// Write-only. The Word Count for the DMA Transfer (DMACNT_L)
-        word_count: WordCount,
+        word_count: if (id == 3) u16 else u14,
         /// Read / Write. DMACNT_H
         /// Note: Use writeControl instead of manipulating cnt directly.
         cnt: DmaControl,
 
-        /// Internal. The last successfully read value
-        data_latch: u32,
         /// Internal. Currrent Source Address
-        sad_latch: u32,
+        _sad: u32,
         /// Internal. Current Destination Address
-        dad_latch: u32,
+        _dad: u32,
         /// Internal. Word Count
-        _word_count: WordCount,
+        _word_count: if (id == 3) u16 else u14,
+
+        // Internal. FIFO Word Count
+        _fifo_word_count: u8,
 
         /// Some DMA Transfers are enabled during Hblank / VBlank and / or
         /// have delays. Thefore bit 15 of DMACNT isn't actually something
@@ -186,39 +132,34 @@ fn DmaController(comptime id: u2) type {
                 .cnt = .{ .raw = 0x000 },
 
                 // Internals
-                .sad_latch = 0,
-                .dad_latch = 0,
-                .data_latch = 0,
-
+                ._sad = 0,
+                ._dad = 0,
                 ._word_count = 0,
+                ._fifo_word_count = 4,
                 .in_progress = false,
             };
         }
 
-        pub fn setDmasad(self: *Self, addr: u32) void {
+        pub fn setSad(self: *Self, addr: u32) void {
             self.sad = addr & sad_mask;
         }
 
-        pub fn setDmadad(self: *Self, addr: u32) void {
+        pub fn setDad(self: *Self, addr: u32) void {
             self.dad = addr & dad_mask;
         }
 
-        pub fn setDmacntL(self: *Self, halfword: u16) void {
+        pub fn setCntL(self: *Self, halfword: u16) void {
             self.word_count = @truncate(@TypeOf(self.word_count), halfword);
         }
 
-        pub fn dmacntH(self: *const Self) u16 {
-            return self.cnt.raw & if (id == 3) 0xFFE0 else 0xF7E0;
-        }
-
-        pub fn setDmacntH(self: *Self, halfword: u16) void {
+        pub fn setCntH(self: *Self, halfword: u16) void {
             const new = DmaControl{ .raw = halfword };
 
             if (!self.cnt.enabled.read() and new.enabled.read()) {
                 // Reload Internals on Rising Edge.
-                self.sad_latch = self.sad;
-                self.dad_latch = self.dad;
-                self._word_count = if (self.word_count == 0) std.math.maxInt(WordCount) else self.word_count;
+                self._sad = self.sad;
+                self._dad = self.dad;
+                self._word_count = if (self.word_count == 0) std.math.maxInt(@TypeOf(self._word_count)) else self.word_count;
 
                 // Only a Start Timing of 00 has a DMA Transfer immediately begin
                 self.in_progress = new.start_timing.read() == 0b00;
@@ -227,50 +168,38 @@ fn DmaController(comptime id: u2) type {
             self.cnt.raw = halfword;
         }
 
-        pub fn setDmacnt(self: *Self, word: u32) void {
-            self.setDmacntL(@truncate(u16, word));
-            self.setDmacntH(@truncate(u16, word >> 16));
+        pub fn setCnt(self: *Self, word: u32) void {
+            self.setCntL(@truncate(u16, word));
+            self.setCntH(@truncate(u16, word >> 16));
         }
 
         pub fn step(self: *Self, cpu: *Arm7tdmi) void {
             const is_fifo = (id == 1 or id == 2) and self.cnt.start_timing.read() == 0b11;
-            const sad_adj = @intToEnum(Adjustment, self.cnt.sad_adj.read());
-            const dad_adj = if (is_fifo) .Fixed else @intToEnum(Adjustment, self.cnt.dad_adj.read());
+            const sad_adj = Self.adjustment(self.cnt.sad_adj.read());
+            const dad_adj = if (is_fifo) .Fixed else Self.adjustment(self.cnt.dad_adj.read());
 
             const transfer_type = is_fifo or self.cnt.transfer_type.read();
             const offset: u32 = if (transfer_type) @sizeOf(u32) else @sizeOf(u16);
 
             const mask = if (transfer_type) ~@as(u32, 3) else ~@as(u32, 1);
-            const sad_addr = self.sad_latch & mask;
-            const dad_addr = self.dad_latch & mask;
 
             if (transfer_type) {
-                if (sad_addr >= 0x0200_0000) self.data_latch = cpu.bus.read(u32, sad_addr);
-                cpu.bus.write(u32, dad_addr, self.data_latch);
+                cpu.bus.write(u32, self._dad & mask, cpu.bus.read(u32, self._sad & mask));
             } else {
-                if (sad_addr >= 0x0200_0000) {
-                    const value: u32 = cpu.bus.read(u16, sad_addr);
-                    self.data_latch = value << 16 | value;
+                cpu.bus.write(u16, self._dad & mask, cpu.bus.read(u16, self._sad & mask));
             }
 
-                cpu.bus.write(u16, dad_addr, @truncate(u16, rotr(u32, self.data_latch, 8 * (dad_addr & 3))));
-            }
-
-            switch (@truncate(u8, sad_addr >> 24)) {
-                // according to fleroviux, DMAs with a source address in ROM misbehave
-                // the resultant behaviour is that the source address will increment despite what DMAXCNT says
-                0x08...0x0D => self.sad_latch +%= offset, // obscure behaviour
-                else => switch (sad_adj) {
-                    .Increment => self.sad_latch +%= offset,
-                    .Decrement => self.sad_latch -%= offset,
+            switch (sad_adj) {
+                .Increment => self._sad +%= offset,
+                .Decrement => self._sad -%= offset,
+                // TODO: Is just ignoring this ok?
                 .IncrementReload => log.err("{} is a prohibited adjustment on SAD", .{sad_adj}),
                 .Fixed => {},
-                },
             }
 
             switch (dad_adj) {
-                .Increment, .IncrementReload => self.dad_latch +%= offset,
-                .Decrement => self.dad_latch -%= offset,
+                .Increment, .IncrementReload => self._dad +%= offset,
+                .Decrement => self._dad -%= offset,
                 .Fixed => {},
             }
 
@@ -298,7 +227,7 @@ fn DmaController(comptime id: u2) type {
             }
         }
 
-        fn poll(self: *Self, comptime kind: DmaKind) void {
+        pub fn pollBlankingDma(self: *Self, comptime kind: DmaKind) void {
             if (self.in_progress) return; // If there's an ongoing DMA Transfer, exit early
 
             // No ongoing DMA Transfer, We want to check if we should repeat an existing one
@@ -314,11 +243,11 @@ fn DmaController(comptime id: u2) type {
             // Reload internal DAD latch if we are in IncrementRelaod
             if (self.in_progress) {
                 self._word_count = if (self.word_count == 0) std.math.maxInt(@TypeOf(self._word_count)) else self.word_count;
-                if (@intToEnum(Adjustment, self.cnt.dad_adj.read()) == .IncrementReload) self.dad_latch = self.dad;
+                if (Self.adjustment(self.cnt.dad_adj.read()) == .IncrementReload) self._dad = self.dad;
             }
         }
 
-        pub fn requestAudio(self: *Self, _: u32) void {
+        pub fn requestSoundDma(self: *Self, _: u32) void {
             comptime std.debug.assert(id == 1 or id == 2);
             if (self.in_progress) return; // APU must wait their turn
 
@@ -330,16 +259,23 @@ fn DmaController(comptime id: u2) type {
             // We Assume DMACNT_L is set to 4
 
             // FIXME: Safe to just assume whatever DAD is set to is the FIFO Address?
-            // self.dad_latch = fifo_addr;
+            // self._dad = fifo_addr;
             self.cnt.repeat.set();
             self._word_count = 4;
             self.in_progress = true;
         }
+
+        fn adjustment(idx: u2) Adjustment {
+            return std.meta.intToEnum(Adjustment, idx) catch unreachable;
+        }
     };
 }
 
-pub fn onBlanking(bus: *Bus, comptime kind: DmaKind) void {
-    inline for (0..4) |i| bus.dma[i].poll(kind);
+pub fn pollBlankingDma(bus: *Bus, comptime kind: DmaKind) void {
+    bus.dma[0].pollBlankingDma(kind);
+    bus.dma[1].pollBlankingDma(kind);
+    bus.dma[2].pollBlankingDma(kind);
+    bus.dma[3].pollBlankingDma(kind);
 }
 
 const Adjustment = enum(u2) {
@@ -355,3 +291,11 @@ const DmaKind = enum(u2) {
     VBlank,
     Special,
 };
+
+fn setU32L(left: u32, right: u16) u32 {
+    return (left & 0xFFFF_0000) | right;
+}
+
+fn setU32H(left: u32, right: u16) u32 {
+    return (left & 0x0000_FFFF) | (@as(u32, right) << 16);
+}

src/core/bus/gpio.zig

@@ -1,5 +1,6 @@
 const std = @import("std");
 const Bit = @import("bitfield").Bit;
+const Bitfield = @import("bitfield").Bitfield;
 const DateTime = @import("datetime").datetime.Datetime;
 
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
@@ -67,11 +68,9 @@ pub const Gpio = struct {
         log.info("Device: {}", .{kind});
 
         const self = try allocator.create(Self);
-        errdefer allocator.destroy(self);
-
         self.* = .{
             .data = 0b0000,
-            .direction = 0b1111, // TODO: What is GPIO Direction set to by default?
+            .direction = 0b1111, // TODO: What is GPIO DIrection set to by default?
             .cnt = 0b0,
 
             .device = switch (kind) {
@@ -289,17 +288,17 @@ pub const Clock = struct {
         cpu.sched.push(.RealTimeClock, 1 << 24); // Every Second
     }
 
-    pub fn onClockUpdate(self: *Self, late: u64) void {
+    pub fn updateTime(self: *Self, late: u64) void {
         self.cpu.sched.push(.RealTimeClock, (1 << 24) -| late); // Reschedule
 
         const now = DateTime.now();
-        self.year = bcd(@intCast(u8, now.date.year - 2000));
-        self.month = @truncate(u5, bcd(now.date.month));
-        self.day = @truncate(u6, bcd(now.date.day));
-        self.weekday = @truncate(u3, bcd((now.date.weekday() + 1) % 7)); // API is Monday = 0, Sunday = 6. We want Sunday = 0, Saturday = 6
-        self.hour = @truncate(u6, bcd(now.time.hour));
-        self.minute = @truncate(u7, bcd(now.time.minute));
-        self.second = @truncate(u7, bcd(now.time.second));
+        self.year = bcd(u8, @intCast(u8, now.date.year - 2000));
+        self.month = bcd(u5, now.date.month);
+        self.day = bcd(u6, now.date.day);
+        self.weekday = bcd(u3, (now.date.weekday() + 1) % 7); // API is Monday = 0, Sunday = 6. We want Sunday = 0, Saturday = 6
+        self.hour = bcd(u6, now.time.hour);
+        self.minute = bcd(u7, now.time.minute);
+        self.second = bcd(u7, now.time.second);
     }
 
     fn step(self: *Self, value: Data) u4 {
@@ -449,8 +448,16 @@ pub const Clock = struct {
     }
 };
 
-/// Converts an 8-bit unsigned integer to its BCD representation.
-/// Note: Algorithm only works for values between 0 and 99 inclusive.
-fn bcd(value: u8) u8 {
-    return ((value / 10) << 4) + (value % 10);
+fn bcd(comptime T: type, value: u8) T {
+    var input = value;
+    var ret: u8 = 0;
+    var shift: u3 = 0;
+
+    while (input > 0) {
+        ret |= (input % 10) << (shift << 2);
+        shift += 1;
+        input /= 10;
+    }
+
+    return @truncate(T, ret);
 }

src/core/bus/io.zig

@@ -1,16 +1,15 @@
 const std = @import("std");
+const builtin = @import("builtin");
 const timer = @import("timer.zig");
 const dma = @import("dma.zig");
 const apu = @import("../apu.zig");
-const ppu = @import("../ppu.zig");
 const util = @import("../../util.zig");
 
 const Bit = @import("bitfield").Bit;
 const Bitfield = @import("bitfield").Bitfield;
 const Bus = @import("../Bus.zig");
-
-const getHalf = util.getHalf;
-const setHalf = util.setHalf;
+const DmaController = @import("dma.zig").DmaController;
+const Scheduler = @import("../scheduler.zig").Scheduler;
 
 const log = std.log.scoped(.@"I/O");
 
@@ -22,17 +21,15 @@ pub const Io = struct {
     ie: InterruptEnable,
     irq: InterruptRequest,
     postflg: PostFlag,
-    waitcnt: WaitControl,
     haltcnt: HaltControl,
-    keyinput: AtomicKeyInput,
+    keyinput: KeyInput,
 
     pub fn init() Self {
         return .{
             .ime = false,
             .ie = .{ .raw = 0x0000 },
             .irq = .{ .raw = 0x0000 },
-            .keyinput = AtomicKeyInput.init(.{ .raw = 0x03FF }),
-            .waitcnt = .{ .raw = 0x0000_0000 }, // Bit 15 == 0 for GBA
+            .keyinput = .{ .raw = 0x03FF },
             .postflg = .FirstBoot,
             .haltcnt = .Execute,
         };
@@ -48,10 +45,9 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
     return switch (T) {
         u32 => switch (address) {
             // Display
-            0x0400_0000...0x0400_0054 => ppu.read(T, &bus.ppu, address),
-
-            // Sound
-            0x0400_0060...0x0400_00A4 => apu.read(T, &bus.apu, address),
+            0x0400_0000 => bus.ppu.dispcnt.raw,
+            0x0400_0004 => @as(T, bus.ppu.vcount.raw) << 16 | bus.ppu.dispstat.raw,
+            0x0400_0006 => @as(T, bus.ppu.bg[0].cnt.raw) << 16 | bus.ppu.vcount.raw,
 
             // DMA Transfers
             0x0400_00B0...0x0400_00DC => dma.read(T, &bus.dma, address),
@@ -69,18 +65,26 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
             0x0400_0150 => util.io.read.todo(log, "Read {} from JOY_RECV", .{T}),
 
             // Interrupts
-            0x0400_0200 => @as(u32, bus.io.irq.raw) << 16 | bus.io.ie.raw,
-            0x0400_0204 => bus.io.waitcnt.raw,
+            0x0400_0200 => @as(T, bus.io.irq.raw) << 16 | bus.io.ie.raw,
             0x0400_0208 => @boolToInt(bus.io.ime),
-            0x0400_0300 => @enumToInt(bus.io.postflg),
             else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
         },
         u16 => switch (address) {
             // Display
-            0x0400_0000...0x0400_0054 => ppu.read(T, &bus.ppu, address),
+            0x0400_0000 => bus.ppu.dispcnt.raw,
+            0x0400_0004 => bus.ppu.dispstat.raw,
+            0x0400_0006 => bus.ppu.vcount.raw,
+            0x0400_0008 => bus.ppu.bg[0].cnt.raw,
+            0x0400_000A => bus.ppu.bg[1].cnt.raw,
+            0x0400_000C => bus.ppu.bg[2].cnt.raw,
+            0x0400_000E => bus.ppu.bg[3].cnt.raw,
+            0x0400_004C => util.io.read.todo(log, "Read {} from MOSAIC", .{T}),
+            0x0400_0050 => bus.ppu.bldcnt.raw,
+            0x0400_0052 => bus.ppu.bldalpha.raw,
+            0x0400_0054 => bus.ppu.bldy.raw,
 
             // Sound
-            0x0400_0060...0x0400_00A6 => apu.read(T, &bus.apu, address),
+            0x0400_0060...0x0400_009E => apu.read(T, &bus.apu, address),
 
             // DMA Transfers
             0x0400_00B0...0x0400_00DE => dma.read(T, &bus.dma, address),
@@ -92,38 +96,32 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
             0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT", .{T}),
 
             // Keypad Input
-            0x0400_0130 => bus.io.keyinput.load(.Monotonic).raw,
+            0x0400_0130 => bus.io.keyinput.raw,
 
             // Serial Communication 2
             0x0400_0134 => util.io.read.todo(log, "Read {} from RCNT", .{T}),
-            0x0400_0136 => 0x0000,
-            0x0400_0142 => 0x0000,
-            0x0400_015A => 0x0000,
 
             // Interrupts
             0x0400_0200 => bus.io.ie.raw,
             0x0400_0202 => bus.io.irq.raw,
-            0x0400_0204 => bus.io.waitcnt.raw,
-            0x0400_0206 => 0x0000,
+            0x0400_0204 => util.io.read.todo(log, "Read {} from WAITCNT", .{T}),
             0x0400_0208 => @boolToInt(bus.io.ime),
-            0x0400_020A => 0x0000,
-            0x0400_0300 => @enumToInt(bus.io.postflg),
-            0x0400_0302 => 0x0000,
             else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
         },
         u8 => return switch (address) {
             // Display
-            0x0400_0000...0x0400_0055 => ppu.read(T, &bus.ppu, address),
+            0x0400_0000 => @truncate(T, bus.ppu.dispcnt.raw),
+            0x0400_0004 => @truncate(T, bus.ppu.dispstat.raw),
+            0x0400_0005 => @truncate(T, bus.ppu.dispcnt.raw >> 8),
+            0x0400_0006 => @truncate(T, bus.ppu.vcount.raw),
+            0x0400_0008 => @truncate(T, bus.ppu.bg[0].cnt.raw),
+            0x0400_0009 => @truncate(T, bus.ppu.bg[0].cnt.raw >> 8),
+            0x0400_000A => @truncate(T, bus.ppu.bg[1].cnt.raw),
+            0x0400_000B => @truncate(T, bus.ppu.bg[1].cnt.raw >> 8),
 
             // Sound
             0x0400_0060...0x0400_00A7 => apu.read(T, &bus.apu, address),
 
-            // DMA Transfers
-            0x0400_00B0...0x0400_00DF => dma.read(T, &bus.dma, address),
-
-            // Timers
-            0x0400_0100...0x0400_010F => timer.read(T, &bus.tim, address),
-
             // Serial Communication 1
             0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT_L", .{T}),
 
@@ -132,20 +130,10 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
 
             // Serial Communication 2
             0x0400_0135 => util.io.read.todo(log, "Read {} from RCNT_H", .{T}),
-            0x0400_0136, 0x0400_0137 => 0x00,
-            0x0400_0142, 0x0400_0143 => 0x00,
-            0x0400_015A, 0x0400_015B => 0x00,
 
             // Interrupts
-            0x0400_0200, 0x0400_0201 => @truncate(T, bus.io.ie.raw >> getHalf(@truncate(u8, address))),
-            0x0400_0202, 0x0400_0203 => @truncate(T, bus.io.irq.raw >> getHalf(@truncate(u8, address))),
-            0x0400_0204, 0x0400_0205 => @truncate(T, bus.io.waitcnt.raw >> getHalf(@truncate(u8, address))),
-            0x0400_0206, 0x0400_0207 => 0x00,
-            0x0400_0208, 0x0400_0209 => @truncate(T, @as(u16, @boolToInt(bus.io.ime)) >> getHalf(@truncate(u8, address))),
-            0x0400_020A, 0x0400_020B => 0x00,
+            0x0400_0200 => @truncate(T, bus.io.ie.raw),
             0x0400_0300 => @enumToInt(bus.io.postflg),
-            0x0400_0301 => null,
-            0x0400_0302, 0x0400_0303 => 0x00,
             else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
         },
         else => @compileError("I/O: Unsupported read width"),
@@ -156,7 +144,34 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
     return switch (T) {
         u32 => switch (address) {
             // Display
-            0x0400_0000...0x0400_0054 => ppu.write(T, &bus.ppu, address, value),
+            0x0400_0000 => bus.ppu.dispcnt.raw = @truncate(u16, value),
+            0x0400_0004 => {
+                bus.ppu.dispstat.raw = @truncate(u16, value);
+                bus.ppu.vcount.raw = @truncate(u16, value >> 16);
+            },
+            0x0400_0008 => bus.ppu.setAdjCnts(0, value),
+            0x0400_000C => bus.ppu.setAdjCnts(2, value),
+            0x0400_0010 => bus.ppu.setBgOffsets(0, value),
+            0x0400_0014 => bus.ppu.setBgOffsets(1, value),
+            0x0400_0018 => bus.ppu.setBgOffsets(2, value),
+            0x0400_001C => bus.ppu.setBgOffsets(3, value),
+            0x0400_0020 => bus.ppu.aff_bg[0].writePaPb(value),
+            0x0400_0024 => bus.ppu.aff_bg[0].writePcPd(value),
+            0x0400_0028 => bus.ppu.aff_bg[0].setX(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_002C => bus.ppu.aff_bg[0].setY(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_0030 => bus.ppu.aff_bg[1].writePaPb(value),
+            0x0400_0034 => bus.ppu.aff_bg[1].writePcPd(value),
+            0x0400_0038 => bus.ppu.aff_bg[1].setX(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_003C => bus.ppu.aff_bg[1].setY(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_0040 => bus.ppu.win.setH(value),
+            0x0400_0044 => bus.ppu.win.setV(value),
+            0x0400_0048 => bus.ppu.win.setIo(value),
+            0x0400_004C => log.debug("Wrote 0x{X:0>8} to MOSAIC", .{value}),
+            0x0400_0050 => {
+                bus.ppu.bldcnt.raw = @truncate(u16, value);
+                bus.ppu.bldalpha.raw = @truncate(u16, value >> 16);
+            },
+            0x0400_0054 => bus.ppu.bldy.raw = @truncate(u16, value),
             0x0400_0058...0x0400_005C => {}, // Unused
 
             // Sound
@@ -192,28 +207,65 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
 
             // Interrupts
             0x0400_0200 => bus.io.setIrqs(value),
-            0x0400_0204 => bus.io.waitcnt.set(@truncate(u16, value)),
+            0x0400_0204 => log.debug("Wrote 0x{X:0>8} to WAITCNT", .{value}),
             0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_0300 => {
-                bus.io.postflg = @intToEnum(PostFlag, value & 1);
-                bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
-            },
+            0x0400_020C...0x0400_021C => {}, // Unused
             else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
         },
         u16 => switch (address) {
             // Display
-            0x0400_0000...0x0400_0054 => ppu.write(T, &bus.ppu, address, value),
-            0x0400_0056 => {}, // Not used
+            0x0400_0000 => bus.ppu.dispcnt.raw = value,
+            0x0400_0004 => bus.ppu.dispstat.raw = value,
+            0x0400_0006 => {}, // vcount is read-only
+            0x0400_0008 => bus.ppu.bg[0].cnt.raw = value,
+            0x0400_000A => bus.ppu.bg[1].cnt.raw = value,
+            0x0400_000C => bus.ppu.bg[2].cnt.raw = value,
+            0x0400_000E => bus.ppu.bg[3].cnt.raw = value,
+            0x0400_0010 => bus.ppu.bg[0].hofs.raw = value, // TODO: Don't write out every HOFS / VOFS?
+            0x0400_0012 => bus.ppu.bg[0].vofs.raw = value,
+            0x0400_0014 => bus.ppu.bg[1].hofs.raw = value,
+            0x0400_0016 => bus.ppu.bg[1].vofs.raw = value,
+            0x0400_0018 => bus.ppu.bg[2].hofs.raw = value,
+            0x0400_001A => bus.ppu.bg[2].vofs.raw = value,
+            0x0400_001C => bus.ppu.bg[3].hofs.raw = value,
+            0x0400_001E => bus.ppu.bg[3].vofs.raw = value,
+            0x0400_0020 => bus.ppu.aff_bg[0].pa = @bitCast(i16, value),
+            0x0400_0022 => bus.ppu.aff_bg[0].pb = @bitCast(i16, value),
+            0x0400_0024 => bus.ppu.aff_bg[0].pc = @bitCast(i16, value),
+            0x0400_0026 => bus.ppu.aff_bg[0].pd = @bitCast(i16, value),
+            0x0400_0028 => bus.ppu.aff_bg[0].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].x) & 0xFFFF_0000 | value),
+            0x0400_002A => bus.ppu.aff_bg[0].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].x) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_002C => bus.ppu.aff_bg[0].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].y) & 0xFFFF_0000 | value),
+            0x0400_002E => bus.ppu.aff_bg[0].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].y) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_0030 => bus.ppu.aff_bg[1].pa = @bitCast(i16, value),
+            0x0400_0032 => bus.ppu.aff_bg[1].pb = @bitCast(i16, value),
+            0x0400_0034 => bus.ppu.aff_bg[1].pc = @bitCast(i16, value),
+            0x0400_0036 => bus.ppu.aff_bg[1].pd = @bitCast(i16, value),
+            0x0400_0038 => bus.ppu.aff_bg[1].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].x) & 0xFFFF_0000 | value),
+            0x0400_003A => bus.ppu.aff_bg[1].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].x) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_003C => bus.ppu.aff_bg[1].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].y) & 0xFFFF_0000 | value),
+            0x0400_003E => bus.ppu.aff_bg[1].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].y) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_0040 => bus.ppu.win.h[0].raw = value,
+            0x0400_0042 => bus.ppu.win.h[1].raw = value,
+            0x0400_0044 => bus.ppu.win.v[0].raw = value,
+            0x0400_0046 => bus.ppu.win.v[1].raw = value,
+            0x0400_0048 => bus.ppu.win.in.raw = value,
+            0x0400_004A => bus.ppu.win.out.raw = value,
+            0x0400_004C => log.debug("Wrote 0x{X:0>4} to MOSAIC", .{value}),
+            0x0400_0050 => bus.ppu.bldcnt.raw = value,
+            0x0400_0052 => bus.ppu.bldalpha.raw = value,
+            0x0400_0054 => bus.ppu.bldy.raw = value,
+            0x0400_004E, 0x0400_0056 => {}, // Not used
 
             // Sound
-            0x0400_0060...0x0400_00A6 => apu.write(T, &bus.apu, address, value),
+            0x0400_0060...0x0400_009E => apu.write(T, &bus.apu, address, value),
 
             // Dma Transfers
             0x0400_00B0...0x0400_00DE => dma.write(T, &bus.dma, address, value),
 
             // Timers
             0x0400_0100...0x0400_010E => timer.write(T, &bus.tim, address, value),
-            0x0400_0114 => {},
+            0x0400_0114 => {}, // TODO: Gyakuten Saiban writes 0x8000 to 0x0400_0114
             0x0400_0110 => {}, // Not Used,
 
             // Serial Communication 1
@@ -237,29 +289,27 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
             // Interrupts
             0x0400_0200 => bus.io.ie.raw = value,
             0x0400_0202 => bus.io.irq.raw &= ~value,
-            0x0400_0204 => bus.io.waitcnt.set(value),
-            0x0400_0206 => {},
+            0x0400_0204 => log.debug("Wrote 0x{X:0>4} to WAITCNT", .{value}),
             0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_020A => {},
-            0x0400_0300 => {
-                bus.io.postflg = @intToEnum(PostFlag, value & 1);
-                bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
-            },
+            0x0400_0206, 0x0400_020A => {}, // Not Used
             else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
         },
         u8 => switch (address) {
             // Display
-            0x0400_0000...0x0400_0055 => ppu.write(T, &bus.ppu, address, value),
+            0x0400_0004 => bus.ppu.dispstat.raw = (bus.ppu.dispstat.raw & 0xFF00) | value,
+            0x0400_0005 => bus.ppu.dispstat.raw = (@as(u16, value) << 8) | (bus.ppu.dispstat.raw & 0xFF),
+            0x0400_0008 => bus.ppu.bg[0].cnt.raw = (bus.ppu.bg[0].cnt.raw & 0xFF00) | value,
+            0x0400_0009 => bus.ppu.bg[0].cnt.raw = (@as(u16, value) << 8) | (bus.ppu.bg[0].cnt.raw & 0xFF),
+            0x0400_000A => bus.ppu.bg[1].cnt.raw = (bus.ppu.bg[1].cnt.raw & 0xFF00) | value,
+            0x0400_000B => bus.ppu.bg[1].cnt.raw = (@as(u16, value) << 8) | (bus.ppu.bg[1].cnt.raw & 0xFF),
+            0x0400_0048 => bus.ppu.win.setInL(value),
+            0x0400_0049 => bus.ppu.win.setInH(value),
+            0x0400_004A => bus.ppu.win.setOutL(value),
+            0x0400_0054 => bus.ppu.bldy.raw = (bus.ppu.bldy.raw & 0xFF00) | value,
 
             // Sound
             0x0400_0060...0x0400_00A7 => apu.write(T, &bus.apu, address, value),
 
-            // Dma Transfers
-            0x0400_00B0...0x0400_00DF => dma.write(T, &bus.dma, address, value),
-
-            // Timers
-            0x0400_0100...0x0400_010F => timer.write(T, &bus.tim, address, value),
-
             // Serial Communication 1
             0x0400_0120 => log.debug("Wrote 0x{X:0>2} to SIODATA32_L_L", .{value}),
             0x0400_0128 => log.debug("Wrote 0x{X:0>2} to SIOCNT_L", .{value}),
@@ -269,16 +319,9 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
             0x0400_0140 => log.debug("Wrote 0x{X:0>2} to JOYCNT_L", .{value}),
 
             // Interrupts
-            0x0400_0200, 0x0400_0201 => bus.io.ie.raw = setHalf(u16, bus.io.ie.raw, @truncate(u8, address), value),
             0x0400_0202 => bus.io.irq.raw &= ~@as(u16, value),
-            0x0400_0203 => bus.io.irq.raw &= ~@as(u16, value) << 8, // TODO: Is this good?
-            0x0400_0204, 0x0400_0205 => bus.io.waitcnt.set(setHalf(u16, @truncate(u16, bus.io.waitcnt.raw), @truncate(u8, address), value)),
-            0x0400_0206, 0x0400_0207 => {},
             0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_0209 => {},
-            0x0400_020A, 0x0400_020B => {},
-
-            0x0400_0300 => bus.io.postflg = @intToEnum(PostFlag, value & 1),
+            0x0400_0300 => bus.io.postflg = std.meta.intToEnum(PostFlag, value & 1) catch unreachable,
             0x0400_0301 => bus.io.haltcnt = if (value >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
 
             0x0400_0410 => log.debug("Wrote 0x{X:0>2} to the common yet undocumented 0x{X:0>8}", .{ value, address }),
@@ -317,22 +360,14 @@ pub const DisplayControl = extern union {
 
 /// Read / Write
 pub const DisplayStatus = extern union {
-    /// read-only
     vblank: Bit(u16, 0),
-    /// read-only
     hblank: Bit(u16, 1),
-    // read-only
     coincidence: Bit(u16, 2),
     vblank_irq: Bit(u16, 3),
     hblank_irq: Bit(u16, 4),
     vcount_irq: Bit(u16, 5),
     vcount_trigger: Bitfield(u16, 8, 8),
     raw: u16,
-
-    pub fn set(self: *DisplayStatus, value: u16) void {
-        const mask: u16 = 0x00C7; // set bits are read-only
-        self.raw = (self.raw & mask) | (value & ~mask);
-    }
 };
 
 /// Read Only
@@ -376,31 +411,6 @@ const KeyInput = extern union {
     raw: u16,
 };
 
-const AtomicKeyInput = struct {
-    const Self = @This();
-    const Ordering = std.atomic.Ordering;
-
-    inner: KeyInput,
-
-    pub fn init(value: KeyInput) Self {
-        return .{ .inner = value };
-    }
-
-    pub inline fn load(self: *const Self, comptime ordering: Ordering) KeyInput {
-        return .{ .raw = switch (ordering) {
-            .AcqRel, .Release => @compileError("not supported for atomic loads"),
-            else => @atomicLoad(u16, &self.inner.raw, ordering),
-        } };
-    }
-
-    pub inline fn store(self: *Self, value: u16, comptime ordering: Ordering) void {
-        switch (ordering) {
-            .AcqRel, .Acquire => @compileError("not supported for atomic stores"),
-            else => @atomicStore(u16, &self.inner.raw, value, ordering),
-        }
-    }
-};
-
 // Read / Write
 pub const BackgroundControl = extern union {
     priority: Bitfield(u16, 0, 2),
@@ -449,8 +459,6 @@ pub const BldY = extern union {
     raw: u16,
 };
 
-const u8WriteKind = enum { Hi, Lo };
-
 /// Write-only
 pub const WinH = extern union {
     x2: Bitfield(u16, 0, 8),
@@ -460,8 +468,6 @@ pub const WinH = extern union {
 
 /// Write-only
 pub const WinV = extern union {
-    const Self = @This();
-
     y2: Bitfield(u16, 0, 8),
     y1: Bitfield(u16, 8, 8),
     raw: u16,
@@ -470,20 +476,20 @@ pub const WinV = extern union {
 pub const WinIn = extern union {
     w0_bg: Bitfield(u16, 0, 4),
     w0_obj: Bit(u16, 4),
-    w0_bld: Bit(u16, 5),
+    w0_colour: Bit(u16, 5),
     w1_bg: Bitfield(u16, 8, 4),
     w1_obj: Bit(u16, 12),
-    w1_bld: Bit(u16, 13),
+    w1_colour: Bit(u16, 13),
     raw: u16,
 };
 
 pub const WinOut = extern union {
     out_bg: Bitfield(u16, 0, 4),
     out_obj: Bit(u16, 4),
-    out_bld: Bit(u16, 5),
+    out_colour: Bit(u16, 5),
     obj_bg: Bitfield(u16, 8, 4),
     obj_obj: Bit(u16, 12),
-    obj_bld: Bit(u16, 13),
+    obj_colour: Bit(u16, 13),
     raw: u16,
 };
 
@@ -652,24 +658,3 @@ pub const SoundBias = extern union {
     sampling_cycle: Bitfield(u16, 14, 2),
     raw: u16,
 };
-
-/// Read / Write
-pub const WaitControl = extern union {
-    sram_cnt: Bitfield(u16, 0, 2),
-    s0_first: Bitfield(u16, 2, 2),
-    s0_second: Bit(u16, 4),
-    s1_first: Bitfield(u16, 5, 2),
-    s1_second: Bit(u16, 7),
-    s2_first: Bitfield(u16, 8, 2),
-    s2_second: Bit(u16, 10),
-    phi_out: Bitfield(u16, 11, 2),
-
-    prefetch_enable: Bit(u16, 14),
-    pak_kind: Bit(u16, 15),
-    raw: u16,
-
-    pub fn set(self: *WaitControl, value: u16) void {
-        const mask: u16 = 0x8000; // set bits are read-only
-        self.raw = (self.raw & mask) | (value & ~mask);
-    }
-};

src/core/bus/timer.zig

@@ -2,99 +2,68 @@ const std = @import("std");
 const util = @import("../../util.zig");
 
 const TimerControl = @import("io.zig").TimerControl;
+const Io = @import("io.zig").Io;
 const Scheduler = @import("../scheduler.zig").Scheduler;
+const Event = @import("../scheduler.zig").Event;
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
 
-pub const TimerTuple = struct { Timer(0), Timer(1), Timer(2), Timer(3) };
+pub const TimerTuple = std.meta.Tuple(&[_]type{ Timer(0), Timer(1), Timer(2), Timer(3) });
 const log = std.log.scoped(.Timer);
 
-const getHalf = util.getHalf;
-const setHalf = util.setHalf;
-
 pub fn create(sched: *Scheduler) TimerTuple {
     return .{ Timer(0).init(sched), Timer(1).init(sched), Timer(2).init(sched), Timer(3).init(sched) };
 }
 
 pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) ?T {
-    const nybble_addr = @truncate(u4, addr);
+    const nybble = @truncate(u4, addr);
 
     return switch (T) {
-        u32 => switch (nybble_addr) {
-            0x0 => @as(T, tim.*[0].cnt.raw) << 16 | tim.*[0].timcntL(),
-            0x4 => @as(T, tim.*[1].cnt.raw) << 16 | tim.*[1].timcntL(),
-            0x8 => @as(T, tim.*[2].cnt.raw) << 16 | tim.*[2].timcntL(),
-            0xC => @as(T, tim.*[3].cnt.raw) << 16 | tim.*[3].timcntL(),
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
+        u32 => switch (nybble) {
+            0x0 => @as(T, tim.*[0].cnt.raw) << 16 | tim.*[0].getCntL(),
+            0x4 => @as(T, tim.*[1].cnt.raw) << 16 | tim.*[1].getCntL(),
+            0x8 => @as(T, tim.*[2].cnt.raw) << 16 | tim.*[2].getCntL(),
+            0xC => @as(T, tim.*[3].cnt.raw) << 16 | tim.*[3].getCntL(),
+            else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
         },
-        u16 => switch (nybble_addr) {
-            0x0 => tim.*[0].timcntL(),
+        u16 => switch (nybble) {
+            0x0 => tim.*[0].getCntL(),
             0x2 => tim.*[0].cnt.raw,
-
-            0x4 => tim.*[1].timcntL(),
+            0x4 => tim.*[1].getCntL(),
             0x6 => tim.*[1].cnt.raw,
-
-            0x8 => tim.*[2].timcntL(),
+            0x8 => tim.*[2].getCntL(),
             0xA => tim.*[2].cnt.raw,
-
-            0xC => tim.*[3].timcntL(),
+            0xC => tim.*[3].getCntL(),
             0xE => tim.*[3].cnt.raw,
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u8 => switch (nybble_addr) {
-            0x0, 0x1 => @truncate(T, tim.*[0].timcntL() >> getHalf(nybble_addr)),
-            0x2, 0x3 => @truncate(T, tim.*[0].cnt.raw >> getHalf(nybble_addr)),
-
-            0x4, 0x5 => @truncate(T, tim.*[1].timcntL() >> getHalf(nybble_addr)),
-            0x6, 0x7 => @truncate(T, tim.*[1].cnt.raw >> getHalf(nybble_addr)),
-
-            0x8, 0x9 => @truncate(T, tim.*[2].timcntL() >> getHalf(nybble_addr)),
-            0xA, 0xB => @truncate(T, tim.*[2].cnt.raw >> getHalf(nybble_addr)),
-
-            0xC, 0xD => @truncate(T, tim.*[3].timcntL() >> getHalf(nybble_addr)),
-            0xE, 0xF => @truncate(T, tim.*[3].cnt.raw >> getHalf(nybble_addr)),
+            else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
         },
+        u8 => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
         else => @compileError("TIM: Unsupported read width"),
     };
 }
 
 pub fn write(comptime T: type, tim: *TimerTuple, addr: u32, value: T) void {
-    const nybble_addr = @truncate(u4, addr);
+    const nybble = @truncate(u4, addr);
 
     return switch (T) {
-        u32 => switch (nybble_addr) {
-            0x0 => tim.*[0].setTimcnt(value),
-            0x4 => tim.*[1].setTimcnt(value),
-            0x8 => tim.*[2].setTimcnt(value),
-            0xC => tim.*[3].setTimcnt(value),
+        u32 => switch (nybble) {
+            0x0 => tim.*[0].setCnt(value),
+            0x4 => tim.*[1].setCnt(value),
+            0x8 => tim.*[2].setCnt(value),
+            0xC => tim.*[3].setCnt(value),
             else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
         },
-        u16 => switch (nybble_addr) {
-            0x0 => tim.*[0].setTimcntL(value),
-            0x2 => tim.*[0].setTimcntH(value),
-
-            0x4 => tim.*[1].setTimcntL(value),
-            0x6 => tim.*[1].setTimcntH(value),
-
-            0x8 => tim.*[2].setTimcntL(value),
-            0xA => tim.*[2].setTimcntH(value),
-
-            0xC => tim.*[3].setTimcntL(value),
-            0xE => tim.*[3].setTimcntH(value),
+        u16 => switch (nybble) {
+            0x0 => tim.*[0].setCntL(value),
+            0x2 => tim.*[0].setCntH(value),
+            0x4 => tim.*[1].setCntL(value),
+            0x6 => tim.*[1].setCntH(value),
+            0x8 => tim.*[2].setCntL(value),
+            0xA => tim.*[2].setCntH(value),
+            0xC => tim.*[3].setCntL(value),
+            0xE => tim.*[3].setCntH(value),
             else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
         },
-        u8 => switch (nybble_addr) {
-            0x0, 0x1 => tim.*[0].setTimcntL(setHalf(u16, tim.*[0]._reload, nybble_addr, value)),
-            0x2, 0x3 => tim.*[0].setTimcntH(setHalf(u16, tim.*[0].cnt.raw, nybble_addr, value)),
-
-            0x4, 0x5 => tim.*[1].setTimcntL(setHalf(u16, tim.*[1]._reload, nybble_addr, value)),
-            0x6, 0x7 => tim.*[1].setTimcntH(setHalf(u16, tim.*[1].cnt.raw, nybble_addr, value)),
-
-            0x8, 0x9 => tim.*[2].setTimcntL(setHalf(u16, tim.*[2]._reload, nybble_addr, value)),
-            0xA, 0xB => tim.*[2].setTimcntH(setHalf(u16, tim.*[2].cnt.raw, nybble_addr, value)),
-
-            0xC, 0xD => tim.*[3].setTimcntL(setHalf(u16, tim.*[3]._reload, nybble_addr, value)),
-            0xE, 0xF => tim.*[3].setTimcntH(setHalf(u16, tim.*[3].cnt.raw, nybble_addr, value)),
-        },
+        u8 => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
         else => @compileError("TIM: Unsupported write width"),
     };
 }
@@ -103,13 +72,13 @@ fn Timer(comptime id: u2) type {
     return struct {
         const Self = @This();
 
-        /// Read Only, Internal. Please use self.timcntL()
+        /// Read Only, Internal. Please use self.getCntL()
         _counter: u16,
 
-        /// Write Only, Internal. Please use self.setTimcntL()
+        /// Write Only, Internal. Please use self.setCntL()
         _reload: u16,
 
-        /// Write Only, Internal. Please use self.setTimcntH()
+        /// Write Only, Internal. Please use self.setCntH()
         cnt: TimerControl,
 
         /// Internal.
@@ -128,62 +97,47 @@ fn Timer(comptime id: u2) type {
             };
         }
 
-        /// TIMCNT_L Getter
-        pub fn timcntL(self: *const Self) u16 {
+        /// TIMCNT_L
+        pub fn getCntL(self: *const Self) u16 {
             if (self.cnt.cascade.read() or !self.cnt.enabled.read()) return self._counter;
 
             return self._counter +% @truncate(u16, (self.sched.now() - self._start_timestamp) / self.frequency());
         }
 
-        /// TIMCNT_L Setter
-        pub fn setTimcntL(self: *Self, halfword: u16) void {
+        /// TIMCNT_L
+        pub fn setCntL(self: *Self, halfword: u16) void {
             self._reload = halfword;
         }
 
         /// TIMCNT_L & TIMCNT_H
-        pub fn setTimcnt(self: *Self, word: u32) void {
-            self.setTimcntL(@truncate(u16, word));
-            self.setTimcntH(@truncate(u16, word >> 16));
+        pub fn setCnt(self: *Self, word: u32) void {
+            self.setCntL(@truncate(u16, word));
+            self.setCntH(@truncate(u16, word >> 16));
         }
 
         /// TIMCNT_H
-        pub fn setTimcntH(self: *Self, halfword: u16) void {
+        pub fn setCntH(self: *Self, halfword: u16) void {
             const new = TimerControl{ .raw = halfword };
 
-            if (self.cnt.enabled.read()) {
-                // timer was already enabled
-
-                // If enabled falling edge or cascade falling edge, timer is paused
-                if (!new.enabled.read() or (!self.cnt.cascade.read() and new.cascade.read())) {
+            // If Timer happens to be enabled, It will either be resheduled or disabled
             self.sched.removeScheduledEvent(.{ .TimerOverflow = id });
 
-                    // Counter should hold the value it stopped at meaning we have to calculate it now
+            if (self.cnt.enabled.read() and (new.cascade.read() or !new.enabled.read())) {
+                // Either through the cascade bit or the enable bit, the timer has effectively been disabled
+                // The Counter should hold whatever value it should have been at when it was disabled
                 self._counter +%= @truncate(u16, (self.sched.now() - self._start_timestamp) / self.frequency());
             }
 
-                // the timer has always been enabled, but the cascade bit which was blocking the timer has been unset
-                if (new.enabled.read() and (self.cnt.cascade.read() and !new.cascade.read())) {
-                    // we want to reschedule the timer event, however we won't reload the counter.
-                    // the invariant here is that self._counter holds the already calculated paused value
+            // The counter is only reloaded on the rising edge of the enable bit
+            if (!self.cnt.enabled.read() and new.enabled.read()) self._counter = self._reload;
 
-                    self.rescheduleTimerExpire(0);
-                }
-            } else {
-                // the timer was previously disabeld
-
-                if (new.enabled.read()) {
-                    // timer should start counting (with a reloaded counter value)
-                    self._counter = self._reload;
-
-                    // if cascade happens to be set, the timer doesn't actually do anything though
-                    if (!new.cascade.read()) self.rescheduleTimerExpire(0);
-                }
-            }
+            // If Timer is enabled and we're not cascading, we need to schedule an overflow event
+            if (new.enabled.read() and !new.cascade.read()) self.scheduleOverflow(0);
 
             self.cnt.raw = halfword;
         }
 
-        pub fn onTimerExpire(self: *Self, cpu: *Arm7tdmi, late: u64) void {
+        pub fn handleOverflow(self: *Self, cpu: *Arm7tdmi, late: u64) void {
             // Fire IRQ if enabled
             const io = &cpu.bus.io;
 
@@ -200,31 +154,34 @@ fn Timer(comptime id: u2) type {
 
             // DMA Sound Things
             if (id == 0 or id == 1) {
-                cpu.bus.apu.onDmaAudioSampleRequest(cpu, id);
+                cpu.bus.apu.handleTimerOverflow(cpu, id);
             }
 
             // Perform Cascade Behaviour
             switch (id) {
-                inline 0, 1, 2 => |idx| {
-                    const next = idx + 1;
-
-                    if (cpu.bus.tim[next].cnt.cascade.read()) {
-                        cpu.bus.tim[next]._counter +%= 1;
-                        if (cpu.bus.tim[next]._counter == 0) cpu.bus.tim[next].onTimerExpire(cpu, late);
-                    }
+                0 => if (cpu.bus.tim[1].cnt.cascade.read()) {
+                    cpu.bus.tim[1]._counter +%= 1;
+                    if (cpu.bus.tim[1]._counter == 0) cpu.bus.tim[1].handleOverflow(cpu, late);
                 },
-                3 => {}, // THere is no timer for TIM3 to cascade to
+                1 => if (cpu.bus.tim[2].cnt.cascade.read()) {
+                    cpu.bus.tim[2]._counter +%= 1;
+                    if (cpu.bus.tim[2]._counter == 0) cpu.bus.tim[2].handleOverflow(cpu, late);
+                },
+                2 => if (cpu.bus.tim[3].cnt.cascade.read()) {
+                    cpu.bus.tim[3]._counter +%= 1;
+                    if (cpu.bus.tim[3]._counter == 0) cpu.bus.tim[3].handleOverflow(cpu, late);
+                },
+                3 => {}, // There is no Timer for TIM3 to "cascade" to,
             }
 
             // Reschedule Timer if we're not cascading
-            // TIM0 cascade value is N/A
-            if (id == 0 or !self.cnt.cascade.read()) {
+            if (!self.cnt.cascade.read()) {
                 self._counter = self._reload;
-                self.rescheduleTimerExpire(late);
+                self.scheduleOverflow(late);
             }
         }
 
-        fn rescheduleTimerExpire(self: *Self, late: u64) void {
+        fn scheduleOverflow(self: *Self, late: u64) void {
             const when = (@as(u64, 0x10000) - self._counter) * self.frequency();
 
             self._start_timestamp = self.sched.now();

src/core/cpu.zig

@@ -1,13 +1,14 @@
 const std = @import("std");
+const util = @import("../util.zig");
 
 const Bus = @import("Bus.zig");
 const Bit = @import("bitfield").Bit;
 const Bitfield = @import("bitfield").Bitfield;
 const Scheduler = @import("scheduler.zig").Scheduler;
+const FilePaths = @import("../util.zig").FilePaths;
 const Logger = @import("../util.zig").Logger;
 
 const File = std.fs.File;
-const log = std.log.scoped(.Arm7Tdmi);
 
 // ARM Instructions
 pub const arm = struct {
@@ -39,12 +40,13 @@ pub const arm = struct {
     }
 
     fn populate() [0x1000]InstrFn {
-        comptime {
+        return comptime {
             @setEvalBranchQuota(0xE000);
-            var table = [_]InstrFn{und} ** 0x1000;
+            var ret = [_]InstrFn{und} ** 0x1000;
 
-            for (&table, 0..) |*handler, i| {
-                handler.* = switch (@as(u2, i >> 10)) {
+            var i: usize = 0;
+            while (i < ret.len) : (i += 1) {
+                ret[i] = switch (@as(u2, i >> 10)) {
                     0b00 => if (i == 0x121) blk: {
                         break :blk branchExchange;
                     } else if (i & 0xFCF == 0x009) blk: {
@@ -106,8 +108,8 @@ pub const arm = struct {
                 };
             }
 
-            return table;
-        }
+            return ret;
+        };
     }
 };
 
@@ -135,12 +137,13 @@ pub const thumb = struct {
     }
 
     fn populate() [0x400]InstrFn {
-        comptime {
+        return comptime {
             @setEvalBranchQuota(5025); // This is exact
-            var table = [_]InstrFn{und} ** 0x400;
+            var ret = [_]InstrFn{und} ** 0x400;
 
-            for (&table, 0..) |*handler, i| {
-                handler.* = switch (@as(u3, i >> 7 & 0x7)) {
+            var i: usize = 0;
+            while (i < ret.len) : (i += 1) {
+                ret[i] = switch (@as(u3, i >> 7 & 0x7)) {
                     0b000 => if (i >> 5 & 0x3 == 0b11) blk: {
                         const I = i >> 4 & 1 == 1;
                         const is_sub = i >> 3 & 1 == 1;
@@ -228,51 +231,49 @@ pub const thumb = struct {
                 };
             }
 
-            return table;
-        }
+            return ret;
+        };
     }
 };
 
+const log = std.log.scoped(.Arm7Tdmi);
+
 pub const Arm7tdmi = struct {
     const Self = @This();
 
     r: [16]u32,
-    pipe: Pipeline,
     sched: *Scheduler,
     bus: *Bus,
     cpsr: PSR,
     spsr: PSR,
 
-    bank: Bank,
+    /// Storage  for R8_fiq -> R12_fiq and their normal counterparts
+    /// e.g [r[0 + 8], fiq_r[0 + 8], r[1 + 8], fiq_r[1 + 8]...]
+    banked_fiq: [2 * 5]u32,
+
+    /// Storage for r13_<mode>, r14_<mode>
+    /// e.g. [r13, r14, r13_svc, r14_svc]
+    banked_r: [2 * 6]u32,
+
+    banked_spsr: [5]PSR,
 
     logger: ?Logger,
 
-    /// Bank of Registers from other CPU Modes
-    const Bank = struct {
-        /// Storage for r13_<mode>, r14_<mode>
-        /// e.g. [r13, r14, r13_svc, r14_svc]
-        r: [2 * 6]u32,
-
-        /// Storage  for R8_fiq -> R12_fiq and their normal counterparts
-        /// e.g [r[0 + 8], fiq_r[0 + 8], r[1 + 8], fiq_r[1 + 8]...]
-        fiq: [2 * 5]u32,
-
-        spsr: [5]PSR,
-
-        const Kind = enum(u1) {
-            R13 = 0,
-            R14,
-        };
-
-        pub fn create() Bank {
-            return .{
-                .r = [_]u32{0x00} ** 12,
-                .fiq = [_]u32{0x00} ** 10,
-                .spsr = [_]PSR{.{ .raw = 0x0000_0000 }} ** 5,
+    pub fn init(sched: *Scheduler, bus: *Bus, log_file: ?std.fs.File) Self {
+        return Self{
+            .r = [_]u32{0x00} ** 16,
+            .sched = sched,
+            .bus = bus,
+            .cpsr = .{ .raw = 0x0000_001F },
+            .spsr = .{ .raw = 0x0000_0000 },
+            .banked_fiq = [_]u32{0x00} ** 10,
+            .banked_r = [_]u32{0x00} ** 12,
+            .banked_spsr = [_]PSR{.{ .raw = 0x0000_0000 }} ** 5,
+            .logger = if (log_file) |file| Logger.init(file) else null,
         };
     }
 
-        inline fn regIdx(mode: Mode, kind: Kind) usize {
+    inline fn bankedIdx(mode: Mode, kind: BankedKind) usize {
         const idx: usize = switch (mode) {
             .User, .System => 0,
             .Supervisor => 1,
@@ -285,7 +286,7 @@ pub const Arm7tdmi = struct {
         return (idx * 2) + if (kind == .R14) @as(usize, 1) else 0;
     }
 
-        inline fn spsrIdx(mode: Mode) usize {
+    inline fn bankedSpsrIndex(mode: Mode) usize {
         return switch (mode) {
             .Supervisor => 0,
             .Abort => 1,
@@ -296,23 +297,9 @@ pub const Arm7tdmi = struct {
         };
     }
 
-        inline fn fiqIdx(i: usize, mode: Mode) usize {
+    inline fn bankedFiqIdx(i: usize, mode: Mode) usize {
         return (i * 2) + if (mode == .Fiq) @as(usize, 1) else 0;
     }
-    };
-
-    pub fn init(sched: *Scheduler, bus: *Bus, log_file: ?std.fs.File) Self {
-        return Self{
-            .r = [_]u32{0x00} ** 16,
-            .pipe = Pipeline.init(),
-            .sched = sched,
-            .bus = bus,
-            .cpsr = .{ .raw = 0x0000_001F },
-            .spsr = .{ .raw = 0x0000_0000 },
-            .bank = Bank.create(),
-            .logger = if (log_file) |file| Logger.init(file) else null,
-        };
-    }
 
     pub inline fn hasSPSR(self: *const Self) bool {
         const mode = getModeChecked(self, self.cpsr.mode.read());
@@ -349,14 +336,14 @@ pub const Arm7tdmi = struct {
         switch (idx) {
             8...12 => {
                 if (current == .Fiq) {
-                    self.bank.fiq[Bank.fiqIdx(idx - 8, .User)] = value;
+                    self.banked_fiq[bankedFiqIdx(idx - 8, .User)] = value;
                 } else self.r[idx] = value;
             },
             13, 14 => switch (current) {
                 .User, .System => self.r[idx] = value,
                 else => {
-                    const kind = std.meta.intToEnum(Bank.Kind, idx - 13) catch unreachable;
-                    self.bank.r[Bank.regIdx(.User, kind)] = value;
+                    const kind = std.meta.intToEnum(BankedKind, idx - 13) catch unreachable;
+                    self.banked_r[bankedIdx(.User, kind)] = value;
                 },
             },
             else => self.r[idx] = value, // R0 -> R7  and R15
@@ -367,12 +354,12 @@ pub const Arm7tdmi = struct {
         const current = getModeChecked(self, self.cpsr.mode.read());
 
         return switch (idx) {
-            8...12 => if (current == .Fiq) self.bank.fiq[Bank.fiqIdx(idx - 8, .User)] else self.r[idx],
+            8...12 => if (current == .Fiq) self.banked_fiq[bankedFiqIdx(idx - 8, .User)] else self.r[idx],
             13, 14 => switch (current) {
                 .User, .System => self.r[idx],
                 else => blk: {
-                    const kind = std.meta.intToEnum(Bank.Kind, idx - 13) catch unreachable;
-                    break :blk self.bank.r[Bank.regIdx(.User, kind)];
+                    const kind = std.meta.intToEnum(BankedKind, idx - 13) catch unreachable;
+                    break :blk self.banked_r[bankedIdx(.User, kind)];
                 },
             },
             else => self.r[idx], // R0 -> R7  and R15
@@ -383,80 +370,68 @@ pub const Arm7tdmi = struct {
         const now = getModeChecked(self, self.cpsr.mode.read());
 
         // Bank R8 -> r12
-        for (0..5) |i| {
-            self.bank.fiq[Bank.fiqIdx(i, now)] = self.r[8 + i];
+        var i: usize = 0;
+        while (i < 5) : (i += 1) {
+            self.banked_fiq[bankedFiqIdx(i, now)] = self.r[8 + i];
         }
 
         // Bank r13, r14, SPSR
         switch (now) {
             .User, .System => {
-                self.bank.r[Bank.regIdx(now, .R13)] = self.r[13];
-                self.bank.r[Bank.regIdx(now, .R14)] = self.r[14];
+                self.banked_r[bankedIdx(now, .R13)] = self.r[13];
+                self.banked_r[bankedIdx(now, .R14)] = self.r[14];
             },
             else => {
-                self.bank.r[Bank.regIdx(now, .R13)] = self.r[13];
-                self.bank.r[Bank.regIdx(now, .R14)] = self.r[14];
-                self.bank.spsr[Bank.spsrIdx(now)] = self.spsr;
+                self.banked_r[bankedIdx(now, .R13)] = self.r[13];
+                self.banked_r[bankedIdx(now, .R14)] = self.r[14];
+                self.banked_spsr[bankedSpsrIndex(now)] = self.spsr;
             },
         }
 
         // Grab R8 -> R12
-        for (0..5) |i| {
-            self.r[8 + i] = self.bank.fiq[Bank.fiqIdx(i, next)];
+        i = 0;
+        while (i < 5) : (i += 1) {
+            self.r[8 + i] = self.banked_fiq[bankedFiqIdx(i, next)];
         }
 
         // Grab r13, r14, SPSR
         switch (next) {
             .User, .System => {
-                self.r[13] = self.bank.r[Bank.regIdx(next, .R13)];
-                self.r[14] = self.bank.r[Bank.regIdx(next, .R14)];
+                self.r[13] = self.banked_r[bankedIdx(next, .R13)];
+                self.r[14] = self.banked_r[bankedIdx(next, .R14)];
             },
             else => {
-                self.r[13] = self.bank.r[Bank.regIdx(next, .R13)];
-                self.r[14] = self.bank.r[Bank.regIdx(next, .R14)];
-                self.spsr = self.bank.spsr[Bank.spsrIdx(next)];
+                self.r[13] = self.banked_r[bankedIdx(next, .R13)];
+                self.r[14] = self.banked_r[bankedIdx(next, .R14)];
+                self.spsr = self.banked_spsr[bankedSpsrIndex(next)];
             },
         }
 
         self.cpsr.mode.write(@enumToInt(next));
     }
 
-    /// Advances state so that the BIOS is skipped
-    ///
-    /// Note: This accesses the CPU's bus ptr so it only may be called
-    /// once the Bus has been properly initialized
-    ///
-    /// TODO: Make above notice impossible to do in code
     pub fn fastBoot(self: *Self) void {
         self.r = std.mem.zeroes([16]u32);
 
-        // self.r[0] = 0x08000000;
-        // self.r[1] = 0x000000EA;
+        self.r[0] = 0x08000000;
+        self.r[1] = 0x000000EA;
         self.r[13] = 0x0300_7F00;
         self.r[15] = 0x0800_0000;
 
-        self.bank.r[Bank.regIdx(.Irq, .R13)] = 0x0300_7FA0;
-        self.bank.r[Bank.regIdx(.Supervisor, .R13)] = 0x0300_7FE0;
+        self.banked_r[bankedIdx(.Irq, .R13)] = 0x0300_7FA0;
+        self.banked_r[bankedIdx(.Supervisor, .R13)] = 0x0300_7FE0;
 
-        // self.cpsr.raw = 0x6000001F;
-        self.cpsr.raw = 0x0000_001F;
-
-        self.bus.bios.addr_latch = 0x0000_00DC + 8;
+        self.cpsr.raw = 0x6000001F;
     }
 
     pub fn step(self: *Self) void {
-        defer {
-            if (!self.pipe.flushed) self.r[15] += if (self.cpsr.t.read()) 2 else @as(u32, 4);
-            self.pipe.flushed = false;
-        }
-
         if (self.cpsr.t.read()) {
-            const opcode = @truncate(u16, self.pipe.step(self, u16) orelse return);
+            const opcode = self.fetch(u16);
             if (self.logger) |*trace| trace.mgbaLog(self, opcode);
 
             thumb.lut[thumb.idx(opcode)](self, self.bus, opcode);
         } else {
-            const opcode = self.pipe.step(self, u32) orelse return;
+            const opcode = self.fetch(u32);
             if (self.logger) |*trace| trace.mgbaLog(self, opcode);
 
             if (checkCond(self.cpsr, @truncate(u4, opcode >> 28))) {
@@ -466,11 +441,29 @@ pub const Arm7tdmi = struct {
     }
 
     pub fn stepDmaTransfer(self: *Self) bool {
-        inline for (0..4) |i| {
-            if (self.bus.dma[i].in_progress) {
-                self.bus.dma[i].step(self);
+        const dma0 = &self.bus.dma[0];
+        const dma1 = &self.bus.dma[1];
+        const dma2 = &self.bus.dma[2];
+        const dma3 = &self.bus.dma[3];
+
+        if (dma0.in_progress) {
+            dma0.step(self);
             return true;
         }
+
+        if (dma1.in_progress) {
+            dma1.step(self);
+            return true;
+        }
+
+        if (dma2.in_progress) {
+            dma2.step(self);
+            return true;
+        }
+
+        if (dma3.in_progress) {
+            dma3.step(self);
+            return true;
         }
 
         return false;
@@ -479,41 +472,42 @@ pub const Arm7tdmi = struct {
     pub fn handleInterrupt(self: *Self) void {
         const should_handle = self.bus.io.ie.raw & self.bus.io.irq.raw;
 
-        // Return if IME is disabled, CPSR I is set or there is nothing to handle
-        if (!self.bus.io.ime or self.cpsr.i.read() or should_handle == 0) return;
-
-        // If Pipeline isn't full, we have a bug
-        std.debug.assert(self.pipe.isFull());
-
-        // log.debug("Handling Interrupt!", .{});
+        if (should_handle != 0) {
             self.bus.io.haltcnt = .Execute;
+            // log.debug("An Interrupt was Fired!", .{});
 
-        // FIXME: This seems weird, but retAddr.gba suggests I need to make these changes
-        const ret_addr = self.r[15] - if (self.cpsr.t.read()) 0 else @as(u32, 4);
-        const new_spsr = self.cpsr.raw;
+            // Either IME is not true or I in CPSR is true
+            // Don't handle interrupts
+            if (!self.bus.io.ime or self.cpsr.i.read()) return;
+            // log.debug("An interrupt was Handled!", .{});
+
+            // retAddr.gba says r15 on it's own is off by -04h in both ARM and THUMB mode
+            const r15 = self.r[15] + 4;
+            const cpsr = self.cpsr.raw;
 
             self.changeMode(.Irq);
             self.cpsr.t.write(false);
             self.cpsr.i.write(true);
 
-        self.r[14] = ret_addr;
-        self.spsr.raw = new_spsr;
-        self.r[15] = 0x0000_0018;
-        self.pipe.reload(self);
+            self.r[14] = r15;
+            self.spsr.raw = cpsr;
+            self.r[15] = 0x000_0018;
+        }
     }
 
-    inline fn fetch(self: *Self, comptime T: type, address: u32) T {
+    inline fn fetch(self: *Self, comptime T: type) T {
         comptime std.debug.assert(T == u32 or T == u16); // Opcode may be 32-bit (ARM) or 16-bit (THUMB)
+        defer self.r[15] += if (T == u32) 4 else 2;
 
-        // Bus.read will advance the scheduler. There are different timings for CPU fetches,
-        // so we want to undo what Bus.read will apply. We can do this by caching the current tick
-        // This is very dumb.
-        //
-        // FIXME: Please rework this
+        // FIXME: You better hope this is optimized out
         const tick_cache = self.sched.tick;
-        defer self.sched.tick = tick_cache + Bus.fetch_timings[@boolToInt(T == u32)][@truncate(u4, address >> 24)];
+        defer self.sched.tick = tick_cache + Bus.fetch_timings[@boolToInt(T == u32)][@truncate(u4, self.r[15] >> 24)];
 
-        return self.bus.read(T, address);
+        return self.bus.read(T, self.r[15]);
+    }
+
+    pub fn fakePC(self: *const Self) u32 {
+        return self.r[15] + 4;
     }
 
     pub fn panic(self: *const Self, comptime format: []const u8, args: anytype) noreturn {
@@ -525,12 +519,10 @@ pub const Arm7tdmi = struct {
             std.debug.print("R{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\n", .{ i, self.r[i], i_1, self.r[i_1], i_2, self.r[i_2], i_3, self.r[i_3] });
         }
         std.debug.print("cpsr: 0x{X:0>8} ", .{self.cpsr.raw});
-        self.cpsr.toString();
+        prettyPrintPsr(&self.cpsr);
 
         std.debug.print("spsr: 0x{X:0>8} ", .{self.spsr.raw});
-        self.spsr.toString();
-
-        std.debug.print("pipeline: {??X:0>8}\n", .{self.pipe.stage});
+        prettyPrintPsr(&self.spsr);
 
         if (self.cpsr.t.read()) {
             const opcode = self.bus.dbgRead(u16, self.r[15] - 4);
@@ -546,74 +538,99 @@ pub const Arm7tdmi = struct {
 
         std.debug.panic(format, args);
     }
-};
 
-const condition_lut = [_]u16{
-    0xF0F0, // EQ - Equal
-    0x0F0F, // NE - Not Equal
-    0xCCCC, // CS - Unsigned higher or same
-    0x3333, // CC - Unsigned lower
-    0xFF00, // MI - Negative
-    0x00FF, // PL - Positive or Zero
-    0xAAAA, // VS - Overflow
-    0x5555, // VC - No Overflow
-    0x0C0C, // HI - unsigned hierh
-    0xF3F3, // LS - unsigned lower or same
-    0xAA55, // GE - greater or equal
-    0x55AA, // LT - less than
-    0x0A05, // GT - greater than
-    0xF5FA, // LE - less than or equal
-    0xFFFF, // AL - always
-    0x0000, // NV - never
-};
+    fn prettyPrintPsr(psr: *const PSR) void {
+        std.debug.print("[", .{});
 
-pub inline fn checkCond(cpsr: PSR, cond: u4) bool {
-    const flags = @truncate(u4, cpsr.raw >> 28);
+        if (psr.n.read()) std.debug.print("N", .{}) else std.debug.print("-", .{});
+        if (psr.z.read()) std.debug.print("Z", .{}) else std.debug.print("-", .{});
+        if (psr.c.read()) std.debug.print("C", .{}) else std.debug.print("-", .{});
+        if (psr.v.read()) std.debug.print("V", .{}) else std.debug.print("-", .{});
+        if (psr.i.read()) std.debug.print("I", .{}) else std.debug.print("-", .{});
+        if (psr.f.read()) std.debug.print("F", .{}) else std.debug.print("-", .{});
+        if (psr.t.read()) std.debug.print("T", .{}) else std.debug.print("-", .{});
+        std.debug.print("|", .{});
+        if (getMode(psr.mode.read())) |mode| std.debug.print("{s}", .{modeString(mode)}) else std.debug.print("---", .{});
 
-    return condition_lut[cond] & (@as(u16, 1) << flags) != 0;
+        std.debug.print("]\n", .{});
     }
 
-const Pipeline = struct {
-    const Self = @This();
-    stage: [2]?u32,
-    flushed: bool,
-
-    fn init() Self {
-        return .{
-            .stage = [_]?u32{null} ** 2,
-            .flushed = false,
+    fn modeString(mode: Mode) []const u8 {
+        return switch (mode) {
+            .User => "usr",
+            .Fiq => "fiq",
+            .Irq => "irq",
+            .Supervisor => "svc",
+            .Abort => "abt",
+            .Undefined => "und",
+            .System => "sys",
         };
     }
 
-    pub fn isFull(self: *const Self) bool {
-        return self.stage[0] != null and self.stage[1] != null;
-    }
+    fn mgbaLog(self: *const Self, file: *const File, opcode: u32) !void {
+        const thumb_fmt = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | {X:0>4}:\n";
+        const arm_fmt = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | {X:0>8}:\n";
+        var buf: [0x100]u8 = [_]u8{0x00} ** 0x100; // this is larger than it needs to be
 
-    pub fn step(self: *Self, cpu: *Arm7tdmi, comptime T: type) ?u32 {
-        comptime std.debug.assert(T == u32 or T == u16);
+        const r0 = self.r[0];
+        const r1 = self.r[1];
+        const r2 = self.r[2];
+        const r3 = self.r[3];
+        const r4 = self.r[4];
+        const r5 = self.r[5];
+        const r6 = self.r[6];
+        const r7 = self.r[7];
+        const r8 = self.r[8];
+        const r9 = self.r[9];
+        const r10 = self.r[10];
+        const r11 = self.r[11];
+        const r12 = self.r[12];
+        const r13 = self.r[13];
+        const r14 = self.r[14];
+        const r15 = self.r[15];
 
-        const opcode = self.stage[0];
-        self.stage[0] = self.stage[1];
-        self.stage[1] = cpu.fetch(T, cpu.r[15]);
+        const c_psr = self.cpsr.raw;
 
-        return opcode;
-    }
+        var log_str: []u8 = undefined;
+        if (self.cpsr.t.read()) {
+            if (opcode >> 11 == 0x1E) {
+                // Instruction 1 of a BL Opcode, print in ARM mode
+                const other_half = self.bus.dbgRead(u16, self.r[15]);
+                const bl_opcode = @as(u32, opcode) << 16 | other_half;
 
-    pub fn reload(self: *Self, cpu: *Arm7tdmi) void {
-        if (cpu.cpsr.t.read()) {
-            self.stage[0] = cpu.fetch(u16, cpu.r[15]);
-            self.stage[1] = cpu.fetch(u16, cpu.r[15] + 2);
-            cpu.r[15] += 4;
+                log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, bl_opcode });
             } else {
-            self.stage[0] = cpu.fetch(u32, cpu.r[15]);
-            self.stage[1] = cpu.fetch(u32, cpu.r[15] + 4);
-            cpu.r[15] += 8;
+                log_str = try std.fmt.bufPrint(&buf, thumb_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, opcode });
+            }
+        } else {
+            log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, opcode });
         }
 
-        self.flushed = true;
+        _ = try file.writeAll(log_str);
     }
 };
 
+pub fn checkCond(cpsr: PSR, cond: u4) bool {
+    return switch (cond) {
+        0x0 => cpsr.z.read(), // EQ - Equal
+        0x1 => !cpsr.z.read(), // NE - Not equal
+        0x2 => cpsr.c.read(), // CS - Unsigned higher or same
+        0x3 => !cpsr.c.read(), // CC - Unsigned lower
+        0x4 => cpsr.n.read(), // MI - Negative
+        0x5 => !cpsr.n.read(), // PL - Positive or zero
+        0x6 => cpsr.v.read(), // VS - Overflow
+        0x7 => !cpsr.v.read(), // VC - No overflow
+        0x8 => cpsr.c.read() and !cpsr.z.read(), // HI - unsigned higher
+        0x9 => !cpsr.c.read() or cpsr.z.read(), // LS - unsigned lower or same
+        0xA => cpsr.n.read() == cpsr.v.read(), // GE - Greater or equal
+        0xB => cpsr.n.read() != cpsr.v.read(), // LT - Less than
+        0xC => !cpsr.z.read() and (cpsr.n.read() == cpsr.v.read()), // GT - Greater than
+        0xD => cpsr.z.read() or (cpsr.n.read() != cpsr.v.read()), // LE - Less than or equal
+        0xE => true, // AL - Always
+        0xF => false, // NV - Never (reserved in ARMv3 and up, but seems to have not changed?)
+    };
+}
+
 pub const PSR = extern union {
     mode: Bitfield(u32, 0, 5),
     t: Bit(u32, 5),
@@ -624,22 +641,6 @@ pub const PSR = extern union {
     z: Bit(u32, 30),
     n: Bit(u32, 31),
     raw: u32,
-
-    fn toString(self: PSR) void {
-        std.debug.print("[", .{});
-
-        if (self.n.read()) std.debug.print("N", .{}) else std.debug.print("-", .{});
-        if (self.z.read()) std.debug.print("Z", .{}) else std.debug.print("-", .{});
-        if (self.c.read()) std.debug.print("C", .{}) else std.debug.print("-", .{});
-        if (self.v.read()) std.debug.print("V", .{}) else std.debug.print("-", .{});
-        if (self.i.read()) std.debug.print("I", .{}) else std.debug.print("-", .{});
-        if (self.f.read()) std.debug.print("F", .{}) else std.debug.print("-", .{});
-        if (self.t.read()) std.debug.print("T", .{}) else std.debug.print("-", .{});
-        std.debug.print("|", .{});
-        if (getMode(self.mode.read())) |m| std.debug.print("{s}", .{m.toString()}) else std.debug.print("---", .{});
-
-        std.debug.print("]\n", .{});
-    }
 };
 
 const Mode = enum(u5) {
@@ -650,18 +651,11 @@ const Mode = enum(u5) {
     Abort = 0b10111,
     Undefined = 0b11011,
     System = 0b11111,
-
-    fn toString(self: Mode) []const u8 {
-        return switch (self) {
-            .User => "usr",
-            .Fiq => "fiq",
-            .Irq => "irq",
-            .Supervisor => "svc",
-            .Abort => "abt",
-            .Undefined => "und",
-            .System => "sys",
 };
-    }
+
+const BankedKind = enum(u1) {
+    R13 = 0,
+    R14,
 };
 
 fn getMode(bits: u5) ?Mode {

src/core/cpu/arm/block_data_transfer.zig

@@ -55,9 +55,8 @@ pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, c
 
                 if (L) {
                     cpu.r[15] = bus.read(u32, und_addr);
-                    cpu.pipe.reload(cpu);
                 } else {
-                    bus.write(u32, und_addr, cpu.r[15] + 4);
+                    bus.write(u32, und_addr, cpu.r[15] + 8);
                 }
 
                 cpu.r[rn] = if (U) cpu.r[rn] + 0x40 else cpu.r[rn] - 0x40;
@@ -87,23 +86,17 @@ pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, c
                     cpu.setUserModeRegister(i, bus.read(u32, address));
                 } else {
                     const value = bus.read(u32, address);
-
-                    cpu.r[i] = value;
-                    if (i == 0xF) {
-                        cpu.r[i] &= ~@as(u32, 3); // Align r15
-                        cpu.pipe.reload(cpu);
-
-                        if (S) cpu.setCpsr(cpu.spsr.raw);
-                    }
+                    cpu.r[i] = if (i == 0xF) value & 0xFFFF_FFFC else value;
+                    if (S and i == 0xF) cpu.setCpsr(cpu.spsr.raw);
                 }
             } else {
                 if (S) {
                     // Always Transfer User mode Registers
                     // This happens regardless if r15 is in the list
                     const value = cpu.getUserModeRegister(i);
-                    bus.write(u32, address, value + if (i == 0xF) 4 else @as(u32, 0)); // PC is already 8 ahead to make 12
+                    bus.write(u32, address, value + if (i == 0xF) 8 else @as(u32, 0)); // PC is already 4 ahead to make 12
                 } else {
-                    bus.write(u32, address, cpu.r[i] + if (i == 0xF) 4 else @as(u32, 0));
+                    bus.write(u32, address, cpu.r[i] + if (i == 0xF) 8 else @as(u32, 0));
                 }
             }
         }

src/core/cpu/arm/branch.zig

@@ -1,3 +1,5 @@
+const std = @import("std");
+
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;
@@ -7,20 +9,14 @@ const sext = @import("../../../util.zig").sext;
 pub fn branch(comptime L: bool) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
-            if (L) cpu.r[14] = cpu.r[15] - 4;
-
-            cpu.r[15] +%= sext(u32, u24, opcode) << 2;
-            cpu.pipe.reload(cpu);
+            if (L) cpu.r[14] = cpu.r[15];
+            cpu.r[15] = cpu.fakePC() +% (sext(u32, u24, opcode) << 2);
         }
     }.inner;
 }
 
 pub fn branchAndExchange(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
     const rn = opcode & 0xF;
-
-    const thumb = cpu.r[rn] & 1 == 1;
-    cpu.r[15] = cpu.r[rn] & if (thumb) ~@as(u32, 1) else ~@as(u32, 3);
-
-    cpu.cpsr.t.write(thumb);
-    cpu.pipe.reload(cpu);
+    cpu.cpsr.t.write(cpu.r[rn] & 1 == 1);
+    cpu.r[15] = cpu.r[rn] & 0xFFFF_FFFE;
 }

src/core/cpu/arm/data_processing.zig

@@ -2,10 +2,10 @@ const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;
 
-const exec = @import("../barrel_shifter.zig").exec;
-const ror = @import("../barrel_shifter.zig").ror;
+const rotateRight = @import("../barrel_shifter.zig").rotateRight;
+const execute = @import("../barrel_shifter.zig").execute;
 
-pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) InstrFn {
+pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
             const rd = @truncate(u4, opcode >> 12 & 0xF);
@@ -13,170 +13,269 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
             const old_carry = @boolToInt(cpu.cpsr.c.read());
 
             // If certain conditions are met, PC is 12 ahead instead of 8
-            // TODO: Why these conditions?
             if (!I and opcode >> 4 & 1 == 1) cpu.r[15] += 4;
-            const op1 = cpu.r[rn];
 
+            const op1 = if (rn == 0xF) cpu.fakePC() else cpu.r[rn];
+
+            var op2: u32 = undefined;
+            if (I) {
                 const amount = @truncate(u8, (opcode >> 8 & 0xF) << 1);
-            const op2 = if (I) ror(S, &cpu.cpsr, opcode & 0xFF, amount) else exec(S, cpu, opcode);
+                op2 = rotateRight(S, &cpu.cpsr, opcode & 0xFF, amount);
+            } else {
+                op2 = execute(S, cpu, opcode);
+            }
 
             // Undo special condition from above
             if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
 
-            var result: u32 = undefined;
-            var overflow: u1 = undefined;
-
-            // Perform Data Processing Logic
-            switch (kind) {
-                0x0 => result = op1 & op2, // AND
-                0x1 => result = op1 ^ op2, // EOR
-                0x2 => result = op1 -% op2, // SUB
-                0x3 => result = op2 -% op1, // RSB
-                0x4 => result = add(&overflow, op1, op2), // ADD
-                0x5 => result = adc(&overflow, op1, op2, old_carry), // ADC
-                0x6 => result = sbc(op1, op2, old_carry), // SBC
-                0x7 => result = sbc(op2, op1, old_carry), // RSC
+            switch (instrKind) {
+                0x0 => {
+                    // AND
+                    const result = op1 & op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
+                },
+                0x1 => {
+                    // EOR
+                    const result = op1 ^ op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
+                },
+                0x2 => {
+                    // SUB
+                    cpu.r[rd] = armSub(S, cpu, rd, op1, op2);
+                },
+                0x3 => {
+                    // RSB
+                    cpu.r[rd] = armSub(S, cpu, rd, op2, op1);
+                },
+                0x4 => {
+                    // ADD
+                    cpu.r[rd] = armAdd(S, cpu, rd, op1, op2);
+                },
+                0x5 => {
+                    // ADC
+                    cpu.r[rd] = armAdc(S, cpu, rd, op1, op2, old_carry);
+                },
+                0x6 => {
+                    // SBC
+                    cpu.r[rd] = armSbc(S, cpu, rd, op1, op2, old_carry);
+                },
+                0x7 => {
+                    // RSC
+                    cpu.r[rd] = armSbc(S, cpu, rd, op2, op1, old_carry);
+                },
                 0x8 => {
                     // TST
-                    if (rd == 0xF)
-                        return undefinedTestBehaviour(cpu);
+                    if (rd == 0xF) {
+                        undefinedTestBehaviour(cpu);
+                        return;
+                    }
 
-                    result = op1 & op2;
+                    const result = op1 & op2;
+                    setTestOpFlags(S, cpu, opcode, result);
                 },
                 0x9 => {
                     // TEQ
-                    if (rd == 0xF)
-                        return undefinedTestBehaviour(cpu);
+                    if (rd == 0xF) {
+                        undefinedTestBehaviour(cpu);
+                        return;
+                    }
 
-                    result = op1 ^ op2;
+                    const result = op1 ^ op2;
+                    setTestOpFlags(S, cpu, opcode, result);
                 },
                 0xA => {
                     // CMP
-                    if (rd == 0xF)
-                        return undefinedTestBehaviour(cpu);
+                    if (rd == 0xF) {
+                        undefinedTestBehaviour(cpu);
+                        return;
+                    }
 
-                    result = op1 -% op2;
+                    cmp(cpu, op1, op2);
                 },
                 0xB => {
                     // CMN
-                    if (rd == 0xF)
-                        return undefinedTestBehaviour(cpu);
-
-                    const tmp = @addWithOverflow(op1, op2);
-                    result = tmp[0];
-                    overflow = tmp[1];
-                },
-                0xC => result = op1 | op2, // ORR
-                0xD => result = op2, // MOV
-                0xE => result = op1 & ~op2, // BIC
-                0xF => result = ~op2, // MVN
-            }
-
-            // Write to Destination Register
-            switch (kind) {
-                0x8, 0x9, 0xA, 0xB => {}, // Test Operations
-                else => {
-                    cpu.r[rd] = result;
                     if (rd == 0xF) {
-                        if (S) cpu.setCpsr(cpu.spsr.raw);
-                        cpu.pipe.reload(cpu);
-                    }
-                },
+                        undefinedTestBehaviour(cpu);
+                        return;
                     }
 
-            // Write Flags
-            switch (kind) {
-                0x0, 0x1, 0xC, 0xD, 0xE, 0xF => if (S and rd != 0xF) {
-                    // Logic Operation Flags
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-                    // C set by Barrel Shifter, V is unaffected
-
+                    cmn(cpu, op1, op2);
                 },
-                0x2, 0x3 => if (S and rd != 0xF) {
-                    // SUB, RSB Flags
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-
-                    if (kind == 0x2) {
-                        // SUB specific
-                        cpu.cpsr.c.write(op2 <= op1);
-                        cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
-                    } else {
-                        // RSB Specific
-                        cpu.cpsr.c.write(op1 <= op2);
-                        cpu.cpsr.v.write(((op2 ^ result) & (~op1 ^ result)) >> 31 & 1 == 1);
-                    }
+                0xC => {
+                    // ORR
+                    const result = op1 | op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
                 },
-                0x4, 0x5 => if (S and rd != 0xF) {
-                    // ADD, ADC Flags
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-                    cpu.cpsr.c.write(overflow == 0b1);
-                    cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
+                0xD => {
+                    // MOV
+                    cpu.r[rd] = op2;
+                    setArmLogicOpFlags(S, cpu, rd, op2);
                 },
-                0x6, 0x7 => if (S and rd != 0xF) {
-                    // SBC, RSC Flags
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-
-                    if (kind == 0x6) {
-                        // SBC specific
-                        const subtrahend = @as(u64, op2) -% old_carry +% 1;
-                        cpu.cpsr.c.write(subtrahend <= op1);
-                        cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
-                    } else {
-                        // RSC Specific
-                        const subtrahend = @as(u64, op1) -% old_carry +% 1;
-                        cpu.cpsr.c.write(subtrahend <= op2);
-                        cpu.cpsr.v.write(((op2 ^ result) & (~op1 ^ result)) >> 31 & 1 == 1);
-                    }
+                0xE => {
+                    // BIC
+                    const result = op1 & ~op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
                 },
-                0x8, 0x9, 0xA, 0xB => {
-                    // Test Operation Flags
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-
-                    if (kind == 0xA) {
-                        // CMP specific
-                        cpu.cpsr.c.write(op2 <= op1);
-                        cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
-                    } else if (kind == 0xB) {
-                        // CMN specific
-                        cpu.cpsr.c.write(overflow == 0b1);
-                        cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
-                    } else {
-                        // TST, TEQ specific
-                        // Barrel Shifter should always calc CPSR C in TST
-                        if (!S) _ = exec(true, cpu, opcode);
-                    }
+                0xF => {
+                    // MVN
+                    const result = ~op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
                 },
             }
         }
     }.inner;
 }
 
-pub fn sbc(left: u32, right: u32, old_carry: u1) u32 {
+fn armSbc(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32, old_carry: u1) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = sbc(false, cpu, left, right, old_carry);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = sbc(S, cpu, left, right, old_carry);
+    }
+
+    return result;
+}
+
+pub fn sbc(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32, old_carry: u1) u32 {
     // TODO: Make your own version (thanks peach.bot)
     const subtrahend = @as(u64, right) -% old_carry +% 1;
-    const ret = @truncate(u32, left -% subtrahend);
+    const result = @truncate(u32, left -% subtrahend);
 
-    return ret;
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(subtrahend <= left);
+        cpu.cpsr.v.write(((left ^ result) & (~right ^ result)) >> 31 & 1 == 1);
     }
 
-pub fn add(overflow: *u1, left: u32, right: u32) u32 {
-    const ret = @addWithOverflow(left, right);
-    overflow.* = ret[1];
-
-    return ret[0];
+    return result;
 }
 
-pub fn adc(overflow: *u1, left: u32, right: u32, old_carry: u1) u32 {
-    const tmp = @addWithOverflow(left, right);
-    const ret = @addWithOverflow(tmp[0], old_carry);
-    overflow.* = tmp[1] | ret[1];
+fn armSub(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = sub(false, cpu, left, right);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = sub(S, cpu, left, right);
+    }
 
-    return ret[0];
+    return result;
+}
+
+pub fn sub(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32) u32 {
+    const result = left -% right;
+
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(right <= left);
+        cpu.cpsr.v.write(((left ^ result) & (~right ^ result)) >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+fn armAdd(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = add(false, cpu, left, right);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = add(S, cpu, left, right);
+    }
+
+    return result;
+}
+
+pub fn add(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32) u32 {
+    var result: u32 = undefined;
+    const didOverflow = @addWithOverflow(u32, left, right, &result);
+
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(didOverflow);
+        cpu.cpsr.v.write(((left ^ result) & (right ^ result)) >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+fn armAdc(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32, old_carry: u1) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = adc(false, cpu, left, right, old_carry);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = adc(S, cpu, left, right, old_carry);
+    }
+
+    return result;
+}
+
+pub fn adc(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32, old_carry: u1) u32 {
+    var result: u32 = undefined;
+    const did = @addWithOverflow(u32, left, right, &result);
+    const overflow = @addWithOverflow(u32, result, old_carry, &result);
+
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(did or overflow);
+        cpu.cpsr.v.write(((left ^ result) & (right ^ result)) >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+pub fn cmp(cpu: *Arm7tdmi, left: u32, right: u32) void {
+    const result = left -% right;
+
+    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+    cpu.cpsr.z.write(result == 0);
+    cpu.cpsr.c.write(right <= left);
+    cpu.cpsr.v.write(((left ^ result) & (~right ^ result)) >> 31 & 1 == 1);
+}
+
+pub fn cmn(cpu: *Arm7tdmi, left: u32, right: u32) void {
+    var result: u32 = undefined;
+    const didOverflow = @addWithOverflow(u32, left, right, &result);
+
+    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+    cpu.cpsr.z.write(result == 0);
+    cpu.cpsr.c.write(didOverflow);
+    cpu.cpsr.v.write(((left ^ result) & (right ^ result)) >> 31 & 1 == 1);
+}
+
+fn setArmLogicOpFlags(comptime S: bool, cpu: *Arm7tdmi, rd: u4, result: u32) void {
+    if (S and rd == 0xF) {
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        setLogicOpFlags(S, cpu, result);
+    }
+}
+
+pub fn setLogicOpFlags(comptime S: bool, cpu: *Arm7tdmi, result: u32) void {
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        // C set by Barrel Shifter, V is unaffected
+    }
+}
+
+fn setTestOpFlags(comptime S: bool, cpu: *Arm7tdmi, opcode: u32, result: u32) void {
+    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+    cpu.cpsr.z.write(result == 0);
+    // Barrel Shifter should always calc CPSR C in TST
+    if (!S) _ = execute(true, cpu, opcode);
 }
 
 fn undefinedTestBehaviour(cpu: *Arm7tdmi) void {

src/core/cpu/arm/half_signed_data_transfer.zig

@@ -1,3 +1,5 @@
+const std = @import("std");
+
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;
@@ -13,8 +15,20 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
             const rm = opcode & 0xF;
             const imm_offset_high = opcode >> 8 & 0xF;
 
-            const base = cpu.r[rn] + if (!L and rn == 0xF) 4 else @as(u32, 0);
-            const offset = if (I) imm_offset_high << 4 | rm else cpu.r[rm];
+            var base: u32 = undefined;
+            if (rn == 0xF) {
+                base = cpu.fakePC();
+                if (!L) base += 4;
+            } else {
+                base = cpu.r[rn];
+            }
+
+            var offset: u32 = undefined;
+            if (I) {
+                offset = imm_offset_high << 4 | rm;
+            } else {
+                offset = cpu.r[rm];
+            }
 
             const modified_base = if (U) base +% offset else base -% offset;
             var address = if (P) modified_base else base;
@@ -33,8 +47,11 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
                     },
                     0b11 => {
                         // LDRSH
-                        const value = bus.read(u16, address);
-                        result = if (address & 1 == 1) sext(u32, u8, @truncate(u8, value >> 8)) else sext(u32, u16, value);
+                        result = if (address & 1 == 1) blk: {
+                            break :blk sext(u32, u8, bus.read(u8, address));
+                        } else blk: {
+                            break :blk sext(u32, u16, bus.read(u16, address));
+                        };
                     },
                     0b00 => unreachable, // SWP
                 }

src/core/cpu/arm/single_data_swap.zig

@@ -1,3 +1,5 @@
+const std = @import("std");
+
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;

src/core/cpu/arm/single_data_transfer.zig

@@ -1,3 +1,6 @@
+const std = @import("std");
+const util = @import("../../../util.zig");
+
 const shifter = @import("../barrel_shifter.zig");
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
@@ -11,8 +14,15 @@ pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool,
             const rn = opcode >> 16 & 0xF;
             const rd = opcode >> 12 & 0xF;
 
-            const base = cpu.r[rn];
-            const offset = if (I) shifter.immediate(false, cpu, opcode) else opcode & 0xFFF;
+            var base: u32 = undefined;
+            if (rn == 0xF) {
+                base = cpu.fakePC();
+                if (!L) base += 4; // Offset of 12
+            } else {
+                base = cpu.r[rn];
+            }
+
+            const offset = if (I) shifter.immShift(false, cpu, opcode) else opcode & 0xFFF;
 
             const modified_base = if (U) base +% offset else base -% offset;
             var address = if (P) modified_base else base;
@@ -30,26 +40,18 @@ pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool,
             } else {
                 if (B) {
                     // STRB
-                    const value = cpu.r[rd] + if (rd == 0xF) 4 else @as(u32, 0); // PC is 12 ahead
+                    const value = if (rd == 0xF) cpu.r[rd] + 8 else cpu.r[rd];
                     bus.write(u8, address, @truncate(u8, value));
                 } else {
                     // STR
-                    const value = cpu.r[rd] + if (rd == 0xF) 4 else @as(u32, 0);
+                    const value = if (rd == 0xF) cpu.r[rd] + 8 else cpu.r[rd];
                     bus.write(u32, address, value);
                 }
             }
 
             address = modified_base;
-            if (W and P or !P) {
-                cpu.r[rn] = address;
-                if (rn == 0xF) cpu.pipe.reload(cpu);
-            }
-
-            if (L) {
-                // This emulates the LDR rd == rn behaviour
-                cpu.r[rd] = result;
-                if (rd == 0xF) cpu.pipe.reload(cpu);
-            }
+            if (W and P or !P) cpu.r[rn] = address;
+            if (L) cpu.r[rd] = result; // This emulates the LDR rd == rn behaviour
         }
     }.inner;
 }

src/core/cpu/arm/software_interrupt.zig

@@ -6,7 +6,7 @@ pub fn armSoftwareInterrupt() InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, _: u32) void {
             // Copy Values from Current Mode
-            const ret_addr = cpu.r[15] - 4;
+            const r15 = cpu.r[15];
             const cpsr = cpu.cpsr.raw;
 
             // Switch Mode
@@ -14,10 +14,9 @@ pub fn armSoftwareInterrupt() InstrFn {
             cpu.cpsr.t.write(false); // Force ARM Mode
             cpu.cpsr.i.write(true); // Disable normal interrupts
 
-            cpu.r[14] = ret_addr; // Resume Execution
+            cpu.r[14] = r15; // Resume Execution
             cpu.spsr.raw = cpsr; // Previous mode CPSR
             cpu.r[15] = 0x0000_0008;
-            cpu.pipe.reload(cpu);
         }
     }.inner;
 }

src/core/cpu/barrel_shifter.zig

@@ -1,35 +1,41 @@
+const std = @import("std");
+
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
 const CPSR = @import("../cpu.zig").PSR;
 
 const rotr = @import("../../util.zig").rotr;
 
-pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
+pub fn execute(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
     var result: u32 = undefined;
     if (opcode >> 4 & 1 == 1) {
-        result = register(S, cpu, opcode);
+        result = registerShift(S, cpu, opcode);
     } else {
-        result = immediate(S, cpu, opcode);
+        result = immShift(S, cpu, opcode);
     }
 
     return result;
 }
 
-fn register(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
+fn registerShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
     const rs_idx = opcode >> 8 & 0xF;
-    const rm = cpu.r[opcode & 0xF];
     const rs = @truncate(u8, cpu.r[rs_idx]);
 
+    const rm_idx = opcode & 0xF;
+    const rm = if (rm_idx == 0xF) cpu.fakePC() else cpu.r[rm_idx];
+
     return switch (@truncate(u2, opcode >> 5)) {
-        0b00 => lsl(S, &cpu.cpsr, rm, rs),
-        0b01 => lsr(S, &cpu.cpsr, rm, rs),
-        0b10 => asr(S, &cpu.cpsr, rm, rs),
-        0b11 => ror(S, &cpu.cpsr, rm, rs),
+        0b00 => logicalLeft(S, &cpu.cpsr, rm, rs),
+        0b01 => logicalRight(S, &cpu.cpsr, rm, rs),
+        0b10 => arithmeticRight(S, &cpu.cpsr, rm, rs),
+        0b11 => rotateRight(S, &cpu.cpsr, rm, rs),
     };
 }
 
-pub fn immediate(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
+pub fn immShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
     const amount = @truncate(u8, opcode >> 7 & 0x1F);
-    const rm = cpu.r[opcode & 0xF];
+
+    const rm_idx = opcode & 0xF;
+    const rm = if (rm_idx == 0xF) cpu.fakePC() else cpu.r[rm_idx];
 
     var result: u32 = undefined;
     if (amount == 0) {
@@ -58,17 +64,17 @@ pub fn immediate(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
         }
     } else {
         switch (@truncate(u2, opcode >> 5)) {
-            0b00 => result = lsl(S, &cpu.cpsr, rm, amount),
-            0b01 => result = lsr(S, &cpu.cpsr, rm, amount),
-            0b10 => result = asr(S, &cpu.cpsr, rm, amount),
-            0b11 => result = ror(S, &cpu.cpsr, rm, amount),
+            0b00 => result = logicalLeft(S, &cpu.cpsr, rm, amount),
+            0b01 => result = logicalRight(S, &cpu.cpsr, rm, amount),
+            0b10 => result = arithmeticRight(S, &cpu.cpsr, rm, amount),
+            0b11 => result = rotateRight(S, &cpu.cpsr, rm, amount),
         }
     }
 
     return result;
 }
 
-pub fn lsl(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
+pub fn logicalLeft(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
     const amount = @truncate(u5, total_amount);
     const bit_count: u8 = @typeInfo(u32).Int.bits;
 
@@ -95,7 +101,7 @@ pub fn lsl(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
     return result;
 }
 
-pub fn lsr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
+pub fn logicalRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
     const amount = @truncate(u5, total_amount);
     const bit_count: u8 = @typeInfo(u32).Int.bits;
 
@@ -119,7 +125,7 @@ pub fn lsr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
     return result;
 }
 
-pub fn asr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
+pub fn arithmeticRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
     const amount = @truncate(u5, total_amount);
     const bit_count: u8 = @typeInfo(u32).Int.bits;
 
@@ -136,7 +142,7 @@ pub fn asr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
     return result;
 }
 
-pub fn ror(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
+pub fn rotateRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
     const result = rotr(u32, rm, total_amount);
 
     if (S and total_amount != 0) {

src/core/cpu/thumb/alu.zig

@@ -4,11 +4,16 @@ const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
 
 const adc = @import("../arm/data_processing.zig").adc;
 const sbc = @import("../arm/data_processing.zig").sbc;
+const sub = @import("../arm/data_processing.zig").sub;
+const cmp = @import("../arm/data_processing.zig").cmp;
+const cmn = @import("../arm/data_processing.zig").cmn;
+const setTestOpFlags = @import("../arm/data_processing.zig").setTestOpFlags;
+const setLogicOpFlags = @import("../arm/data_processing.zig").setLogicOpFlags;
 
-const lsl = @import("../barrel_shifter.zig").lsl;
-const lsr = @import("../barrel_shifter.zig").lsr;
-const asr = @import("../barrel_shifter.zig").asr;
-const ror = @import("../barrel_shifter.zig").ror;
+const logicalLeft = @import("../barrel_shifter.zig").logicalLeft;
+const logicalRight = @import("../barrel_shifter.zig").logicalRight;
+const arithmeticRight = @import("../barrel_shifter.zig").arithmeticRight;
+const rotateRight = @import("../barrel_shifter.zig").rotateRight;
 
 pub fn fmt4(comptime op: u4) InstrFn {
     return struct {
@@ -17,91 +22,96 @@ pub fn fmt4(comptime op: u4) InstrFn {
             const rd = opcode & 0x7;
             const carry = @boolToInt(cpu.cpsr.c.read());
 
-            const op1 = cpu.r[rd];
-            const op2 = cpu.r[rs];
-
-            var result: u32 = undefined;
-            var overflow: u1 = undefined;
-
             switch (op) {
-                0x0 => result = op1 & op2, // AND
-                0x1 => result = op1 ^ op2, // EOR
-                0x2 => result = lsl(true, &cpu.cpsr, op1, @truncate(u8, op2)), // LSL
-                0x3 => result = lsr(true, &cpu.cpsr, op1, @truncate(u8, op2)), // LSR
-                0x4 => result = asr(true, &cpu.cpsr, op1, @truncate(u8, op2)), // ASR
-                0x5 => result = adc(&overflow, op1, op2, carry), // ADC
-                0x6 => result = sbc(op1, op2, carry), // SBC
-                0x7 => result = ror(true, &cpu.cpsr, op1, @truncate(u8, op2)), // ROR
-                0x8 => result = op1 & op2, // TST
-                0x9 => result = 0 -% op2, // NEG
-                0xA => result = op1 -% op2, // CMP
-                0xB => {
-                    // CMN
-                    const tmp = @addWithOverflow(op1, op2);
-                    result = tmp[0];
-                    overflow = tmp[1];
+                0x0 => {
+                    // AND
+                    const result = cpu.r[rd] & cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
                 },
-                0xC => result = op1 | op2, // ORR
-                0xD => result = @truncate(u32, @as(u64, op2) * @as(u64, op1)),
-                0xE => result = op1 & ~op2,
-                0xF => result = ~op2,
-            }
-
-            // Write to Destination Register
-            switch (op) {
-                0x8, 0xA, 0xB => {},
-                else => cpu.r[rd] = result,
-            }
-
-            // Write Flags
-            switch (op) {
-                0x0, 0x1, 0x2, 0x3, 0x4, 0x7, 0xC, 0xE, 0xF => {
-                    // Logic Operations
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-                    // C set by Barrel Shifter, V is unaffected
+                0x1 => {
+                    // EOR
+                    const result = cpu.r[rd] ^ cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
                 },
-                0x8, 0xA => {
-                    // Test Flags
-                    // CMN (0xB) is handled with ADC
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-
-                    if (op == 0xA) {
-                        // CMP specific
-                        cpu.cpsr.c.write(op2 <= op1);
-                        cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
-                    }
+                0x2 => {
+                    // LSL
+                    const result = logicalLeft(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
                 },
-                0x5, 0xB => {
-                    // ADC, CMN
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-                    cpu.cpsr.c.write(overflow == 0b1);
-                    cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
+                0x3 => {
+                    // LSR
+                    const result = logicalRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x4 => {
+                    // ASR
+                    const result = arithmeticRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x5 => {
+                    // ADC
+                    cpu.r[rd] = adc(true, cpu, cpu.r[rd], cpu.r[rs], carry);
                 },
                 0x6 => {
                     // SBC
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-
-                    const subtrahend = @as(u64, op2) -% carry +% 1;
-                    cpu.cpsr.c.write(subtrahend <= op1);
-                    cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
+                    cpu.r[rd] = sbc(true, cpu, cpu.r[rd], cpu.r[rs], carry);
+                },
+                0x7 => {
+                    // ROR
+                    const result = rotateRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x8 => {
+                    // TST
+                    const result = cpu.r[rd] & cpu.r[rs];
+                    setLogicOpFlags(true, cpu, result);
                 },
                 0x9 => {
                     // NEG
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-                    cpu.cpsr.c.write(op2 <= 0);
-                    cpu.cpsr.v.write(((0 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
+                    cpu.r[rd] = sub(true, cpu, 0, cpu.r[rs]);
+                },
+                0xA => {
+                    // CMP
+                    cmp(cpu, cpu.r[rd], cpu.r[rs]);
+                },
+                0xB => {
+                    // CMN
+                    cmn(cpu, cpu.r[rd], cpu.r[rs]);
+                },
+                0xC => {
+                    // ORR
+                    const result = cpu.r[rd] | cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
                 },
                 0xD => {
-                    // Multiplication
+                    // MUL
+                    const temp = @as(u64, cpu.r[rs]) * @as(u64, cpu.r[rd]);
+                    const result = @truncate(u32, temp);
+                    cpu.r[rd] = result;
+
                     cpu.cpsr.n.write(result >> 31 & 1 == 1);
                     cpu.cpsr.z.write(result == 0);
                     // V is unaffected, assuming similar behaviour to ARMv4 MUL C is undefined
                 },
+                0xE => {
+                    // BIC
+                    const result = cpu.r[rd] & ~cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0xF => {
+                    // MVN
+                    const result = ~cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
             }
         }
     }.inner;

src/core/cpu/thumb/block_data_transfer.zig

@@ -33,8 +33,7 @@ pub fn fmt14(comptime L: bool, comptime R: bool) InstrFn {
             if (R) {
                 if (L) {
                     const value = bus.read(u32, address);
-                    cpu.r[15] = value & ~@as(u32, 1);
-                    cpu.pipe.reload(cpu);
+                    cpu.r[15] = value & 0xFFFF_FFFE;
                 } else {
                     bus.write(u32, address, cpu.r[14]);
                 }
@@ -53,13 +52,7 @@ pub fn fmt15(comptime L: bool, comptime rb: u3) InstrFn {
             const end_address = cpu.r[rb] + 4 * countRlist(opcode);
 
             if (opcode & 0xFF == 0) {
-                if (L) {
-                    cpu.r[15] = bus.read(u32, address);
-                    cpu.pipe.reload(cpu);
-                } else {
-                    bus.write(u32, address, cpu.r[15] + 2);
-                }
-
+                if (L) cpu.r[15] = bus.read(u32, address) else bus.write(u32, address, cpu.r[15] + 4);
                 cpu.r[rb] += 0x40;
                 return;
             }
@@ -92,7 +85,8 @@ pub fn fmt15(comptime L: bool, comptime rb: u3) InstrFn {
 inline fn countRlist(opcode: u16) u32 {
     var count: u32 = 0;
 
-    inline for (0..8) |i| {
+    comptime var i: u4 = 0;
+    inline while (i < 8) : (i += 1) {
         if (opcode >> (7 - i) & 1 == 1) count += 1;
     }
 

src/core/cpu/thumb/branch.zig

@@ -9,13 +9,16 @@ pub fn fmt16(comptime cond: u4) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
             // B
-            if (cond == 0xE or cond == 0xF)
-                cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond});
+            const offset = sext(u32, u8, opcode & 0xFF) << 1;
 
-            if (!checkCond(cpu.cpsr, cond)) return;
+            const should_execute = switch (cond) {
+                0xE, 0xF => cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond}),
+                else => checkCond(cpu.cpsr, cond),
+            };
 
-            cpu.r[15] +%= sext(u32, u8, opcode & 0xFF) << 1;
-            cpu.pipe.reload(cpu);
+            if (should_execute) {
+                cpu.r[15] = (cpu.r[15] + 2) +% offset;
+            }
         }
     }.inner;
 }
@@ -24,8 +27,8 @@ pub fn fmt18() InstrFn {
     return struct {
         // B but conditional
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
-            cpu.r[15] +%= sext(u32, u11, opcode & 0x7FF) << 1;
-            cpu.pipe.reload(cpu);
+            const offset = sext(u32, u11, opcode & 0x7FF) << 1;
+            cpu.r[15] = (cpu.r[15] + 2) +% offset;
         }
     }.inner;
 }
@@ -38,16 +41,13 @@ pub fn fmt19(comptime is_low: bool) InstrFn {
 
             if (is_low) {
                 // Instruction 2
-                const next_opcode = cpu.r[15] - 2;
+                const old_pc = cpu.r[15];
 
                 cpu.r[15] = cpu.r[14] +% (offset << 1);
-                cpu.r[14] = next_opcode | 1;
-
-                cpu.pipe.reload(cpu);
+                cpu.r[14] = old_pc | 1;
             } else {
                 // Instruction 1
-                const lr_offset = sext(u32, u11, offset) << 12;
-                cpu.r[14] = (cpu.r[15] +% lr_offset) & ~@as(u32, 1);
+                cpu.r[14] = (cpu.r[15] + 2) +% (sext(u32, u11, offset) << 12);
             }
         }
     }.inner;

src/core/cpu/thumb/data_processing.zig

@@ -1,12 +1,16 @@
+const std = @import("std");
+
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
+const shifter = @import("../barrel_shifter.zig");
 
 const add = @import("../arm/data_processing.zig").add;
+const sub = @import("../arm/data_processing.zig").sub;
+const cmp = @import("../arm/data_processing.zig").cmp;
+const setLogicOpFlags = @import("../arm/data_processing.zig").setLogicOpFlags;
 
-const lsl = @import("../barrel_shifter.zig").lsl;
-const lsr = @import("../barrel_shifter.zig").lsr;
-const asr = @import("../barrel_shifter.zig").asr;
+const log = std.log.scoped(.Thumb1);
 
 pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
     return struct {
@@ -20,7 +24,7 @@ pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
                     if (offset == 0) {
                         break :blk cpu.r[rs];
                     } else {
-                        break :blk lsl(true, &cpu.cpsr, cpu.r[rs], offset);
+                        break :blk shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rs], offset);
                     }
                 },
                 0b01 => blk: {
@@ -29,7 +33,7 @@ pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
                         cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
                         break :blk @as(u32, 0);
                     } else {
-                        break :blk lsr(true, &cpu.cpsr, cpu.r[rs], offset);
+                        break :blk shifter.logicalRight(true, &cpu.cpsr, cpu.r[rs], offset);
                     }
                 },
                 0b10 => blk: {
@@ -38,7 +42,7 @@ pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
                         cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
                         break :blk @bitCast(u32, @bitCast(i32, cpu.r[rs]) >> 31);
                     } else {
-                        break :blk asr(true, &cpu.cpsr, cpu.r[rs], offset);
+                        break :blk shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rs], offset);
                     }
                 },
                 else => cpu.panic("[CPU/THUMB.1] 0b{b:0>2} is not a valid op", .{op}),
@@ -46,10 +50,7 @@ pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
 
             // Equivalent to an ARM MOVS
             cpu.r[rd] = result;
-
-            // Write Flags
-            cpu.cpsr.n.write(result >> 31 & 1 == 1);
-            cpu.cpsr.z.write(result == 0);
+            setLogicOpFlags(true, cpu, result);
         }
     }.inner;
 }
@@ -57,51 +58,28 @@ pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
 pub fn fmt5(comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
-            const rs = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
-            const rd = @as(u4, h1) << 3 | (opcode & 0x7);
+            const src_idx = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
+            const dst_idx = @as(u4, h1) << 3 | (opcode & 0x7);
 
-            const op1 = cpu.r[rd];
-            const op2 = cpu.r[rs];
+            const src = if (src_idx == 0xF) (cpu.r[src_idx] + 2) & 0xFFFF_FFFE else cpu.r[src_idx];
+            const dst = if (dst_idx == 0xF) (cpu.r[dst_idx] + 2) & 0xFFFF_FFFE else cpu.r[dst_idx];
 
-            var result: u32 = undefined;
-            var overflow: u1 = undefined;
             switch (op) {
-                0b00 => result = add(&overflow, op1, op2), // ADD
-                0b01 => result = op1 -% op2, // CMP
-                0b10 => result = op2, // MOV
-                0b11 => {},
-            }
-
-            // Write to Destination Register
-            switch (op) {
-                0b01 => {}, // Test Instruction
+                0b00 => {
+                    // ADD
+                    const sum = add(false, cpu, dst, src);
+                    cpu.r[dst_idx] = if (dst_idx == 0xF) sum & 0xFFFF_FFFE else sum;
+                },
+                0b01 => cmp(cpu, dst, src), // CMP
+                0b10 => {
+                    // MOV
+                    cpu.r[dst_idx] = if (dst_idx == 0xF) src & 0xFFFF_FFFE else src;
+                },
                 0b11 => {
                     // BX
-                    const is_thumb = op2 & 1 == 1;
-                    cpu.r[15] = op2 & ~@as(u32, 1);
-
-                    cpu.cpsr.t.write(is_thumb);
-                    cpu.pipe.reload(cpu);
+                    cpu.cpsr.t.write(src & 1 == 1);
+                    cpu.r[15] = src & 0xFFFF_FFFE;
                 },
-                else => {
-                    cpu.r[rd] = result;
-                    if (rd == 0xF) {
-                        cpu.r[15] &= ~@as(u32, 1);
-                        cpu.pipe.reload(cpu);
-                    }
-                },
-            }
-
-            // Write Flags
-            switch (op) {
-                0b01 => {
-                    // CMP
-                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                    cpu.cpsr.z.write(result == 0);
-                    cpu.cpsr.c.write(op2 <= op1);
-                    cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
-                },
-                0b00, 0b10, 0b11 => {}, // MOV and Branch Instruction
             }
         }
     }.inner;
@@ -112,28 +90,21 @@ pub fn fmt2(comptime I: bool, is_sub: bool, rn: u3) InstrFn {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
             const rs = opcode >> 3 & 0x7;
             const rd = @truncate(u3, opcode);
-            const op1 = cpu.r[rs];
-            const op2: u32 = if (I) rn else cpu.r[rn];
 
             if (is_sub) {
                 // SUB
-                const result = op1 -% op2;
-                cpu.r[rd] = result;
-
-                cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                cpu.cpsr.z.write(result == 0);
-                cpu.cpsr.c.write(op2 <= op1);
-                cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
+                cpu.r[rd] = if (I) blk: {
+                    break :blk sub(true, cpu, cpu.r[rs], rn);
+                } else blk: {
+                    break :blk sub(true, cpu, cpu.r[rs], cpu.r[rn]);
+                };
             } else {
                 // ADD
-                var overflow: u1 = undefined;
-                const result = add(&overflow, op1, op2);
-                cpu.r[rd] = result;
-
-                cpu.cpsr.n.write(result >> 31 & 1 == 1);
-                cpu.cpsr.z.write(result == 0);
-                cpu.cpsr.c.write(overflow == 0b1);
-                cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
+                cpu.r[rd] = if (I) blk: {
+                    break :blk add(true, cpu, cpu.r[rs], rn);
+                } else blk: {
+                    break :blk add(true, cpu, cpu.r[rs], cpu.r[rn]);
+                };
             }
         }
     }.inner;
@@ -142,36 +113,17 @@ pub fn fmt2(comptime I: bool, is_sub: bool, rn: u3) InstrFn {
 pub fn fmt3(comptime op: u2, comptime rd: u3) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
-            const op1 = cpu.r[rd];
-            const op2: u32 = opcode & 0xFF; // Offset
-
-            var overflow: u1 = undefined;
-            const result: u32 = switch (op) {
-                0b00 => op2, // MOV
-                0b01 => op1 -% op2, // CMP
-                0b10 => add(&overflow, op1, op2), // ADD
-                0b11 => op1 -% op2, // SUB
-            };
-
-            // Write to Register
-            if (op != 0b01) cpu.r[rd] = result;
-
-            // Write Flags
-            cpu.cpsr.n.write(result >> 31 & 1 == 1);
-            cpu.cpsr.z.write(result == 0);
+            const offset = @truncate(u8, opcode);
 
             switch (op) {
-                0b00 => {}, // MOV | C set by Barrel Shifter, V is unaffected
-                0b01, 0b11 => {
-                    // SUB, CMP
-                    cpu.cpsr.c.write(op2 <= op1);
-                    cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
-                },
-                0b10 => {
-                    // ADD
-                    cpu.cpsr.c.write(overflow == 0b1);
-                    cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
+                0b00 => {
+                    // MOV
+                    cpu.r[rd] = offset;
+                    setLogicOpFlags(true, cpu, offset);
                 },
+                0b01 => cmp(cpu, cpu.r[rd], offset), // CMP
+                0b10 => cpu.r[rd] = add(true, cpu, cpu.r[rd], offset), // ADD
+                0b11 => cpu.r[rd] = sub(true, cpu, cpu.r[rd], offset), // SUB
             }
         }
     }.inner;
@@ -181,9 +133,10 @@ pub fn fmt12(comptime isSP: bool, comptime rd: u3) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
             // ADD
-            const left = if (isSP) cpu.r[13] else cpu.r[15] & ~@as(u32, 2);
+            const left = if (isSP) cpu.r[13] else (cpu.r[15] + 2) & 0xFFFF_FFFD;
             const right = (opcode & 0xFF) << 2;
-            cpu.r[rd] = left + right;
+            const result = left + right;
+            cpu.r[rd] = result;
         }
     }.inner;
 }

src/core/cpu/thumb/data_transfer.zig

@@ -1,3 +1,5 @@
+const std = @import("std");
+
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
@@ -10,9 +12,7 @@ pub fn fmt6(comptime rd: u3) InstrFn {
         fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
             // LDR
             const offset = (opcode & 0xFF) << 2;
-
-            // Bit 1 of the PC intentionally ignored
-            cpu.r[rd] = bus.read(u32, (cpu.r[15] & ~@as(u32, 2)) + offset);
+            cpu.r[rd] = bus.read(u32, (cpu.r[15] + 2 & 0xFFFF_FFFD) + offset);
         }
     }.inner;
 }
@@ -44,8 +44,11 @@ pub fn fmt78(comptime op: u2, comptime T: bool) InstrFn {
                     },
                     0b11 => {
                         // LDRSH
-                        const value = bus.read(u16, address);
-                        cpu.r[rd] = if (address & 1 == 1) sext(u32, u8, @truncate(u8, value >> 8)) else sext(u32, u16, value);
+                        cpu.r[rd] = if (address & 1 == 1) blk: {
+                            break :blk sext(u32, u8, bus.read(u8, address));
+                        } else blk: {
+                            break :blk sext(u32, u16, bus.read(u16, address));
+                        };
                     },
                 }
             } else {

src/core/cpu/thumb/software_interrupt.zig

@@ -6,7 +6,7 @@ pub fn fmt17() InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, _: u16) void {
             // Copy Values from Current Mode
-            const ret_addr = cpu.r[15] - 2;
+            const r15 = cpu.r[15];
             const cpsr = cpu.cpsr.raw;
 
             // Switch Mode
@@ -14,10 +14,9 @@ pub fn fmt17() InstrFn {
             cpu.cpsr.t.write(false); // Force ARM Mode
             cpu.cpsr.i.write(true); // Disable normal interrupts
 
-            cpu.r[14] = ret_addr; // Resume Execution
+            cpu.r[14] = r15; // Resume Execution
             cpu.spsr.raw = cpsr; // Previous mode CPSR
             cpu.r[15] = 0x0000_0008;
-            cpu.pipe.reload(cpu);
         }
     }.inner;
 }

src/core/emu.zig

@@ -2,29 +2,29 @@ const std = @import("std");
 const SDL = @import("sdl2");
 const config = @import("../config.zig");
 
+const Bus = @import("Bus.zig");
 const Scheduler = @import("scheduler.zig").Scheduler;
 const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
 const FpsTracker = @import("../util.zig").FpsTracker;
+const FilePaths = @import("../util.zig").FilePaths;
 
 const Timer = std.time.Timer;
+const Thread = std.Thread;
 const Atomic = std.atomic.Atomic;
+const Allocator = std.mem.Allocator;
 
-/// 4 Cycles in 1 dot
-const cycles_per_dot = 4;
+// 228 Lines which consist of 308 dots (which are 4 cycles long)
+const cycles_per_frame: u64 = 228 * (308 * 4); //280896
+const clock_rate: u64 = 1 << 24; // 16.78MHz
 
-/// The GBA draws 228 Horizontal which each consist 308 dots
-/// (note: not all lines are visible)
-const cycles_per_frame = 228 * (308 * cycles_per_dot); //280896
+// TODO: Don't truncate this, be more accurate w/ timing
+// 59.6046447754ns (truncated to just 59ns)
+const clock_period: u64 = std.time.ns_per_s / clock_rate;
+const frame_period = (clock_period * cycles_per_frame);
 
-/// The GBA ARM7TDMI runs at 2^24 Hz
-const clock_rate = 1 << 24; // 16.78MHz
-
-/// The # of nanoseconds a frame should take
-const frame_period = (std.time.ns_per_s * cycles_per_frame) / clock_rate;
-
-/// Exact Value:  59.7275005696Hz
-/// The inverse of the frame period
-pub const frame_rate: f64 = @intToFloat(f64, clock_rate) / cycles_per_frame;
+// 59.7275005696Hz
+pub const frame_rate = @intToFloat(f64, std.time.ns_per_s) /
+    ((@intToFloat(f64, std.time.ns_per_s) / @intToFloat(f64, clock_rate)) * @intToFloat(f64, cycles_per_frame));
 
 const log = std.log.scoped(.Emulation);
 
@@ -36,7 +36,7 @@ const RunKind = enum {
 };
 
 pub fn run(quit: *Atomic(bool), scheduler: *Scheduler, cpu: *Arm7tdmi, tracker: *FpsTracker) void {
-    const audio_sync = config.config().guest.audio_sync and !config.config().host.mute;
+    const audio_sync = config.config().guest.audio_sync;
     if (audio_sync) log.info("Audio sync enabled", .{});
 
     if (config.config().guest.video_sync) {
@@ -56,7 +56,7 @@ fn inner(comptime kind: RunKind, audio_sync: bool, quit: *Atomic(bool), schedule
         .Unlimited, .UnlimitedFPS => {
             log.info("Emulation w/out video sync", .{});
 
-            while (!quit.load(.Monotonic)) {
+            while (!quit.load(.SeqCst)) {
                 runFrame(scheduler, cpu);
                 audioSync(audio_sync, cpu.bus.apu.stream, &cpu.bus.apu.is_buffer_full);
 
@@ -68,7 +68,7 @@ fn inner(comptime kind: RunKind, audio_sync: bool, quit: *Atomic(bool), schedule
             var timer = Timer.start() catch @panic("failed to initalize std.timer.Timer");
             var wake_time: u64 = frame_period;
 
-            while (!quit.load(.Monotonic)) {
+            while (!quit.load(.SeqCst)) {
                 runFrame(scheduler, cpu);
                 const new_wake_time = videoSync(&timer, wake_time);
 
@@ -94,7 +94,7 @@ pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
         if (!cpu.stepDmaTransfer()) {
             if (cpu.isHalted()) {
                 // Fast-forward to next Event
-                sched.tick = sched.nextTimestamp();
+                sched.tick = sched.queue.peek().?.tick;
             } else {
                 cpu.step();
             }
@@ -105,7 +105,6 @@ pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
 }
 
 fn audioSync(audio_sync: bool, stream: *SDL.SDL_AudioStream, is_buffer_full: *bool) void {
-    comptime std.debug.assert(@import("../platform.zig").sample_format == SDL.AUDIO_U16);
     const sample_size = 2 * @sizeOf(u16);
     const max_buf_size: c_int = 0x400;
 
@@ -133,10 +132,11 @@ fn videoSync(timer: *Timer, wake_time: u64) u64 {
 
 // TODO: Better sleep impl?
 fn sleep(timer: *Timer, wake_time: u64) ?u64 {
+    // const step = std.time.ns_per_ms * 10; // 10ms
     const timestamp = timer.read();
 
     // ns_late is non zero if we are late.
-    var ns_late = timestamp -| wake_time;
+    const ns_late = timestamp -| wake_time;
 
     // If we're more than a frame late, skip the rest of this loop
     // Recalculate what our new wake time should be so that we can
@@ -144,17 +144,15 @@ fn sleep(timer: *Timer, wake_time: u64) ?u64 {
     if (ns_late > frame_period) return timestamp + frame_period;
     const sleep_for = frame_period - ns_late;
 
-    const step = 2 * std.time.ns_per_ms; // Granularity of 2ms
-    const times = sleep_for / step;
+    // // Employ several sleep calls in periods of 10ms
+    // // By doing this the behaviour should average out to be
+    // // more consistent
+    // const loop_count = sleep_for / step; // How many groups of 10ms
 
-    for (0..times) |_| {
-        std.time.sleep(step);
+    // var i: usize = 0;
+    // while (i < loop_count) : (i += 1) std.time.sleep(step);
 
-        // Upon wakeup, check to see if this particular sleep was longer than expected
-        // if so we should exit early, but probably not skip a whole frame period
-        ns_late = timer.read() -| wake_time;
-        if (ns_late > frame_period) return null;
-    }
+    std.time.sleep(sleep_for);
 
     return null;
 }
@@ -162,59 +160,3 @@ fn sleep(timer: *Timer, wake_time: u64) ?u64 {
 fn spinLoop(timer: *Timer, wake_time: u64) void {
     while (true) if (timer.read() > wake_time) break;
 }
-
-pub const EmuThing = struct {
-    const Self = @This();
-    const Interface = @import("gdbstub").Emulator;
-    const Allocator = std.mem.Allocator;
-
-    cpu: *Arm7tdmi,
-    scheduler: *Scheduler,
-
-    pub fn init(cpu: *Arm7tdmi, scheduler: *Scheduler) Self {
-        return .{ .cpu = cpu, .scheduler = scheduler };
-    }
-
-    pub fn interface(self: *Self, allocator: Allocator) Interface {
-        return Interface.init(allocator, self);
-    }
-
-    pub fn read(self: *const Self, addr: u32) u8 {
-        return self.cpu.bus.dbgRead(u8, addr);
-    }
-
-    pub fn write(self: *Self, addr: u32, value: u8) void {
-        self.cpu.bus.dbgWrite(u8, addr, value);
-    }
-
-    pub fn registers(self: *const Self) *[16]u32 {
-        return &self.cpu.r;
-    }
-
-    pub fn cpsr(self: *const Self) u32 {
-        return self.cpu.cpsr.raw;
-    }
-
-    pub fn step(self: *Self) void {
-        const cpu = self.cpu;
-        const sched = self.scheduler;
-
-        // Is true when we have executed one (1) instruction
-        var did_step: bool = false;
-
-        // TODO: How can I make it easier to keep this in lock-step with runFrame?
-        while (!did_step) {
-            if (!cpu.stepDmaTransfer()) {
-                if (cpu.isHalted()) {
-                    // Fast-forward to next Event
-                    sched.tick = sched.queue.peek().?.tick;
-                } else {
-                    cpu.step();
-                    did_step = true;
-                }
-            }
-
-            if (sched.tick >= sched.nextTimestamp()) sched.handleEvent(cpu);
-        }
-    }
-};

src/core/ppu/Oam.zig

@@ -1,40 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x400;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = address & 0x3FF;
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
-        else => @compileError("OAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
-    const addr = address & 0x3FF;
-
-    switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
-        u8 => return, // 8-bit writes are explicitly ignored
-        else => @compileError("OAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    std.mem.set(u8, buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}

src/core/ppu/Palette.zig

@@ -1,47 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x400;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = address & 0x3FF;
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
-        else => @compileError("PALRAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
-    const addr = address & 0x3FF;
-
-    switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
-        u8 => {
-            const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
-            std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
-        },
-        else => @compileError("PALRAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    std.mem.set(u8, buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-pub inline fn backdrop(self: *const Self) u16 {
-    return std.mem.readIntNative(u16, self.buf[0..2]);
-}

src/core/ppu/Vram.zig

@@ -1,60 +0,0 @@
-const std = @import("std");
-const io = @import("../bus/io.zig");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x18000;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = Self.mirror(address);
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
-        else => @compileError("VRAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address: usize, value: T) void {
-    const mode: u3 = dispcnt.bg_mode.read();
-    const idx = Self.mirror(address);
-
-    switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
-        u8 => {
-            // Ignore write if it falls within the boundaries of OBJ VRAM
-            switch (mode) {
-                0, 1, 2 => if (0x0001_0000 <= idx) return,
-                else => if (0x0001_4000 <= idx) return,
-            }
-
-            const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
-            std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
-        },
-        else => @compileError("VRAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    std.mem.set(u8, buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-pub fn mirror(address: usize) usize {
-    // Mirrored in steps of 128K (64K + 32K + 32K) (abcc)
-    const addr = address & 0x1FFFF;
-
-    // If the address is within 96K we don't do anything,
-    // otherwise we want to mirror the last 32K (addresses between 64K and 96K)
-    return if (addr < buf_len) addr else 0x10000 + (addr & 0x7FFF);
-}

src/core/scheduler.zig

@@ -1,5 +1,6 @@
 const std = @import("std");
 
+const Bus = @import("Bus.zig");
 const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
 const Clock = @import("bus/gpio.zig").Clock;
 
@@ -31,7 +32,7 @@ pub const Scheduler = struct {
     }
 
     pub fn handleEvent(self: *Self, cpu: *Arm7tdmi) void {
-        const event = self.queue.remove();
+        if (self.queue.removeOrNull()) |event| {
             const late = self.tick - event.tick;
 
             switch (event.kind) {
@@ -42,19 +43,22 @@ pub const Scheduler = struct {
                 .Draw => {
                     // The end of a VDraw
                     cpu.bus.ppu.drawScanline();
-                cpu.bus.ppu.onHdrawEnd(cpu, late);
+                    cpu.bus.ppu.handleHDrawEnd(cpu, late);
                 },
                 .TimerOverflow => |id| {
                     switch (id) {
-                    inline 0...3 => |idx| cpu.bus.tim[idx].onTimerExpire(cpu, late),
+                        0 => cpu.bus.tim[0].handleOverflow(cpu, late),
+                        1 => cpu.bus.tim[1].handleOverflow(cpu, late),
+                        2 => cpu.bus.tim[2].handleOverflow(cpu, late),
+                        3 => cpu.bus.tim[3].handleOverflow(cpu, late),
                     }
                 },
                 .ApuChannel => |id| {
                     switch (id) {
-                    0 => cpu.bus.apu.ch1.onToneSweepEvent(late),
-                    1 => cpu.bus.apu.ch2.onToneEvent(late),
-                    2 => cpu.bus.apu.ch3.onWaveEvent(late),
-                    3 => cpu.bus.apu.ch4.onNoiseEvent(late),
+                        0 => cpu.bus.apu.ch1.channelTimerOverflow(late),
+                        1 => cpu.bus.apu.ch2.channelTimerOverflow(late),
+                        2 => cpu.bus.apu.ch3.channelTimerOverflow(late),
+                        3 => cpu.bus.apu.ch4.channelTimerOverflow(late),
                     }
                 },
                 .RealTimeClock => {
@@ -62,24 +66,30 @@ pub const Scheduler = struct {
                     if (device.kind != .Rtc or device.ptr == null) return;
 
                     const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), device.ptr.?));
-                clock.onClockUpdate(late);
+                    clock.updateTime(late);
                 },
-            .FrameSequencer => cpu.bus.apu.onSequencerTick(late),
+                .FrameSequencer => cpu.bus.apu.tickFrameSequencer(late),
                 .SampleAudio => cpu.bus.apu.sampleAudio(late),
-            .HBlank => cpu.bus.ppu.onHblankEnd(cpu, late), // The end of a HBlank
-            .VBlank => cpu.bus.ppu.onHdrawEnd(cpu, late), // The end of a VBlank
+                .HBlank => cpu.bus.ppu.handleHBlankEnd(cpu, late), // The end of a HBlank
+                .VBlank => cpu.bus.ppu.handleHDrawEnd(cpu, late), // The end of a VBlank
+            }
         }
     }
 
     /// Removes the **first** scheduled event of type `needle`
     pub fn removeScheduledEvent(self: *Self, needle: EventKind) void {
-        for (self.queue.items, 0..) |event, i| {
+        var it = self.queue.iterator();
+
+        var i: usize = 0;
+        while (it.next()) |event| : (i += 1) {
             if (std.meta.eql(event.kind, needle)) {
 
-                // invalidates the slice we're iterating over
+                // This invalidates the iterator
                 _ = self.queue.removeIndex(i);
 
-                log.debug("Removed {?}@{}", .{ event.kind, event.tick });
+                // Since removing something from the PQ invalidates the iterator,
+                // this implementation can safely only remove the first instance of
+                // a Scheduled Event. Exit Early
                 break;
             }
         }

src/main.zig

@@ -4,17 +4,14 @@ const known_folders = @import("known_folders");
 const clap = @import("clap");
 
 const config = @import("config.zig");
-const emu = @import("core/emu.zig");
 
 const Gui = @import("platform.zig").Gui;
 const Bus = @import("core/Bus.zig");
 const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
 const Scheduler = @import("core/scheduler.zig").Scheduler;
 const FilePaths = @import("util.zig").FilePaths;
-const FpsTracker = @import("util.zig").FpsTracker;
-const Allocator = std.mem.Allocator;
-const Atomic = std.atomic.Atomic;
 
+const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.Cli);
 const width = @import("core/ppu.zig").width;
 const height = @import("core/ppu.zig").height;
@@ -23,58 +20,38 @@ pub const log_level = if (builtin.mode != .Debug) .info else std.log.default_lev
 // CLI Arguments + Help Text
 const params = clap.parseParamsComptime(
     \\-h, --help            Display this help and exit.
-    \\-s, --skip            Skip BIOS.
     \\-b, --bios <str>      Optional path to a GBA BIOS ROM.
-    \\ --gdb                Run ZBA from the context of a GDB Server
-    \\<str>                 Path to the GBA GamePak ROM.
+    \\<str>                 Path to the GBA GamePak ROM
     \\
 );
 
-pub fn main() void {
+pub fn main() anyerror!void {
     // Main Allocator for ZBA
     var gpa = std.heap.GeneralPurposeAllocator(.{}){};
     defer std.debug.assert(!gpa.deinit());
-
     const allocator = gpa.allocator();
 
-    // Determine the Data Directory (stores saves)
-    const data_path = blk: {
-        const result = known_folders.getPath(allocator, .data);
-        const option = result catch |e| exitln("interrupted while determining the data folder: {}", .{e});
-        const path = option orelse exitln("no valid data folder found", .{});
-        ensureDataDirsExist(path) catch |e| exitln("failed to create folders under \"{s}\": {}", .{ path, e });
-
-        break :blk path;
-    };
+    // TODO: Make Error message not Linux Specific
+    const data_path = try known_folders.getPath(allocator, .data) orelse exit("Unable to Determine XDG Data Path", .{});
     defer allocator.free(data_path);
 
-    // Determine the Config Directory
-    const config_path = blk: {
-        const result = known_folders.getPath(allocator, .roaming_configuration);
-        const option = result catch |e| exitln("interreupted while determining the config folder: {}", .{e});
-        const path = option orelse exitln("no valid config folder found", .{});
-        ensureConfigDirExists(path) catch |e| exitln("failed to create required folder \"{s}\": {}", .{ path, e });
-
-        break :blk path;
-    };
+    const config_path = try configFilePath(allocator, data_path);
     defer allocator.free(config_path);
 
-    // Parse CLI
-    const result = clap.parse(clap.Help, &params, clap.parsers.default, .{}) catch |e| exitln("failed to parse cli: {}", .{e});
+    const save_path = try savePath(allocator, data_path);
+    defer allocator.free(save_path);
+
+    try config.load(allocator, config_path);
+
+    // Handle CLI Input
+    const result = try clap.parse(clap.Help, &params, clap.parsers.default, .{});
     defer result.deinit();
 
-    // TODO: Move config file to XDG Config directory?
-    const cfg_file_path = configFilePath(allocator, config_path) catch |e| exitln("failed to ready config file for access: {}", .{e});
-    defer allocator.free(cfg_file_path);
-
-    config.load(allocator, cfg_file_path) catch |e| exitln("failed to load config file: {}", .{e});
-
-    const paths = handleArguments(allocator, data_path, &result) catch |e| exitln("failed to handle cli arguments: {}", .{e});
+    const paths = try handleArguments(allocator, data_path, &result);
     defer if (paths.save) |path| allocator.free(path);
 
-    const log_file = if (config.config().debug.cpu_trace) blk: {
-        break :blk std.fs.cwd().createFile("zba.log", .{}) catch |e| exitln("failed to create trace log file: {}", .{e});
-    } else null;
+    const cpu_trace = config.config().debug.cpu_trace;
+    const log_file: ?std.fs.File = if (cpu_trace) try std.fs.cwd().createFile("zba.log", .{}) else null;
     defer if (log_file) |file| file.close();
 
     // TODO: Take Emulator Init Code out of main.zig
@@ -83,118 +60,69 @@ pub fn main() void {
 
     var bus: Bus = undefined;
     var cpu = Arm7tdmi.init(&scheduler, &bus, log_file);
+    if (paths.bios == null) cpu.fastBoot();
 
-    bus.init(allocator, &scheduler, &cpu, paths) catch |e| exitln("failed to init zba bus: {}", .{e});
+    try bus.init(allocator, &scheduler, &cpu, paths);
     defer bus.deinit();
 
-    if (config.config().guest.skip_bios or result.args.skip or paths.bios == null) {
-        cpu.fastBoot();
-    }
-
-    var quit = Atomic(bool).init(false);
-    var gui = Gui.init(&bus.pak.title, &bus.apu, width, height) catch |e| exitln("failed to init gui: {}", .{e});
+    var gui = Gui.init(&bus.pak.title, &bus.apu, width, height);
     defer gui.deinit();
 
-    if (result.args.gdb) {
-        const Server = @import("gdbstub").Server;
-        const EmuThing = @import("core/emu.zig").EmuThing;
-
-        var wrapper = EmuThing.init(&cpu, &scheduler);
-        var emulator = wrapper.interface(allocator);
-        defer emulator.deinit();
-
-        log.info("Ready to connect", .{});
-
-        var server = Server.init(emulator) catch |e| exitln("failed to init gdb server: {}", .{e});
-        defer server.deinit(allocator);
-
-        log.info("Starting GDB Server Thread", .{});
-
-        const thread = std.Thread.spawn(.{}, Server.run, .{ &server, allocator, &quit }) catch |e| exitln("gdb server thread crashed: {}", .{e});
-        defer thread.join();
-
-        gui.run(.{
-            .cpu = &cpu,
-            .scheduler = &scheduler,
-            .quit = &quit,
-        }) catch |e| exitln("main thread panicked: {}", .{e});
-    } else {
-        var tracker = FpsTracker.init();
-
-        const thread = std.Thread.spawn(.{}, emu.run, .{ &quit, &scheduler, &cpu, &tracker }) catch |e| exitln("emu thread panicked: {}", .{e});
-        defer thread.join();
-
-        gui.run(.{
-            .cpu = &cpu,
-            .scheduler = &scheduler,
-            .tracker = &tracker,
-            .quit = &quit,
-        }) catch |e| exitln("main thread panicked: {}", .{e});
-    }
+    try gui.run(&cpu, &scheduler);
 }
 
-fn handleArguments(allocator: Allocator, data_path: []const u8, result: *const clap.Result(clap.Help, &params, clap.parsers.default)) !FilePaths {
+pub fn handleArguments(allocator: Allocator, data_path: []const u8, result: *const clap.Result(clap.Help, &params, clap.parsers.default)) !FilePaths {
     const rom_path = romPath(result);
     log.info("ROM path: {s}", .{rom_path});
 
     const bios_path = result.args.bios;
-    if (bios_path) |path| log.info("BIOS path: {s}", .{path}) else log.warn("No BIOS provided", .{});
+    if (bios_path) |path| log.info("BIOS path: {s}", .{path}) else log.info("No BIOS provided", .{});
 
-    const save_path = try std.fs.path.join(allocator, &[_][]const u8{ data_path, "zba", "save" });
+    const save_path = try savePath(allocator, data_path);
     log.info("Save path: {s}", .{save_path});
 
-    return .{
+    return FilePaths{
         .rom = rom_path,
         .bios = bios_path,
         .save = save_path,
     };
 }
 
-fn configFilePath(allocator: Allocator, config_path: []const u8) ![]const u8 {
-    const path = try std.fs.path.join(allocator, &[_][]const u8{ config_path, "zba", "config.toml" });
-    errdefer allocator.free(path);
+fn configFilePath(allocator: Allocator, data_path: []const u8) ![]const u8 {
+    const path = try std.fs.path.join(allocator, &[_][]const u8{ data_path, "zba", "config.toml" });
 
     // We try to create the file exclusively, meaning that we err out if the file already exists.
     // All we care about is a file being there so we can just ignore that error in particular and
     // continue down the happy pathj
-    std.fs.accessAbsolute(path, .{}) catch |e| {
-        if (e != error.FileNotFound) return e;
-
-        const config_file = std.fs.createFileAbsolute(path, .{}) catch |err| exitln("failed to create \"{s}\": {}", .{ path, err });
-        defer config_file.close();
-
-        try config_file.writeAll(@embedFile("../example.toml"));
+    std.fs.accessAbsolute(path, .{}) catch {
+        const file_handle = try std.fs.createFileAbsolute(path, .{});
+        file_handle.close();
     };
 
     return path;
 }
 
-fn ensureDataDirsExist(data_path: []const u8) !void {
+fn savePath(allocator: Allocator, data_path: []const u8) ![]const u8 {
     var dir = try std.fs.openDirAbsolute(data_path, .{});
     defer dir.close();
 
-    // Will recursively create directories
-    try dir.makePath("zba" ++ std.fs.path.sep_str ++ "save");
-}
+    // Will either make the path recursively, or just exit early since it already exists
+    try dir.makePath("zba" ++ [_]u8{std.fs.path.sep} ++ "save");
 
-fn ensureConfigDirExists(config_path: []const u8) !void {
-    var dir = try std.fs.openDirAbsolute(config_path, .{});
-    defer dir.close();
-
-    try dir.makePath("zba");
+    // FIXME: Do we have to allocate? :sad:
+    return try std.fs.path.join(allocator, &[_][]const u8{ data_path, "zba", "save" });
 }
 
 fn romPath(result: *const clap.Result(clap.Help, &params, clap.parsers.default)) []const u8 {
     return switch (result.positionals.len) {
         1 => result.positionals[0],
-        0 => exitln("ZBA requires a path to a GamePak ROM", .{}),
-        else => exitln("ZBA received too many positional arguments.", .{}),
+        0 => exit("ZBA requires a path to a GamePak ROM\n", .{}),
+        else => exit("ZBA received too many positional arguments. \n", .{}),
     };
 }
 
-fn exitln(comptime format: []const u8, args: anytype) noreturn {
+fn exit(comptime format: []const u8, args: anytype) noreturn {
     const stderr = std.io.getStdErr().writer();
     stderr.print(format, args) catch {}; // Just exit already...
-    stderr.writeByte('\n') catch {};
     std.os.exit(1);
 }

src/platform.zig

@@ -1,6 +1,5 @@
 const std = @import("std");
 const SDL = @import("sdl2");
-const gl = @import("gl");
 const emu = @import("core/emu.zig");
 const config = @import("config.zig");
 
@@ -9,231 +8,116 @@ const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
 const Scheduler = @import("core/scheduler.zig").Scheduler;
 const FpsTracker = @import("util.zig").FpsTracker;
 
-const gba_width = @import("core/ppu.zig").width;
-const gba_height = @import("core/ppu.zig").height;
+const span = @import("util.zig").span;
 
-pub const sample_rate = 1 << 15;
-pub const sample_format = SDL.AUDIO_U16;
-
-const default_title = "ZBA";
+const pitch = @import("core/ppu.zig").framebuf_pitch;
+const default_title: []const u8 = "ZBA";
 
 pub const Gui = struct {
     const Self = @This();
-    const SDL_GLContext = *anyopaque; // SDL.SDL_GLContext is a ?*anyopaque
     const log = std.log.scoped(.Gui);
 
-    // zig fmt: off
-    const vertices: [32]f32 = [_]f32{
-        // Positions        // Colours      // Texture Coords
-         1.0, -1.0, 0.0,    1.0, 0.0, 0.0,  1.0, 1.0, // Top Right
-         1.0,  1.0, 0.0,    0.0, 1.0, 0.0,  1.0, 0.0, // Bottom Right
-        -1.0,  1.0, 0.0,    0.0, 0.0, 1.0,  0.0, 0.0, // Bottom Left
-        -1.0, -1.0, 0.0,    1.0, 1.0, 0.0,  0.0, 1.0, // Top Left
-    };
-
-    const indices: [6]u32 = [_]u32{
-        0, 1, 3, // First Triangle
-        1, 2, 3, // Second Triangle
-    };
-    // zig fmt: on
-
     window: *SDL.SDL_Window,
-    ctx: SDL_GLContext,
     title: []const u8,
+    renderer: *SDL.SDL_Renderer,
+    texture: *SDL.SDL_Texture,
     audio: Audio,
 
-    program_id: gl.GLuint,
-
-    pub fn init(title: *const [12]u8, apu: *Apu, width: i32, height: i32) !Self {
-        if (SDL.SDL_Init(SDL.SDL_INIT_VIDEO | SDL.SDL_INIT_EVENTS | SDL.SDL_INIT_AUDIO) < 0) panic();
-        if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_PROFILE_MASK, SDL.SDL_GL_CONTEXT_PROFILE_CORE) < 0) panic();
-        if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_MAJOR_VERSION, 3) < 0) panic();
-        if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_MAJOR_VERSION, 3) < 0) panic();
+    pub fn init(title: *const [12]u8, apu: *Apu, width: i32, height: i32) Self {
+        const ret = SDL.SDL_Init(SDL.SDL_INIT_VIDEO | SDL.SDL_INIT_EVENTS | SDL.SDL_INIT_AUDIO | SDL.SDL_INIT_GAMECONTROLLER);
+        if (ret < 0) panic();
 
         const win_scale = @intCast(c_int, config.config().host.win_scale);
 
         const window = SDL.SDL_CreateWindow(
-            default_title,
+            default_title.ptr,
             SDL.SDL_WINDOWPOS_CENTERED,
             SDL.SDL_WINDOWPOS_CENTERED,
             @as(c_int, width * win_scale),
             @as(c_int, height * win_scale),
-            SDL.SDL_WINDOW_OPENGL | SDL.SDL_WINDOW_SHOWN,
+            SDL.SDL_WINDOW_SHOWN,
         ) orelse panic();
 
-        const ctx = SDL.SDL_GL_CreateContext(window) orelse panic();
-        if (SDL.SDL_GL_MakeCurrent(window, ctx) < 0) panic();
+        const renderer_flags = SDL.SDL_RENDERER_ACCELERATED | if (config.config().host.vsync) SDL.SDL_RENDERER_PRESENTVSYNC else 0;
+        const renderer = SDL.SDL_CreateRenderer(window, -1, @bitCast(u32, renderer_flags)) orelse panic();
 
-        gl.load(ctx, Self.glGetProcAddress) catch {};
-        if (SDL.SDL_GL_SetSwapInterval(@boolToInt(config.config().host.vsync)) < 0) panic();
-
-        const program_id = try compileShaders();
+        const texture = SDL.SDL_CreateTexture(
+            renderer,
+            SDL.SDL_PIXELFORMAT_RGBA8888,
+            SDL.SDL_TEXTUREACCESS_STREAMING,
+            @as(c_int, width),
+            @as(c_int, height),
+        ) orelse panic();
 
         return Self{
             .window = window,
-            .title = std.mem.sliceTo(title, 0),
-            .ctx = ctx,
-            .program_id = program_id,
+            .title = span(title),
+            .renderer = renderer,
+            .texture = texture,
             .audio = Audio.init(apu),
         };
     }
 
-    fn compileShaders() !gl.GLuint {
-        // TODO: Panic on Shader Compiler Failure + Error Message
-        const vert_shader = @embedFile("shader/pixelbuf.vert");
-        const frag_shader = @embedFile("shader/pixelbuf.frag");
+    pub fn run(self: *Self, cpu: *Arm7tdmi, scheduler: *Scheduler) !void {
+        var quit = std.atomic.Atomic(bool).init(false);
+        var tracker = FpsTracker.init();
 
-        const vs = gl.createShader(gl.VERTEX_SHADER);
-        defer gl.deleteShader(vs);
+        const thread = try std.Thread.spawn(.{}, emu.run, .{ &quit, scheduler, cpu, &tracker });
+        defer thread.join();
 
-        gl.shaderSource(vs, 1, &[_][*c]const u8{vert_shader}, 0);
-        gl.compileShader(vs);
-
-        if (!shader.didCompile(vs)) return error.VertexCompileError;
-
-        const fs = gl.createShader(gl.FRAGMENT_SHADER);
-        defer gl.deleteShader(fs);
-
-        gl.shaderSource(fs, 1, &[_][*c]const u8{frag_shader}, 0);
-        gl.compileShader(fs);
-
-        if (!shader.didCompile(fs)) return error.FragmentCompileError;
-
-        const program = gl.createProgram();
-        gl.attachShader(program, vs);
-        gl.attachShader(program, fs);
-        gl.linkProgram(program);
-
-        return program;
-    }
-
-    // Returns the VAO ID since it's used in run()
-    fn generateBuffers() struct { c_uint, c_uint, c_uint } {
-        var vao_id: c_uint = undefined;
-        var vbo_id: c_uint = undefined;
-        var ebo_id: c_uint = undefined;
-        gl.genVertexArrays(1, &vao_id);
-        gl.genBuffers(1, &vbo_id);
-        gl.genBuffers(1, &ebo_id);
-
-        gl.bindVertexArray(vao_id);
-
-        gl.bindBuffer(gl.ARRAY_BUFFER, vbo_id);
-        gl.bufferData(gl.ARRAY_BUFFER, @sizeOf(@TypeOf(vertices)), &vertices, gl.STATIC_DRAW);
-
-        gl.bindBuffer(gl.ELEMENT_ARRAY_BUFFER, ebo_id);
-        gl.bufferData(gl.ELEMENT_ARRAY_BUFFER, @sizeOf(@TypeOf(indices)), &indices, gl.STATIC_DRAW);
-
-        // Position
-        gl.vertexAttribPointer(0, 3, gl.FLOAT, gl.FALSE, 8 * @sizeOf(f32), @intToPtr(?*anyopaque, 0)); // lmao
-        gl.enableVertexAttribArray(0);
-        // Colour
-        gl.vertexAttribPointer(1, 3, gl.FLOAT, gl.FALSE, 8 * @sizeOf(f32), @intToPtr(?*anyopaque, (3 * @sizeOf(f32))));
-        gl.enableVertexAttribArray(1);
-        // Texture Coord
-        gl.vertexAttribPointer(2, 2, gl.FLOAT, gl.FALSE, 8 * @sizeOf(f32), @intToPtr(?*anyopaque, (6 * @sizeOf(f32))));
-        gl.enableVertexAttribArray(2);
-
-        return .{ vao_id, vbo_id, ebo_id };
-    }
-
-    fn generateTexture(buf: []const u8) c_uint {
-        var tex_id: c_uint = undefined;
-        gl.genTextures(1, &tex_id);
-        gl.bindTexture(gl.TEXTURE_2D, tex_id);
-
-        // gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_WRAP_S, gl.CLAMP_TO_EDGE);
-        // gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_WRAP_T, gl.CLAMP_TO_EDGE);
-
-        gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MIN_FILTER, gl.NEAREST);
-        gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MAG_FILTER, gl.NEAREST);
-
-        gl.texImage2D(gl.TEXTURE_2D, 0, gl.RGBA, gba_width, gba_height, 0, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, buf.ptr);
-        // gl.generateMipmap(gl.TEXTURE_2D); // TODO: Remove?
-
-        return tex_id;
-    }
-
-    const RunOptions = struct {
-        quit: *std.atomic.Atomic(bool),
-        tracker: ?*FpsTracker = null,
-        cpu: *Arm7tdmi,
-        scheduler: *Scheduler,
-    };
-
-    pub fn run(self: *Self, opt: RunOptions) !void {
-        const cpu = opt.cpu;
-        const tracker = opt.tracker;
-        const quit = opt.quit;
-
-        var buffer_ids = Self.generateBuffers();
-        defer {
-            gl.deleteBuffers(1, &buffer_ids[2]); // EBO
-            gl.deleteBuffers(1, &buffer_ids[1]); // VBO
-            gl.deleteVertexArrays(1, &buffer_ids[0]); // VAO
-        }
-        const vao_id = buffer_ids[0];
-
-        const tex_id = Self.generateTexture(cpu.bus.ppu.framebuf.get(.Renderer));
-        defer gl.deleteTextures(1, &tex_id);
-
-        var title_buf: [0x100]u8 = undefined;
+        var title_buf: [0x100]u8 = [_]u8{0} ** 0x100;
 
         emu_loop: while (true) {
             var event: SDL.SDL_Event = undefined;
-
-            // This might be true if the emu is running via a gdbstub server
-            // and the gdb stub exits first
-            if (quit.load(.Monotonic)) break :emu_loop;
-
             while (SDL.SDL_PollEvent(&event) != 0) {
                 switch (event.type) {
                     SDL.SDL_QUIT => break :emu_loop,
                     SDL.SDL_KEYDOWN => {
+                        const io = &cpu.bus.io;
                         const key_code = event.key.keysym.sym;
-                        var keyinput = cpu.bus.io.keyinput.load(.Monotonic);
 
                         switch (key_code) {
-                            SDL.SDLK_UP => keyinput.up.unset(),
-                            SDL.SDLK_DOWN => keyinput.down.unset(),
-                            SDL.SDLK_LEFT => keyinput.left.unset(),
-                            SDL.SDLK_RIGHT => keyinput.right.unset(),
-                            SDL.SDLK_x => keyinput.a.unset(),
-                            SDL.SDLK_z => keyinput.b.unset(),
-                            SDL.SDLK_a => keyinput.shoulder_l.unset(),
-                            SDL.SDLK_s => keyinput.shoulder_r.unset(),
-                            SDL.SDLK_RETURN => keyinput.start.unset(),
-                            SDL.SDLK_RSHIFT => keyinput.select.unset(),
+                            SDL.SDLK_UP => io.keyinput.up.unset(),
+                            SDL.SDLK_DOWN => io.keyinput.down.unset(),
+                            SDL.SDLK_LEFT => io.keyinput.left.unset(),
+                            SDL.SDLK_RIGHT => io.keyinput.right.unset(),
+                            SDL.SDLK_x => io.keyinput.a.unset(),
+                            SDL.SDLK_z => io.keyinput.b.unset(),
+                            SDL.SDLK_a => io.keyinput.shoulder_l.unset(),
+                            SDL.SDLK_s => io.keyinput.shoulder_r.unset(),
+                            SDL.SDLK_RETURN => io.keyinput.start.unset(),
+                            SDL.SDLK_RSHIFT => io.keyinput.select.unset(),
                             else => {},
                         }
-
-                        cpu.bus.io.keyinput.store(keyinput.raw, .Monotonic);
                     },
                     SDL.SDL_KEYUP => {
+                        const io = &cpu.bus.io;
                         const key_code = event.key.keysym.sym;
-                        var keyinput = cpu.bus.io.keyinput.load(.Monotonic);
 
                         switch (key_code) {
-                            SDL.SDLK_UP => keyinput.up.set(),
-                            SDL.SDLK_DOWN => keyinput.down.set(),
-                            SDL.SDLK_LEFT => keyinput.left.set(),
-                            SDL.SDLK_RIGHT => keyinput.right.set(),
-                            SDL.SDLK_x => keyinput.a.set(),
-                            SDL.SDLK_z => keyinput.b.set(),
-                            SDL.SDLK_a => keyinput.shoulder_l.set(),
-                            SDL.SDLK_s => keyinput.shoulder_r.set(),
-                            SDL.SDLK_RETURN => keyinput.start.set(),
-                            SDL.SDLK_RSHIFT => keyinput.select.set(),
-                            SDL.SDLK_i => {
-                                comptime std.debug.assert(sample_format == SDL.AUDIO_U16);
-                                log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(cpu.bus.apu.stream)) / (2 * @sizeOf(u16))});
+                            SDL.SDLK_UP => io.keyinput.up.set(),
+                            SDL.SDLK_DOWN => io.keyinput.down.set(),
+                            SDL.SDLK_LEFT => io.keyinput.left.set(),
+                            SDL.SDLK_RIGHT => io.keyinput.right.set(),
+                            SDL.SDLK_x => io.keyinput.a.set(),
+                            SDL.SDLK_z => io.keyinput.b.set(),
+                            SDL.SDLK_a => io.keyinput.shoulder_l.set(),
+                            SDL.SDLK_s => io.keyinput.shoulder_r.set(),
+                            SDL.SDLK_RETURN => io.keyinput.start.set(),
+                            SDL.SDLK_RSHIFT => io.keyinput.select.set(),
+                            SDL.SDLK_i => log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(cpu.bus.apu.stream)) / (2 * @sizeOf(u16))}),
+                            SDL.SDLK_j => log.err("Scheduler Capacity: {} | Scheduler Event Count: {}", .{ scheduler.queue.capacity(), scheduler.queue.count() }),
+                            SDL.SDLK_k => {
+                                // Dump IWRAM to file
+                                log.info("PC: 0x{X:0>8}", .{cpu.r[15]});
+                                log.info("LR: 0x{X:0>8}", .{cpu.r[14]});
+                                // const iwram_file = try std.fs.cwd().createFile("iwram.bin", .{});
+                                // defer iwram_file.close();
+
+                                // try iwram_file.writeAll(cpu.bus.iwram.buf);
                             },
-                            // SDL.SDLK_j => log.err("Scheduler Capacity: {} | Scheduler Event Count: {}", .{ scheduler.queue.capacity(), scheduler.queue.count() }),
-                            SDL.SDLK_k => {},
                             else => {},
                         }
-
-                        cpu.bus.io.keyinput.store(keyinput.raw, .Monotonic);
                     },
                     else => {},
                 }
@@ -241,40 +125,31 @@ pub const Gui = struct {
 
             // Emulator has an internal Double Buffer
             const framebuf = cpu.bus.ppu.framebuf.get(.Renderer);
-            gl.texSubImage2D(gl.TEXTURE_2D, 0, 0, 0, gba_width, gba_height, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, framebuf.ptr);
+            _ = SDL.SDL_UpdateTexture(self.texture, null, framebuf.ptr, pitch);
+            _ = SDL.SDL_RenderCopy(self.renderer, self.texture, null, null);
+            SDL.SDL_RenderPresent(self.renderer);
 
-            gl.useProgram(self.program_id);
-            gl.bindVertexArray(vao_id);
-            gl.drawElements(gl.TRIANGLES, 6, gl.UNSIGNED_INT, null);
-            SDL.SDL_GL_SwapWindow(self.window);
-
-            if (tracker) |t| {
-                const dyn_title = std.fmt.bufPrintZ(&title_buf, "ZBA | {s} [Emu: {}fps] ", .{ self.title, t.value() }) catch unreachable;
+            const dyn_title = std.fmt.bufPrint(&title_buf, "ZBA | {s} [Emu: {}fps] ", .{ self.title, tracker.value() }) catch unreachable;
             SDL.SDL_SetWindowTitle(self.window, dyn_title.ptr);
         }
-        }
 
-        quit.store(true, .Monotonic); // Terminate Emulator Thread
+        quit.store(true, .SeqCst); // Terminate Emulator Thread
     }
 
     pub fn deinit(self: *Self) void {
         self.audio.deinit();
-        gl.deleteProgram(self.program_id);
-        SDL.SDL_GL_DeleteContext(self.ctx);
+        SDL.SDL_DestroyTexture(self.texture);
+        SDL.SDL_DestroyRenderer(self.renderer);
         SDL.SDL_DestroyWindow(self.window);
         SDL.SDL_Quit();
         self.* = undefined;
     }
-
-    fn glGetProcAddress(ctx: SDL.SDL_GLContext, proc: [:0]const u8) ?*anyopaque {
-        _ = ctx;
-        return SDL.SDL_GL_GetProcAddress(proc.ptr);
-    }
 };
 
 const Audio = struct {
     const Self = @This();
     const log = std.log.scoped(.PlatformAudio);
+    const sample_rate = @import("core/apu.zig").host_sample_rate;
 
     device: SDL.SDL_AudioDeviceID,
 
@@ -282,22 +157,16 @@ const Audio = struct {
         var have: SDL.SDL_AudioSpec = undefined;
         var want: SDL.SDL_AudioSpec = std.mem.zeroes(SDL.SDL_AudioSpec);
         want.freq = sample_rate;
-        want.format = sample_format;
+        want.format = SDL.AUDIO_U16;
         want.channels = 2;
         want.samples = 0x100;
         want.callback = Self.callback;
         want.userdata = apu;
 
-        std.debug.assert(sample_format == SDL.AUDIO_U16);
-        log.info("Host Sample Rate: {}Hz, Host Format: SDL.AUDIO_U16", .{sample_rate});
-
         const device = SDL.SDL_OpenAudioDevice(null, 0, &want, &have, 0);
         if (device == 0) panic();
 
-        if (!config.config().host.mute) {
         SDL.SDL_PauseAudioDevice(device, 0); // Unpause Audio
-            log.info("Unpaused Device", .{});
-        }
 
         return .{ .device = device };
     }
@@ -308,32 +177,12 @@ const Audio = struct {
     }
 
     export fn callback(userdata: ?*anyopaque, stream: [*c]u8, len: c_int) void {
-        const T = *Apu;
-        const apu = @ptrCast(T, @alignCast(@alignOf(T), userdata));
-
+        const apu = @ptrCast(*Apu, @alignCast(@alignOf(*Apu), userdata));
         _ = SDL.SDL_AudioStreamGet(apu.stream, stream, len);
-    }
-};
 
-const shader = struct {
-    const Kind = enum { vertex, fragment };
-    const log = std.log.scoped(.Shader);
-
-    fn didCompile(id: gl.GLuint) bool {
-        var success: gl.GLint = undefined;
-        gl.getShaderiv(id, gl.COMPILE_STATUS, &success);
-
-        if (success == 0) err(id);
-
-        return success == 1;
-    }
-
-    fn err(id: gl.GLuint) void {
-        const buf_len = 512;
-        var error_msg: [buf_len]u8 = undefined;
-
-        gl.getShaderInfoLog(id, buf_len, 0, &error_msg);
-        log.err("{s}", .{std.mem.sliceTo(&error_msg, 0)});
+        // If we don't write anything, play silence otherwise garbage will be played
+        // FIXME: I don't think this hack to remove DC Offset is acceptable :thinking:
+        // if (written == 0) std.mem.set(u8, stream[0..@intCast(usize, len)], 0x40);
     }
 };
 

src/shader/pixelbuf.frag

@@ -1,25 +0,0 @@
-#version 330 core
-out vec4 frag_color;
-
-in vec3 color;
-in vec2 uv;
-
-uniform sampler2D screen;
-
-void main() {
-	// https://near.sh/video/color-emulation
-	// Thanks to Talarubi + Near for the Colour Correction
-	// Thanks to fleur + mattrb for the Shader Impl
-
-	vec4 color = texture(screen, uv);
-	color.rgb = pow(color.rgb, vec3(4.0)); // LCD Gamma
-  
-	frag_color = vec4(
-		pow(vec3(
-		  	  0 * color.b +  50 * color.g + 255 * color.r,
-	     	 30 * color.b + 230 * color.g +  10 * color.r,
-			220 * color.b +  10 * color.g +  50 * color.r
-		) / 255, vec3(1.0 / 2.2)), // Out Gamma
-	1.0); 
-}
-

src/shader/pixelbuf.vert

@@ -1,13 +0,0 @@
-#version 330 core
-layout (location = 0) in vec3 pos;
-layout (location = 1) in vec3 in_color;
-layout (location = 2) in vec2 in_uv;
-
-out vec3 color;
-out vec2 uv;
-
-void main() {
-	color = in_color;
-	uv = in_uv;
-	gl_Position = vec4(pos, 1.0);
-}

src/util.zig

@@ -5,8 +5,6 @@ const config = @import("config.zig");
 const Log2Int = std.math.Log2Int;
 const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
 
-const Allocator = std.mem.Allocator;
-
 // Sign-Extend value of type `T` to type `U`
 pub fn sext(comptime T: type, comptime U: type, value: T) T {
     // U must have less bits than T
@@ -14,9 +12,9 @@ pub fn sext(comptime T: type, comptime U: type, value: T) T {
 
     const iT = std.meta.Int(.signed, @typeInfo(T).Int.bits);
     const ExtU = if (@typeInfo(U).Int.signedness == .unsigned) T else iT;
-    const shift_amt = @intCast(Log2Int(T), @typeInfo(T).Int.bits - @typeInfo(U).Int.bits);
+    const shift = @intCast(Log2Int(T), @typeInfo(T).Int.bits - @typeInfo(U).Int.bits);
 
-    return @bitCast(T, @bitCast(iT, @as(ExtU, @truncate(U, value)) << shift_amt) >> shift_amt);
+    return @bitCast(T, @bitCast(iT, @as(ExtU, @truncate(U, value)) << shift) >> shift);
 }
 
 /// See https://godbolt.org/z/W3en9Eche
@@ -49,7 +47,7 @@ pub const FpsTracker = struct {
 
     pub fn value(self: *Self) u32 {
         if (self.timer.read() >= std.time.ns_per_s) {
-            self.fps = self.count.swap(0, .Monotonic);
+            self.fps = self.count.swap(0, .SeqCst);
             self.timer.reset();
         }
 
@@ -68,6 +66,57 @@ pub fn intToBytes(comptime T: type, value: anytype) [@sizeOf(T)]u8 {
     return result;
 }
 
+/// The Title from the GBA Cartridge is an Uppercase ASCII string which is
+/// null-padded to 12 bytes
+///
+/// This function returns a slice of the ASCII string without the null terminator(s)
+/// (essentially, a proper Zig/Rust/Any modern language String)
+pub fn span(title: *const [12]u8) []const u8 {
+    const end = std.mem.indexOfScalar(u8, title, '\x00');
+    return title[0 .. end orelse title.len];
+}
+
+test "span" {
+    var example: *const [12]u8 = "POKEMON_EMER";
+    try std.testing.expectEqualSlices(u8, "POKEMON_EMER", span(example));
+
+    example = "POKEMON_EME\x00";
+    try std.testing.expectEqualSlices(u8, "POKEMON_EME", span(example));
+
+    example = "POKEMON_EM\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POKEMON_EM", span(example));
+
+    example = "POKEMON_E\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POKEMON_E", span(example));
+
+    example = "POKEMON_\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POKEMON_", span(example));
+
+    example = "POKEMON\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POKEMON", span(example));
+
+    example = "POKEMO\x00\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POKEMO", span(example));
+
+    example = "POKEM\x00\x00\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POKEM", span(example));
+
+    example = "POKE\x00\x00\x00\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POKE", span(example));
+
+    example = "POK\x00\x00\x00\x00\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "POK", span(example));
+
+    example = "PO\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "PO", span(example));
+
+    example = "P\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "P", span(example));
+
+    example = "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
+    try std.testing.expectEqualSlices(u8, "", span(example));
+}
+
 /// Creates a copy of a title with all Filesystem-invalid characters replaced
 ///
 /// e.g. POKEPIN R/S to POKEPIN R_S
@@ -94,9 +143,7 @@ pub const io = struct {
             return 0;
         }
 
-        pub fn undef(comptime T: type, comptime log: anytype, comptime format: []const u8, args: anytype) ?T {
-            @setCold(true);
-
+        pub fn undef(comptime T: type, log: anytype, comptime format: []const u8, args: anytype) ?T {
             const unhandled_io = config.config().debug.unhandled_io;
 
             log.warn(format, args);
@@ -104,13 +151,6 @@ pub const io = struct {
 
             return null;
         }
-
-        pub fn err(comptime T: type, comptime log: anytype, comptime format: []const u8, args: anytype) ?T {
-            @setCold(true);
-
-            log.err(format, args);
-            return null;
-        }
     };
 
     pub const write = struct {
@@ -122,10 +162,20 @@ pub const io = struct {
         }
     };
 };
+pub fn readUndefined(log: anytype, comptime format: []const u8, args: anytype) u8 {
+    log.warn(format, args);
+    if (builtin.mode == .Debug) std.debug.panic("TODO: Implement I/O Register", .{});
+
+    return 0;
+}
+
+pub fn writeUndefined(log: anytype, comptime format: []const u8, args: anytype) void {
+    log.warn(format, args);
+    if (builtin.mode == .Debug) std.debug.panic("TODO: Implement I/O Register", .{});
+}
 
 pub const Logger = struct {
     const Self = @This();
-    const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });
 
     buf: std.io.BufferedWriter(4096 << 2, std.fs.File.Writer),
 
@@ -137,7 +187,6 @@ pub const Logger = struct {
 
     pub fn print(self: *Self, comptime format: []const u8, args: anytype) !void {
         try self.buf.writer().print(format, args);
-        try self.buf.flush(); // FIXME: On panics, whatever is in the buffer isn't written to file
     }
 
     pub fn mgbaLog(self: *Self, cpu: *const Arm7tdmi, opcode: u32) void {
@@ -148,7 +197,7 @@ pub const Logger = struct {
         if (cpu.cpsr.t.read()) {
             if (opcode >> 11 == 0x1E) {
                 // Instruction 1 of a BL Opcode, print in ARM mode
-                const low = cpu.bus.dbgRead(u16, cpu.r[15] - 2);
+                const low = cpu.bus.dbgRead(u16, cpu.r[15]);
                 const bl_opcode = @as(u32, opcode) << 16 | low;
 
                 self.print(arm_fmt, Self.fmtArgs(cpu, bl_opcode)) catch @panic("failed to write to log file");
@@ -177,143 +226,11 @@ pub const Logger = struct {
             cpu.r[12],
             cpu.r[13],
             cpu.r[14],
-            cpu.r[15] - if (cpu.cpsr.t.read()) 2 else @as(u32, 4),
+            cpu.r[15],
             cpu.cpsr.raw,
             opcode,
         };
     }
 };
 
-pub const audio = struct {
-    const _io = @import("core/bus/io.zig");
-
-    const ToneSweep = @import("core/apu/ToneSweep.zig");
-    const Tone = @import("core/apu/Tone.zig");
-    const Wave = @import("core/apu/Wave.zig");
-    const Noise = @import("core/apu/Noise.zig");
-
-    pub const length = struct {
-        const FrameSequencer = @import("core/apu.zig").FrameSequencer;
-
-        /// Update State of Ch1, Ch2 and Ch3 length timer
-        pub fn update(comptime T: type, self: *T, fs: *const FrameSequencer, nrx34: _io.Frequency) void {
-            comptime std.debug.assert(T == ToneSweep or T == Tone or T == Wave);
-
-            // Write to NRx4 when FS's next step is not one that clocks the length counter
-            if (!fs.isLengthNext()) {
-                // If length_enable was disabled but is now enabled and length timer is not 0 already,
-                // decrement the length timer
-
-                if (!self.freq.length_enable.read() and nrx34.length_enable.read() and self.len_dev.timer != 0) {
-                    self.len_dev.timer -= 1;
-
-                    // If Length Timer is now 0 and trigger is clear, disable the channel
-                    if (self.len_dev.timer == 0 and !nrx34.trigger.read()) self.enabled = false;
-                }
-            }
-        }
-
-        pub const ch4 = struct {
-            /// update state of ch4 length timer
-            pub fn update(self: *Noise, fs: *const FrameSequencer, nr44: _io.NoiseControl) void {
-                // Write to NRx4 when FS's next step is not one that clocks the length counter
-                if (!fs.isLengthNext()) {
-                    // If length_enable was disabled but is now enabled and length timer is not 0 already,
-                    // decrement the length timer
-
-                    if (!self.cnt.length_enable.read() and nr44.length_enable.read() and self.len_dev.timer != 0) {
-                        self.len_dev.timer -= 1;
-
-                        // If Length Timer is now 0 and trigger is clear, disable the channel
-                        if (self.len_dev.timer == 0 and !nr44.trigger.read()) self.enabled = false;
-                    }
-                }
-            }
-        };
-    };
-};
-
-/// Sets a quarter (8) of the bits of the u32 `left` to the value of u8 `right`
-pub inline fn setQuart(left: u32, addr: u8, right: u8) u32 {
-    const offset = @truncate(u2, addr);
-
-    return switch (offset) {
-        0b00 => (left & 0xFFFF_FF00) | right,
-        0b01 => (left & 0xFFFF_00FF) | @as(u32, right) << 8,
-        0b10 => (left & 0xFF00_FFFF) | @as(u32, right) << 16,
-        0b11 => (left & 0x00FF_FFFF) | @as(u32, right) << 24,
-    };
-}
-
-/// Calculates the correct shift offset for an aligned/unaligned u8 read
-///
-/// TODO: Support u16 reads of u32 values?
-pub inline fn getHalf(byte: u8) u4 {
-    return @truncate(u4, byte & 1) << 3;
-}
-
-pub inline fn setHalf(comptime T: type, left: T, addr: u8, right: HalfInt(T)) T {
-    const offset = @truncate(u1, addr >> if (T == u32) 1 else 0);
-
-    return switch (T) {
-        u32 => switch (offset) {
-            0b0 => (left & 0xFFFF_0000) | right,
-            0b1 => (left & 0x0000_FFFF) | @as(u32, right) << 16,
-        },
-        u16 => switch (offset) {
-            0b0 => (left & 0xFF00) | right,
-            0b1 => (left & 0x00FF) | @as(u16, right) << 8,
-        },
-        else => @compileError("unsupported type"),
-    };
-}
-
-/// The Integer type which corresponds to T with exactly half the amount of bits
-fn HalfInt(comptime T: type) type {
-    const type_info = @typeInfo(T);
-    comptime std.debug.assert(type_info == .Int); // Type must be an integer
-    comptime std.debug.assert(type_info.Int.bits % 2 == 0); // Type must have an even amount of bits
-
-    return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1);
-}
-
-/// Double Buffering Implementation
-pub const FrameBuffer = struct {
-    const Self = @This();
-
-    layers: [2][]u8,
-    buf: []u8,
-    current: u1,
-
-    allocator: Allocator,
-
-    // TODO: Rename
-    const Device = enum { Emulator, Renderer };
-
-    pub fn init(allocator: Allocator, comptime len: comptime_int) !Self {
-        const buf = try allocator.alloc(u8, len * 2);
-        std.mem.set(u8, buf, 0);
-
-        return .{
-            // Front and Back Framebuffers
-            .layers = [_][]u8{ buf[0..][0..len], buf[len..][0..len] },
-            .buf = buf,
-            .current = 0,
-
-            .allocator = allocator,
-        };
-    }
-
-    pub fn deinit(self: *Self) void {
-        self.allocator.free(self.buf);
-        self.* = undefined;
-    }
-
-    pub fn swap(self: *Self) void {
-        self.current = ~self.current;
-    }
-
-    pub fn get(self: *Self, comptime dev: Device) []u8 {
-        return self.layers[if (dev == .Emulator) self.current else ~self.current];
-    }
-};
+const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });