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No commits in common. "f601bec0c44f98bcbd4230e7e009860e12eb68f0" and "20d9f0a7f4e858b874fb2af6ee6f66c4c68d2cdf" have entirely different histories.
f601bec0c4
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20d9f0a7f4
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@ -450,7 +450,8 @@ pub const Arm7tdmi = struct {
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}
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}
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}
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}
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if (!self.pipe.flushed) self.r[15] += if (self.cpsr.t.read()) 2 else @as(u32, 4);
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if (self.pipe.flushed) self.r[15] += if (self.cpsr.t.read()) 2 else @as(u32, 4);
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self.r[15] += if (self.cpsr.t.read()) 2 else @as(u32, 4);
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self.pipe.flushed = false;
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self.pipe.flushed = false;
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}
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}
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@ -541,8 +542,6 @@ pub const Arm7tdmi = struct {
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std.debug.print("spsr: 0x{X:0>8} ", .{self.spsr.raw});
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std.debug.print("spsr: 0x{X:0>8} ", .{self.spsr.raw});
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prettyPrintPsr(&self.spsr);
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prettyPrintPsr(&self.spsr);
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std.debug.print("pipeline: {??X:0>8}\n", .{self.pipe.stage});
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if (self.cpsr.t.read()) {
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if (self.cpsr.t.read()) {
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const opcode = self.bus.dbgRead(u16, self.r[15] - 4);
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const opcode = self.bus.dbgRead(u16, self.r[15] - 4);
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const id = thumbIdx(opcode);
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const id = thumbIdx(opcode);
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@ -705,8 +704,6 @@ const Pipline = struct {
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self.stage[0] = cpu.bus.read(T, cpu.r[15]);
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self.stage[0] = cpu.bus.read(T, cpu.r[15]);
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self.stage[1] = cpu.bus.read(T, cpu.r[15] + if (T == u32) 4 else @as(u32, 2));
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self.stage[1] = cpu.bus.read(T, cpu.r[15] + if (T == u32) 4 else @as(u32, 2));
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cpu.r[15] += if (T == u32) 8 else @as(u32, 4);
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self.flushed = true;
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self.flushed = true;
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}
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}
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};
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};
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