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ed3bdd90fb
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0f08ad05be
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@ -45,15 +45,6 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
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// Barrel Shifter should always calc CPSR C in TST
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// Barrel Shifter should always calc CPSR C in TST
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if (!S) _ = BarrelShifter.exec(true, cpu, opcode);
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if (!S) _ = BarrelShifter.exec(true, cpu, opcode);
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},
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},
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0x9 => {
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// TEQ
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const result = cpu.r[op1] ^ op2;
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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// Barrel Shifter should always calc CPSR C in TEQ
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if (!S) _ = BarrelShifter.exec(true, cpu, opcode);
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},
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0xD => {
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0xD => {
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// MOV
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// MOV
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cpu.r[rd] = op2;
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cpu.r[rd] = op2;
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@ -73,16 +64,6 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
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cpu.cpsr.c.write(op2 <= cpu.r[op1]);
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cpu.cpsr.c.write(op2 <= cpu.r[op1]);
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cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
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cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
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},
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},
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0xC => {
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// ORR
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const result = cpu.r[op1] | op2;
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if (S and rd != 0xF) {
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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// C set by Barr0x15el Shifter, V is unnafected
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}
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},
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else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
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else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
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}
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}
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}
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}
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