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No commits in common. "e5a76a3c025bf49a2f68944f4482ac8848fc8151" and "aca7fc9a60192cf340a83e1a381872237b344fc9" have entirely different histories.
e5a76a3c02
...
aca7fc9a60
13
src/Bus.zig
13
src/Bus.zig
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@ -8,7 +8,6 @@ const Iwram = @import("bus/Iwram.zig");
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const Ppu = @import("ppu.zig").Ppu;
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const Scheduler = @import("scheduler.zig").Scheduler;
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const io = @import("bus/io.zig");
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const Allocator = std.mem.Allocator;
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const log = std.log.scoped(.Bus);
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const Self = @This();
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@ -45,7 +44,7 @@ pub fn read32(self: *const Self, addr: u32) u32 {
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0x0000_0000...0x0000_3FFF => self.bios.get32(addr),
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0x0200_0000...0x0203_FFFF => self.iwram.get32(addr - 0x0200_0000),
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0x0300_0000...0x0300_7FFF => self.ewram.get32(addr - 0x0300_0000),
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0x0400_0000...0x0400_03FE => io.read32(self, addr),
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0x0400_0000...0x0400_03FE => self.io.read32(addr),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => self.ppu.palette.get32(addr - 0x0500_0000),
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@ -71,7 +70,7 @@ pub fn write32(self: *Self, addr: u32, word: u32) void {
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// General Internal Memory
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0x0200_0000...0x0203_FFFF => self.iwram.set32(addr - 0x0200_0000, word),
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0x0300_0000...0x0300_7FFF => self.ewram.set32(addr - 0x0300_0000, word),
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0x0400_0000...0x0400_03FE => io.write32(self, addr, word),
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0x0400_0000...0x0400_03FE => self.io.write32(addr, word),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => self.ppu.palette.set32(addr - 0x0500_0000, word),
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@ -88,7 +87,7 @@ pub fn read16(self: *const Self, addr: u32) u16 {
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0x0000_0000...0x0000_3FFF => self.bios.get16(addr),
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0x0200_0000...0x0203_FFFF => self.iwram.get16(addr - 0x0200_0000),
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0x0300_0000...0x0300_7FFF => self.ewram.get16(addr - 0x0300_0000),
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0x0400_0000...0x0400_03FE => io.read16(self, addr),
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0x0400_0000...0x0400_03FE => self.io.read16(addr),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => self.ppu.palette.get16(addr - 0x0500_0000),
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@ -113,7 +112,7 @@ pub fn write16(self: *Self, addr: u32, halfword: u16) void {
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// General Internal Memory
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0x0200_0000...0x0203_FFFF => self.iwram.set16(addr - 0x0200_0000, halfword),
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0x0300_0000...0x0300_7FFF => self.ewram.set16(addr - 0x0300_0000, halfword),
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0x0400_0000...0x0400_03FE => io.write16(self, addr, halfword),
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0x0400_0000...0x0400_03FE => self.io.write16(addr, halfword),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => self.ppu.palette.set16(addr - 0x0500_0000, halfword),
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@ -130,7 +129,7 @@ pub fn read8(self: *const Self, addr: u32) u8 {
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0x0000_0000...0x0000_3FFF => self.bios.get8(addr),
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0x0200_0000...0x0203_FFFF => self.iwram.get8(addr - 0x0200_0000),
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0x0300_0000...0x0300_7FFF => self.ewram.get8(addr - 0x0300_0000),
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0x0400_0000...0x0400_03FE => io.read8(self, addr),
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0x0400_0000...0x0400_03FE => self.io.read8(addr),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => self.ppu.palette.get8(addr - 0x0500_0000),
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@ -155,7 +154,7 @@ pub fn write8(self: *Self, addr: u32, byte: u8) void {
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// General Internal Memory
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0x0200_0000...0x0203_FFFF => self.iwram.set8(addr - 0x0200_0000, byte),
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0x0300_0000...0x0300_7FFF => self.ewram.set8(addr - 0x0300_0000, byte),
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0x0400_0000...0x0400_03FE => io.write8(self, addr, byte),
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0x0400_0000...0x0400_03FE => self.io.write8(addr, byte),
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// External Memory (Game Pak)
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0x0E00_0000...0x0E00_FFFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in Game Pak SRAM", .{ byte, addr }),
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172
src/bus/io.zig
172
src/bus/io.zig
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@ -2,30 +2,88 @@ const std = @import("std");
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const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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const Bus = @import("../Bus.zig");
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pub const Io = struct {
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const Self = @This();
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dispcnt: DisplayControl,
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dispstat: DisplayStatus,
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vcount: VCount,
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/// Read / Write
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ime: bool,
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ie: InterruptEnable,
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irq: InterruptRequest,
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keyinput: KeyInput,
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pub fn init() Self {
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return .{
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.dispcnt = .{ .raw = 0x0000 },
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.dispstat = .{ .raw = 0x0000 },
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.vcount = .{ .raw = 0x0000 },
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.ime = false,
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.ie = .{ .raw = 0x0000 },
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.irq = .{ .raw = 0x0000 },
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.keyinput = .{ .raw = 0x03FF },
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};
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}
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pub fn read32(self: *const Self, addr: u32) u32 {
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return switch (addr) {
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0x0400_0000 => self.dispcnt.raw,
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0x0400_0004 => self.dispstat.raw,
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0x0400_0006 => self.vcount.raw,
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0x0400_0200 => self.ie.raw,
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0x0400_0208 => @boolToInt(self.ime),
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else => std.debug.panic("[I/O:32] tried to read from {X:}", .{addr}),
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};
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}
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pub fn write32(self: *Self, addr: u32, word: u32) void {
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switch (addr) {
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0x0400_0000 => self.dispcnt.raw = @truncate(u16, word),
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0x0400_0200 => self.ie.raw = @truncate(u16, word),
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0x0400_0208 => self.ime = word & 1 == 1,
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else => std.debug.panic("[I/O:32] tried to write 0x{X:} to 0x{X:}", .{ word, addr }),
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}
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}
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pub fn read16(self: *const Self, addr: u32) u16 {
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return switch (addr) {
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0x0400_0000 => self.dispcnt.raw,
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0x0400_0004 => self.dispstat.raw,
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0x0400_0006 => self.vcount.raw,
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0x0400_0130 => self.keyinput.raw,
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0x0400_0200 => self.ie.raw,
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0x0400_0208 => @boolToInt(self.ime),
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else => std.debug.panic("[I/O:16] tried to read from {X:}", .{addr}),
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};
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}
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pub fn write16(self: *Self, addr: u32, halfword: u16) void {
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switch (addr) {
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0x0400_0000 => self.dispcnt.raw = halfword,
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0x0400_0004 => self.dispstat.raw = halfword,
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0x0400_0200 => self.ie.raw = halfword,
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0x0400_0208 => self.ime = halfword & 1 == 1,
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else => std.debug.panic("[I/O:16] tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
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}
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}
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pub fn read8(self: *const Self, addr: u32) u8 {
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return switch (addr) {
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0x0400_0000 => @truncate(u8, self.dispcnt.raw),
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0x0400_0004 => @truncate(u8, self.dispstat.raw),
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0x0400_0200 => @truncate(u8, self.ie.raw),
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0x0400_0006 => @truncate(u8, self.vcount.raw),
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else => std.debug.panic("[I/O:8] tried to read from {X:}", .{addr}),
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};
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}
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pub fn write8(_: *Self, addr: u32, byte: u8) void {
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std.debug.panic("[I/0:8] tried to write 0x{X:} to 0x{X:}", .{ byte, addr });
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}
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};
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/// Read / Write
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pub const DisplayControl = extern union {
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const DisplayControl = extern union {
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bg_mode: Bitfield(u16, 0, 3),
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frame_select: Bit(u16, 4),
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hblank_interval_free: Bit(u16, 5),
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@ -39,7 +97,7 @@ pub const DisplayControl = extern union {
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};
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/// Read / Write
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pub const DisplayStatus = extern union {
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const DisplayStatus = extern union {
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vblank: Bit(u16, 0),
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hblank: Bit(u16, 1),
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coincidence: Bit(u16, 2),
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@ -51,7 +109,7 @@ pub const DisplayStatus = extern union {
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};
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/// Read Only
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pub const VCount = extern union {
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const VCount = extern union {
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scanline: Bitfield(u16, 0, 8),
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raw: u16,
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};
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@ -90,103 +148,3 @@ const KeyInput = extern union {
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shoulder_l: Bit(u16, 9),
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raw: u16,
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};
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// Read / Write
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pub const BackgroundControl = extern union {
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bg_priority: Bitfield(u16, 0, 2),
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char_base: Bitfield(u16, 2, 2),
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mosaic_enable: Bit(u16, 6),
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palette_type: Bit(u16, 7),
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screen_base: Bitfield(u16, 8, 5),
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display_overflow: Bit(u16, 13),
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screen_size: Bitfield(u16, 14, 2),
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raw: u16,
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};
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/// Write Only
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pub const BackgroundOffset = extern union {
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offset: Bitfield(u16, 0, 9),
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raw: u16,
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};
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/// Read / Write
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const InterruptRequest = extern union {
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vblank: Bit(u16, 0),
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hblank: Bit(u16, 1),
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coincidence: Bit(u16, 2),
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tim0_overflow: Bit(u16, 3),
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tim1_overflow: Bit(u16, 4),
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tim2_overflow: Bit(u16, 5),
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tim3_overflow: Bit(u16, 6),
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serial: Bit(u16, 7),
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dma0: Bit(u16, 8),
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dma1: Bit(u16, 9),
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dma2: Bit(u16, 10),
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dma3: Bit(u16, 11),
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keypad: Bit(u16, 12),
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game_pak: Bit(u16, 13),
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raw: u16,
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};
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pub fn read32(bus: *const Bus, addr: u32) u32 {
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return switch (addr) {
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0x0400_0000 => bus.ppu.dispcnt.raw,
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0x0400_0004 => bus.ppu.dispstat.raw,
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0x0400_0006 => bus.ppu.vcount.raw,
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0x0400_0200 => bus.io.ie.raw,
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0x0400_0208 => @boolToInt(bus.io.ime),
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else => std.debug.panic("[I/O:32] tried to read from {X:}", .{addr}),
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};
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}
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pub fn write32(bus: *Bus, addr: u32, word: u32) void {
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switch (addr) {
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0x0400_0000 => bus.ppu.dispcnt.raw = @truncate(u16, word),
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0x0400_0200 => bus.io.ie.raw = @truncate(u16, word),
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0x0400_0208 => bus.io.ime = word & 1 == 1,
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else => std.debug.panic("[I/O:32] tried to write 0x{X:} to 0x{X:}", .{ word, addr }),
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}
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}
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pub fn read16(bus: *const Bus, addr: u32) u16 {
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return switch (addr) {
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0x0400_0000 => bus.ppu.dispcnt.raw,
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0x0400_0004 => bus.ppu.dispstat.raw,
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0x0400_0006 => bus.ppu.vcount.raw,
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0x0400_0130 => bus.io.keyinput.raw,
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0x0400_0200 => bus.io.ie.raw,
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0x0400_0208 => @boolToInt(bus.io.ime),
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else => std.debug.panic("[I/O:16] tried to read from {X:}", .{addr}),
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};
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}
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pub fn write16(bus: *Bus, addr: u32, halfword: u16) void {
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switch (addr) {
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0x0400_0000 => bus.ppu.dispcnt.raw = halfword,
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0x0400_0004 => bus.ppu.dispstat.raw = halfword,
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0x0400_0008 => bus.ppu.bg0.cnt.raw = halfword,
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0x0400_0010 => bus.ppu.bg0.hofs.raw = halfword,
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0x0400_0012 => bus.ppu.bg0.vofs.raw = halfword,
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0x0400_0200 => bus.io.ie.raw = halfword,
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0x0400_0202 => bus.io.irq.raw = halfword,
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0x0400_0208 => bus.io.ime = halfword & 1 == 1,
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else => std.debug.panic("[I/O:16] tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
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}
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}
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pub fn read8(bus: *const Bus, addr: u32) u8 {
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return switch (addr) {
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0x0400_0000 => @truncate(u8, bus.ppu.dispcnt.raw),
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0x0400_0004 => @truncate(u8, bus.ppu.dispstat.raw),
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0x0400_0200 => @truncate(u8, bus.io.ie.raw),
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0x0400_0006 => @truncate(u8, bus.ppu.vcount.raw),
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else => std.debug.panic("[I/O:8] tried to read from {X:}", .{addr}),
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};
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}
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pub fn write8(self: *Bus, addr: u32, byte: u8) void {
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switch (addr) {
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0x0400_0208 => self.io.ime = byte & 1 == 1,
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else => std.debug.panic("[I/0:8] tried to write 0x{X:} to 0x{X:}", .{ byte, addr }),
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}
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}
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55
src/ppu.zig
55
src/ppu.zig
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@ -1,11 +1,10 @@
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const std = @import("std");
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const io = @import("bus/io.zig");
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const EventKind = @import("scheduler.zig").EventKind;
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const Io = @import("bus/io.zig").Io;
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const Scheduler = @import("scheduler.zig").Scheduler;
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const Allocator = std.mem.Allocator;
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pub const width = 240;
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pub const height = 160;
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pub const framebuf_pitch = width * @sizeOf(u16);
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@ -13,16 +12,6 @@ pub const framebuf_pitch = width * @sizeOf(u16);
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pub const Ppu = struct {
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const Self = @This();
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// Registers
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bg0: Background,
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bg1: Background,
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bg2: Background,
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bg3: Background,
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dispcnt: io.DisplayControl,
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dispstat: io.DisplayStatus,
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vcount: io.VCount,
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vram: Vram,
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palette: Palette,
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oam: Oam,
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@ -44,15 +33,6 @@ pub const Ppu = struct {
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.sched = sched,
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.framebuf = framebuf,
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.alloc = alloc,
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// Registers
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.bg0 = Background.init(),
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.bg1 = Background.init(),
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.bg2 = Background.init(),
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.bg3 = Background.init(),
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.dispcnt = .{ .raw = 0x0000 },
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.dispstat = .{ .raw = 0x0000 },
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.vcount = .{ .raw = 0x0000 },
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};
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}
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@ -62,15 +42,11 @@ pub const Ppu = struct {
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self.palette.deinit();
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}
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pub fn drawScanline(self: *Self) void {
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const bg_mode = self.dispcnt.bg_mode.read();
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const scanline = self.vcount.scanline.read();
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pub fn drawScanline(self: *Self, io: *const Io) void {
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const bg_mode = io.dispcnt.bg_mode.read();
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const scanline = io.vcount.scanline.read();
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switch (bg_mode) {
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0x0 => {
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// Mode 0
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},
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0x3 => {
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const start = framebuf_pitch * @as(usize, scanline);
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const end = start + framebuf_pitch;
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@ -78,7 +54,7 @@ pub const Ppu = struct {
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std.mem.copy(u8, self.framebuf[start..end], self.vram.buf[start..end]);
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},
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0x4 => {
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const select = self.dispcnt.frame_select.read();
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const select = io.dispcnt.frame_select.read();
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const vram_start = width * @as(usize, scanline);
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const buf_start = vram_start * @sizeOf(u16);
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@ -94,7 +70,7 @@ pub const Ppu = struct {
|
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self.framebuf[buf_start + j] = self.palette.buf[id];
|
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}
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},
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else => std.debug.panic("[PPU] TODO: Implement BG Mode {}", .{bg_mode}),
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else => {}, // std.debug.panic("[PPU] TODO: Implement BG Mode {}", .{bg_mode}),
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}
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||||
}
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||||
};
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@ -225,22 +201,3 @@ const Oam = struct {
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return self.buf[idx];
|
||||
}
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};
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const Background = struct {
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||||
const Self = @This();
|
||||
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||||
/// Read / Write
|
||||
cnt: io.BackgroundControl,
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||||
/// Write Only
|
||||
hofs: io.BackgroundOffset,
|
||||
/// Write Only
|
||||
vofs: io.BackgroundOffset,
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||||
|
||||
fn init() Self {
|
||||
return .{
|
||||
.cnt = .{ .raw = 0x0000 },
|
||||
.hofs = .{ .raw = 0x0000 },
|
||||
.vofs = .{ .raw = 0x0000 },
|
||||
};
|
||||
}
|
||||
};
|
||||
|
|
|
|||
|
|
@ -38,28 +38,28 @@ pub const Scheduler = struct {
|
|||
},
|
||||
.HBlank => {
|
||||
// The End of a Hblank (During Draw or Vblank)
|
||||
const old_scanline = bus.ppu.vcount.scanline.read();
|
||||
const old_scanline = bus.io.vcount.scanline.read();
|
||||
const scanline = (old_scanline + 1) % 228;
|
||||
|
||||
bus.ppu.vcount.scanline.write(scanline);
|
||||
bus.ppu.dispstat.hblank.unset();
|
||||
bus.io.vcount.scanline.write(scanline);
|
||||
bus.io.dispstat.hblank.unset();
|
||||
|
||||
if (scanline < 160) {
|
||||
// Transitioning to another Draw
|
||||
self.push(.Draw, self.tick + (240 * 4));
|
||||
} else {
|
||||
// Transitioning to a Vblank
|
||||
if (scanline < 227) bus.ppu.dispstat.vblank.set() else bus.ppu.dispstat.vblank.unset();
|
||||
if (scanline < 227) bus.io.dispstat.vblank.set() else bus.io.dispstat.vblank.unset();
|
||||
|
||||
self.push(.VBlank, self.tick + (240 * 4));
|
||||
}
|
||||
},
|
||||
.Draw => {
|
||||
// The end of a Draw
|
||||
bus.ppu.drawScanline();
|
||||
bus.ppu.drawScanline(&bus.io);
|
||||
|
||||
// Transitioning to a Hblank
|
||||
bus.ppu.dispstat.hblank.set();
|
||||
bus.io.dispstat.hblank.set();
|
||||
self.push(.HBlank, self.tick + (68 * 4));
|
||||
},
|
||||
.VBlank => {
|
||||
|
|
|
|||
Loading…
Reference in New Issue