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16 changed files with 281 additions and 275 deletions

153
src/Bus.zig Normal file
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const std = @import("std");
const Scheduler = @import("scheduler.zig").Scheduler;
const Io = @import("bus/io.zig").Io;
const Bios = @import("bus/Bios.zig");
const GamePak = @import("bus/GamePak.zig");
const Ppu = @import("ppu.zig").Ppu;
const Allocator = std.mem.Allocator;
pak: GamePak,
bios: Bios,
ppu: Ppu,
io: Io,
pub fn init(alloc: Allocator, sched: *Scheduler, path: []const u8) !@This() {
return @This(){
.pak = try GamePak.init(alloc, path),
.bios = try Bios.init(alloc, "./bin/gba_bios.bin"), // TODO: don't hardcode this + bundle open-sorce Boot ROM
.ppu = try Ppu.init(alloc, sched),
.io = Io.init(),
};
}
pub fn deinit(self: @This()) void {
self.pak.deinit();
self.bios.deinit();
self.ppu.deinit();
}
pub fn read32(self: *const @This(), addr: u32) u32 {
return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get32(@as(usize, addr)),
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:32] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:32] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => self.read32(addr),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.get32(@as(usize, addr - 0x0500_0000)),
0x0600_0000...0x0601_7FFF => self.ppu.vram.get32(@as(usize, addr - 0x0600_0000)),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get32(@as(usize, addr - 0x0800_0000)),
0x0A00_0000...0x0BFF_FFFF => self.pak.get32(@as(usize, addr - 0x0A00_0000)),
0x0C00_0000...0x0DFF_FFFF => self.pak.get32(@as(usize, addr - 0x0C00_0000)),
else => {
std.log.warn("[Bus:32] ZBA tried to read from 0x{X:}", .{addr});
return 0x0000_0000;
},
};
}
pub fn write32(self: *@This(), addr: u32, word: u32) void {
// TODO: write32 can write to GamePak Flash
switch (addr) {
// General Internal Memory
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in IWRAM", .{ word, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in EWRAM", .{ word, addr }),
0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in I/O", .{ word, addr }),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.set32(@as(usize, addr - 0x0500_0000), word),
0x0600_0000...0x0601_7FFF => self.ppu.vram.set32(@as(usize, addr - 0x0600_0000), word),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in OAM", .{ word, addr }),
else => std.log.warn("[Bus:32] ZBA tried to write 0x{X:} to 0x{X:}", .{ word, addr }),
}
}
pub fn read16(self: *const @This(), addr: u32) u16 {
return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get16(@as(usize, addr)),
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:16] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:16] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => self.io.read16(addr),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.get16(@as(usize, addr - 0x0500_0000)),
0x0600_0000...0x0601_7FFF => self.ppu.vram.get16(@as(usize, addr - 0x0600_0000)),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get16(@as(usize, addr - 0x0800_0000)),
0x0A00_0000...0x0BFF_FFFF => self.pak.get16(@as(usize, addr - 0x0A00_0000)),
0x0C00_0000...0x0DFF_FFFF => self.pak.get16(@as(usize, addr - 0x0C00_0000)),
else => {
std.log.warn("[Bus:16] ZBA tried to read from 0x{X:}", .{addr});
return 0x0000;
},
};
}
pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
// TODO: write16 can write to GamePak Flash
switch (addr) {
// General Internal Memory
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in IWRAM", .{ halfword, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in EWRAM", .{ halfword, addr }),
0x0400_0000...0x0400_03FE => self.io.write16(addr, halfword),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.set16(@as(usize, addr - 0x0500_0000), halfword),
0x0600_0000...0x0601_7FFF => self.ppu.vram.set16(@as(usize, addr - 0x0600_0000), halfword),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in OAM", .{ halfword, addr }),
else => std.log.warn("[Bus:16] ZBA tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
}
}
pub fn read8(self: *const @This(), addr: u32) u8 {
return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get8(@as(usize, addr)),
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:8] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:8] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => self.io.read8(addr),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.get8(@as(usize, addr - 0x0500_0000)),
0x0600_0000...0x0601_7FFF => self.ppu.vram.get8(@as(usize, addr - 0x0600_0000)),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get8(@as(usize, addr - 0x0800_0000)),
0x0A00_0000...0x0BFF_FFFF => self.pak.get8(@as(usize, addr - 0x0A00_0000)),
0x0C00_0000...0x0DFF_FFFF => self.pak.get8(@as(usize, addr - 0x0C00_0000)),
0x0E00_0000...0x0E00_FFFF => std.debug.panic("[Bus:8] read from 0x{X:} in Game Pak SRAM", .{addr}),
else => {
std.log.warn("[Bus:8] ZBA tried to read from 0x{X:}", .{addr});
return 0x00;
},
};
}
pub fn write8(_: *@This(), addr: u32, byte: u8) void {
switch (addr) {
// General Internal Memory
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in IWRAM", .{ byte, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in EWRAM", .{ byte, addr }),
0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in I/O", .{ byte, addr }),
// External Memory (Game Pak)
0x0E00_0000...0x0E00_FFFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in Game Pak SRAM", .{ byte, addr }),
else => std.log.warn("[Bus:8] ZBA tried to write 0x{X:} to 0x{X:}", .{ byte, addr }),
}
}

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@ -1,155 +0,0 @@
const std = @import("std");
const Scheduler = @import("scheduler.zig").Scheduler;
const Io = @import("bus/io.zig").Io;
const Bios = @import("bus/bios.zig").Bios;
const GamePak = @import("bus/pak.zig").GamePak;
const Ppu = @import("ppu.zig").Ppu;
const Allocator = std.mem.Allocator;
pub const Bus = struct {
pak: GamePak,
bios: Bios,
ppu: Ppu,
io: Io,
pub fn init(alloc: Allocator, sched: *Scheduler, path: []const u8) !@This() {
return @This(){
.pak = try GamePak.init(alloc, path),
.bios = try Bios.init(alloc, "./bin/gba_bios.bin"), // TODO: don't hardcode this + bundle open-sorce Boot ROM
.ppu = try Ppu.init(alloc, sched),
.io = Io.init(),
};
}
pub fn deinit(self: *@This()) void {
self.pak.deinit();
self.bios.deinit();
self.ppu.deinit();
}
pub fn read32(self: *const @This(), addr: u32) u32 {
return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get32(@as(usize, addr)),
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:32] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:32] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => self.read32(addr),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.get32(@as(usize, addr - 0x0500_0000)),
0x0600_0000...0x0601_7FFF => self.ppu.vram.get32(@as(usize, addr - 0x0600_0000)),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get32(@as(usize, addr - 0x0800_0000)),
0x0A00_0000...0x0BFF_FFFF => self.pak.get32(@as(usize, addr - 0x0A00_0000)),
0x0C00_0000...0x0DFF_FFFF => self.pak.get32(@as(usize, addr - 0x0C00_0000)),
else => {
std.log.warn("[Bus:32] ZBA tried to read from 0x{X:}", .{addr});
return 0x0000_0000;
},
};
}
pub fn write32(self: *@This(), addr: u32, word: u32) void {
// TODO: write32 can write to GamePak Flash
switch (addr) {
// General Internal Memory
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in IWRAM", .{ word, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in EWRAM", .{ word, addr }),
0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in I/O", .{ word, addr }),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.set32(@as(usize, addr - 0x0500_0000), word),
0x0600_0000...0x0601_7FFF => self.ppu.vram.set32(@as(usize, addr - 0x0600_0000), word),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in OAM", .{ word, addr }),
else => std.log.warn("[Bus:32] ZBA tried to write 0x{X:} to 0x{X:}", .{ word, addr }),
}
}
pub fn read16(self: *const @This(), addr: u32) u16 {
return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get16(@as(usize, addr)),
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:16] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:16] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => self.io.read16(addr),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.get16(@as(usize, addr - 0x0500_0000)),
0x0600_0000...0x0601_7FFF => self.ppu.vram.get16(@as(usize, addr - 0x0600_0000)),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get16(@as(usize, addr - 0x0800_0000)),
0x0A00_0000...0x0BFF_FFFF => self.pak.get16(@as(usize, addr - 0x0A00_0000)),
0x0C00_0000...0x0DFF_FFFF => self.pak.get16(@as(usize, addr - 0x0C00_0000)),
else => {
std.log.warn("[Bus:16] ZBA tried to read from 0x{X:}", .{addr});
return 0x0000;
},
};
}
pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
// TODO: write16 can write to GamePak Flash
switch (addr) {
// General Internal Memory
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in IWRAM", .{ halfword, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in EWRAM", .{ halfword, addr }),
0x0400_0000...0x0400_03FE => self.io.write16(addr, halfword),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.set16(@as(usize, addr - 0x0500_0000), halfword),
0x0600_0000...0x0601_7FFF => self.ppu.vram.set16(@as(usize, addr - 0x0600_0000), halfword),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in OAM", .{ halfword, addr }),
else => std.log.warn("[Bus:16] ZBA tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
}
}
pub fn read8(self: *const @This(), addr: u32) u8 {
return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get8(@as(usize, addr)),
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:8] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:8] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => self.io.read8(addr),
// Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.get8(@as(usize, addr - 0x0500_0000)),
0x0600_0000...0x0601_7FFF => self.ppu.vram.get8(@as(usize, addr - 0x0600_0000)),
0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get8(@as(usize, addr - 0x0800_0000)),
0x0A00_0000...0x0BFF_FFFF => self.pak.get8(@as(usize, addr - 0x0A00_0000)),
0x0C00_0000...0x0DFF_FFFF => self.pak.get8(@as(usize, addr - 0x0C00_0000)),
0x0E00_0000...0x0E00_FFFF => std.debug.panic("[Bus:8] read from 0x{X:} in Game Pak SRAM", .{addr}),
else => {
std.log.warn("[Bus:8] ZBA tried to read from 0x{X:}", .{addr});
return 0x00;
},
};
}
pub fn write8(_: *@This(), addr: u32, byte: u8) void {
switch (addr) {
// General Internal Memory
0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in IWRAM", .{ byte, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in EWRAM", .{ byte, addr }),
0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in I/O", .{ byte, addr }),
// External Memory (Game Pak)
0x0E00_0000...0x0E00_FFFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in Game Pak SRAM", .{ byte, addr }),
else => std.log.warn("[Bus:8] ZBA tried to write 0x{X:} to 0x{X:}", .{ byte, addr }),
}
}
};

38
src/bus/Bios.zig Normal file
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@ -0,0 +1,38 @@
const std = @import("std");
const Allocator = std.mem.Allocator;
const Self = @This();
buf: []u8,
alloc: Allocator,
pub fn init(alloc: Allocator, path: []const u8) !Self {
const file = try std.fs.cwd().openFile(path, .{ .read = true });
defer file.close();
const len = try file.getEndPos();
return Self{
.buf = try file.readToEndAlloc(alloc, len),
.alloc = alloc,
};
}
pub fn deinit(self: Self) void {
self.alloc.free(self.buf);
}
pub inline fn get32(self: *const Self, idx: usize) u32 {
std.debug.panic("[BIOS] TODO: BIOS is not implemented", .{});
return (@as(u32, self.buf[idx + 3]) << 24) | (@as(u32, self.buf[idx + 2]) << 16) | (@as(u32, self.buf[idx + 1]) << 8) | (@as(u32, self.buf[idx]));
}
pub inline fn get16(self: *const Self, idx: usize) u16 {
std.debug.panic("[BIOS] TODO: BIOS is not implemented", .{});
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
}
pub inline fn get8(self: *const Self, idx: usize) u8 {
std.debug.panic("[BIOS] TODO: BIOS is not implemented", .{});
return self.buf[idx];
}

35
src/bus/GamePak.zig Normal file
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@ -0,0 +1,35 @@
const std = @import("std");
const Allocator = std.mem.Allocator;
const Self = @This();
buf: []u8,
alloc: Allocator,
pub fn init(alloc: Allocator, path: []const u8) !Self {
const file = try std.fs.cwd().openFile(path, .{ .read = true });
defer file.close();
const len = try file.getEndPos();
return Self{
.buf = try file.readToEndAlloc(alloc, len),
.alloc = alloc,
};
}
pub fn deinit(self: Self) void {
self.alloc.free(self.buf);
}
pub inline fn get32(self: *const Self, idx: usize) u32 {
return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx));
}
pub inline fn get16(self: *const Self, idx: usize) u16 {
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
}
pub inline fn get8(self: *const Self, idx: usize) u8 {
return self.buf[idx];
}

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@ -1,39 +0,0 @@
const std = @import("std");
const Allocator = std.mem.Allocator;
pub const Bios = struct {
buf: []u8,
alloc: Allocator,
pub fn init(alloc: Allocator, path: []const u8) !@This() {
const file = try std.fs.cwd().openFile(path, .{ .read = true });
defer file.close();
const len = try file.getEndPos();
return @This(){
.buf = try file.readToEndAlloc(alloc, len),
.alloc = alloc,
};
}
pub fn deinit(self: *@This()) void {
self.alloc.free(self.buf);
}
pub inline fn get32(self: *const @This(), idx: usize) u32 {
std.debug.panic("[BIOS] TODO: BIOS is not implemented", .{});
return (@as(u32, self.buf[idx + 3]) << 24) | (@as(u32, self.buf[idx + 2]) << 16) | (@as(u32, self.buf[idx + 1]) << 8) | (@as(u32, self.buf[idx]));
}
pub inline fn get16(self: *const @This(), idx: usize) u16 {
std.debug.panic("[BIOS] TODO: BIOS is not implemented", .{});
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
}
pub inline fn get8(self: *const @This(), idx: usize) u8 {
std.debug.panic("[BIOS] TODO: BIOS is not implemented", .{});
return self.buf[idx];
}
};

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@ -5,11 +5,13 @@ const Bitfield = bitfield.Bitfield;
const Bit = bitfield.Bit; const Bit = bitfield.Bit;
pub const Io = struct { pub const Io = struct {
const Self = @This();
dispcnt: DispCnt, dispcnt: DispCnt,
dispstat: DispStat, dispstat: DispStat,
vcount: VCount, vcount: VCount,
pub fn init() @This() { pub fn init() Self {
return .{ return .{
.dispcnt = .{ .raw = 0x0000_0000 }, .dispcnt = .{ .raw = 0x0000_0000 },
.dispstat = .{ .raw = 0x0000_0000 }, .dispstat = .{ .raw = 0x0000_0000 },
@ -17,7 +19,7 @@ pub const Io = struct {
}; };
} }
pub fn read32(self: *const @This(), addr: u32) u32 { pub fn read32(self: *const Self, addr: u32) u32 {
return switch (addr) { return switch (addr) {
0x0400_0000 => @as(u32, self.dispcnt.raw), 0x0400_0000 => @as(u32, self.dispcnt.raw),
0x0400_0004 => @as(u32, self.dispstat.raw), 0x0400_0004 => @as(u32, self.dispstat.raw),
@ -25,7 +27,7 @@ pub const Io = struct {
}; };
} }
pub fn read16(self: *const @This(), addr: u32) u16 { pub fn read16(self: *const Self, addr: u32) u16 {
return switch (addr) { return switch (addr) {
0x0400_0000 => self.dispcnt.raw, 0x0400_0000 => self.dispcnt.raw,
0x0400_0004 => self.dispstat.raw, 0x0400_0004 => self.dispstat.raw,
@ -33,7 +35,7 @@ pub const Io = struct {
}; };
} }
pub fn write16(self: *@This(), addr: u32, halfword: u16) void { pub fn write16(self: *Self, addr: u32, halfword: u16) void {
switch (addr) { switch (addr) {
0x0400_0000 => self.dispcnt.raw = halfword, 0x0400_0000 => self.dispcnt.raw = halfword,
0x0400_0004 => self.dispstat.raw = halfword, 0x0400_0004 => self.dispstat.raw = halfword,
@ -41,7 +43,7 @@ pub const Io = struct {
} }
} }
pub fn read8(self: *const @This(), addr: u32) u8 { pub fn read8(self: *const Self, addr: u32) u8 {
return switch (addr) { return switch (addr) {
0x0400_0000 => @truncate(u8, self.dispcnt.raw), 0x0400_0000 => @truncate(u8, self.dispcnt.raw),
0x0400_0004 => @truncate(u8, self.dispstat.raw), 0x0400_0004 => @truncate(u8, self.dispstat.raw),

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@ -1,36 +0,0 @@
const std = @import("std");
const Allocator = std.mem.Allocator;
pub const GamePak = struct {
buf: []u8,
alloc: Allocator,
pub fn init(alloc: Allocator, path: []const u8) !@This() {
const file = try std.fs.cwd().openFile(path, .{ .read = true });
defer file.close();
const len = try file.getEndPos();
return @This(){
.buf = try file.readToEndAlloc(alloc, len),
.alloc = alloc,
};
}
pub fn deinit(self: *@This()) void {
self.alloc.free(self.buf);
}
pub inline fn get32(self: *const @This(), idx: usize) u32 {
return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx));
}
pub inline fn get16(self: *const @This(), idx: usize) u16 {
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
}
pub inline fn get8(self: *const @This(), idx: usize) u8 {
return self.buf[idx];
}
};

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@ -3,15 +3,16 @@ const util = @import("util.zig");
const bitfield = @import("bitfield"); const bitfield = @import("bitfield");
const BarrelShifter = @import("cpu/barrel_shifter.zig"); const BarrelShifter = @import("cpu/barrel_shifter.zig");
const Bus = @import("bus.zig").Bus; const Bus = @import("Bus.zig");
const Scheduler = @import("scheduler.zig").Scheduler; const Scheduler = @import("scheduler.zig").Scheduler;
const Bitfield = bitfield.Bitfield; const Bitfield = bitfield.Bitfield;
const Bit = bitfield.Bit; const Bit = bitfield.Bit;
const comptimeDataProcessing = @import("cpu/data_processing.zig").comptimeDataProcessing; const dataProcessing = @import("cpu/data_processing.zig").dataProcessing;
const comptimeSingleDataTransfer = @import("cpu/single_data_transfer.zig").comptimeSingleDataTransfer; const singleDataTransfer = @import("cpu/single_data_transfer.zig").singleDataTransfer;
const comptimeHalfSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").comptimeHalfSignedDataTransfer; const halfAndSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
const branch = @import("cpu/branch.zig").branch;
pub const InstrFn = fn (*Arm7tdmi, *Bus, u32) void; pub const InstrFn = fn (*Arm7tdmi, *Bus, u32) void;
const arm_lut: [0x1000]InstrFn = populate(); const arm_lut: [0x1000]InstrFn = populate();
@ -58,7 +59,7 @@ pub const Arm7tdmi = struct {
return word; return word;
} }
fn fakePC(self: *const @This()) u32 { pub fn fakePC(self: *const @This()) u32 {
return self.r[15] + 4; return self.r[15] + 4;
} }
@ -128,7 +129,7 @@ fn populate() [0x1000]InstrFn {
const S = i >> 4 & 1 == 1; const S = i >> 4 & 1 == 1;
const instrKind = i >> 5 & 0xF; const instrKind = i >> 5 & 0xF;
lut[i] = comptimeDataProcessing(I, S, instrKind); lut[i] = dataProcessing(I, S, instrKind);
} }
if (i >> 9 & 0x7 == 0b000 and i >> 3 & 1 == 1 and i & 1 == 1) { if (i >> 9 & 0x7 == 0b000 and i >> 3 & 1 == 1 and i & 1 == 1) {
@ -138,7 +139,7 @@ fn populate() [0x1000]InstrFn {
const W = i >> 5 & 1 == 1; const W = i >> 5 & 1 == 1;
const L = i >> 4 & 1 == 1; const L = i >> 4 & 1 == 1;
lut[i] = comptimeHalfSignedDataTransfer(P, U, I, W, L); lut[i] = halfAndSignedDataTransfer(P, U, I, W, L);
} }
if (i >> 10 & 0x3 == 0b01) { if (i >> 10 & 0x3 == 0b01) {
@ -149,12 +150,12 @@ fn populate() [0x1000]InstrFn {
const W = i >> 5 & 1 == 1; const W = i >> 5 & 1 == 1;
const L = i >> 4 & 1 == 1; const L = i >> 4 & 1 == 1;
lut[i] = comptimeSingleDataTransfer(I, P, U, B, W, L); lut[i] = singleDataTransfer(I, P, U, B, W, L);
} }
if (i >> 9 & 0x7 == 0b101) { if (i >> 9 & 0x7 == 0b101) {
const L = i >> 8 & 1 == 1; const L = i >> 8 & 1 == 1;
lut[i] = comptimeBranch(L); lut[i] = branch(L);
} }
} }
@ -188,15 +189,3 @@ fn undefinedInstruction(_: *Arm7tdmi, _: *Bus, opcode: u32) void {
const id = armIdx(opcode); const id = armIdx(opcode);
std.debug.panic("[CPU] {{0x{X:}}} 0x{X:} is an illegal opcode", .{ id, opcode }); std.debug.panic("[CPU] {{0x{X:}}} 0x{X:} is an illegal opcode", .{ id, opcode });
} }
fn comptimeBranch(comptime L: bool) InstrFn {
return struct {
fn branch(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
if (L) {
cpu.r[14] = cpu.r[15] - 4;
}
cpu.r[15] = cpu.fakePC() +% util.u32SignExtend(24, opcode << 2);
}
}.branch;
}

19
src/cpu/branch.zig Normal file
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@ -0,0 +1,19 @@
const arm = @import("../cpu.zig");
const util = @import("../util.zig");
const Bus = @import("../Bus.zig");
const Arm7tdmi = arm.Arm7tdmi;
const InstrFn = arm.InstrFn;
pub fn branch(comptime L: bool) InstrFn {
return struct {
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
if (L) {
cpu.r[14] = cpu.r[15] - 4;
}
cpu.r[15] = cpu.fakePC() +% util.u32SignExtend(24, opcode << 2);
}
}.inner;
}

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@ -2,13 +2,13 @@ const std = @import("std");
const arm = @import("../cpu.zig"); const arm = @import("../cpu.zig");
const BarrelShifter = @import("barrel_shifter.zig"); const BarrelShifter = @import("barrel_shifter.zig");
const Bus = @import("../bus.zig").Bus; const Bus = @import("../Bus.zig");
const Arm7tdmi = arm.Arm7tdmi; const Arm7tdmi = arm.Arm7tdmi;
const InstrFn = arm.InstrFn; const InstrFn = arm.InstrFn;
pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn { pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
return struct { return struct {
fn dataProcessing(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void { fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
const rd = opcode >> 12 & 0xF; const rd = opcode >> 12 & 0xF;
const op1 = opcode >> 16 & 0xF; const op1 = opcode >> 16 & 0xF;
@ -68,5 +68,5 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}), else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
} }
} }
}.dataProcessing; }.inner;
} }

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@ -2,13 +2,13 @@ const std = @import("std");
const arm = @import("../cpu.zig"); const arm = @import("../cpu.zig");
const util = @import("../util.zig"); const util = @import("../util.zig");
const Bus = @import("../bus.zig").Bus; const Bus = @import("../Bus.zig");
const Arm7tdmi = arm.Arm7tdmi; const Arm7tdmi = arm.Arm7tdmi;
const InstrFn = arm.InstrFn; const InstrFn = arm.InstrFn;
pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn { pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
return struct { return struct {
fn halfSignedDataTransfer(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void { fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
const rn = opcode >> 16 & 0xF; const rn = opcode >> 16 & 0xF;
const rd = opcode >> 12 & 0xF; const rd = opcode >> 12 & 0xF;
const rm = opcode & 0xF; const rm = opcode & 0xF;
@ -59,5 +59,5 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
address = modified_base; address = modified_base;
if (W and P or !P) cpu.r[rn] = address; if (W and P or !P) cpu.r[rn] = address;
} }
}.halfSignedDataTransfer; }.inner;
} }

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@ -3,14 +3,14 @@ const util = @import("../util.zig");
const arm = @import("../cpu.zig"); const arm = @import("../cpu.zig");
const BarrelShifter = @import("barrel_shifter.zig"); const BarrelShifter = @import("barrel_shifter.zig");
const Bus = @import("../bus.zig").Bus; const Bus = @import("../Bus.zig");
const Arm7tdmi = arm.Arm7tdmi; const Arm7tdmi = arm.Arm7tdmi;
const InstrFn = arm.InstrFn; const InstrFn = arm.InstrFn;
const CPSR = arm.CPSR; const CPSR = arm.CPSR;
pub fn comptimeSingleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn { pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
return struct { return struct {
fn singleDataTransfer(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void { fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
const rn = opcode >> 16 & 0xF; const rn = opcode >> 16 & 0xF;
const rd = opcode >> 12 & 0xF; const rd = opcode >> 12 & 0xF;
@ -46,7 +46,7 @@ pub fn comptimeSingleDataTransfer(comptime I: bool, comptime P: bool, comptime U
// TODO: W-bit forces non-privledged mode for the transfer // TODO: W-bit forces non-privledged mode for the transfer
} }
}.singleDataTransfer; }.inner;
} }
fn registerOffset(cpu: *Arm7tdmi, opcode: u32) u32 { fn registerOffset(cpu: *Arm7tdmi, opcode: u32) u32 {

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@ -1,6 +1,6 @@
const Bus = @import("Bus.zig");
const Scheduler = @import("scheduler.zig").Scheduler; const Scheduler = @import("scheduler.zig").Scheduler;
const Arm7tdmi = @import("cpu.zig").Arm7tdmi; const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
const Bus = @import("bus.zig").Bus;
const cycles_per_frame: u64 = 100; // TODO: How many cycles actually? const cycles_per_frame: u64 = 100; // TODO: How many cycles actually?

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@ -2,7 +2,7 @@ const std = @import("std");
const emu = @import("emu.zig"); const emu = @import("emu.zig");
const Scheduler = @import("scheduler.zig").Scheduler; const Scheduler = @import("scheduler.zig").Scheduler;
const Bus = @import("bus.zig").Bus; const Bus = @import("Bus.zig");
const Arm7tdmi = @import("cpu.zig").Arm7tdmi; const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
pub fn main() anyerror!void { pub fn main() anyerror!void {

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@ -20,7 +20,7 @@ pub const Ppu = struct {
}; };
} }
pub fn deinit(self: *@This()) void { pub fn deinit(self: @This()) void {
self.vram.deinit(); self.vram.deinit();
} }
}; };
@ -36,7 +36,7 @@ const Palette = struct {
}; };
} }
fn deinit(self: *@This()) void { fn deinit(self: @This()) void {
self.alloc.free(self.buf); self.alloc.free(self.buf);
} }
@ -74,7 +74,7 @@ const Vram = struct {
}; };
} }
fn deinit(self: *@This()) void { fn deinit(self: @This()) void {
self.alloc.free(self.buf); self.alloc.free(self.buf);
} }

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@ -1,6 +1,6 @@
const std = @import("std"); const std = @import("std");
const Bus = @import("bus.zig").Bus; const Bus = @import("Bus.zig");
const Arm7tdmi = @import("cpu.zig").Arm7tdmi; const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
const Order = std.math.Order; const Order = std.math.Order;
const PriorityQueue = std.PriorityQueue; const PriorityQueue = std.PriorityQueue;
@ -21,7 +21,7 @@ pub const Scheduler = struct {
return scheduler; return scheduler;
} }
pub fn deinit(self: *@This()) void { pub fn deinit(self: @This()) void {
self.queue.deinit(); self.queue.deinit();
} }