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base: paoda:aa6f3c7a92230c42d72a6013fef0b06cdb90c4da
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paoda:april-fools
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paoda:apu-things
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compare: paoda:166bc6fc6dd6f39da10aa13b3d82579ba9996558
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paoda:april-fools
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paoda:apu-things

No commits in common. "aa6f3c7a92230c42d72a6013fef0b06cdb90c4da" and "166bc6fc6dd6f39da10aa13b3d82579ba9996558" have entirely different histories.
aa6f3c7a92 ... 166bc6fc6d

2 changed files with 7 additions and 37 deletions
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34
src/cpu/thumb/block_data_transfer.zig
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@ -50,47 +50,23 @@ pub fn format14(comptime L: bool, comptime R: bool) InstrFn {
pub fn format15(comptime L: bool, comptime rb: u3) InstrFn { pub fn format15(comptime L: bool, comptime rb: u3) InstrFn {
return struct { return struct {
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void { fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
var address = cpu.r[rb]; const base = cpu.r[rb];
const end_address = cpu.r[rb] + 4 * countRlist(opcode);
if (opcode & 0xFF == 0) { var address: u32 = base;
if (L) cpu.r[15] = bus.read32(address) else bus.write32(address, cpu.r[15] + 4); // TODO: Why is this r[15] + 4?
cpu.r[rb] += 0x40;
return;
}
var i: u4 = 0;
var first_write = true;
var i: usize = 0;
while (i < 8) : (i += 1) { while (i < 8) : (i += 1) {
if (opcode >> i & 1 == 1) { if ((opcode >> @truncate(u3, i)) & 1 == 1) {
if (L) { if (L) {
cpu.r[i] = bus.read32(address); cpu.r[i] = bus.read32(address);
} else { } else {
bus.write32(address, cpu.r[i]); bus.write32(address, cpu.r[i]);
} }
if (!L and first_write) {
cpu.r[rb] = end_address;
first_write = false;
}
address += 4; address += 4;
} }
} }
if (L and opcode >> rb & 1 != 1) cpu.r[rb] = address; cpu.r[rb] = address;
} }
}.inner; }.inner;
} }
inline fn countRlist(opcode: u16) u32 {
var count: u32 = 0;
comptime var i: u4 = 0;
inline while (i < 8) : (i += 1) {
if (opcode >> (7 - i) & 1 == 1) count += 1;
}
return count;
}

10
src/cpu/thumb/data_transfer.zig
View File

@ -44,14 +44,8 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
cpu.r[rd] = std.math.rotr(u32, @as(u32, value), 8 * (address & 1)); cpu.r[rd] = std.math.rotr(u32, @as(u32, value), 8 * (address & 1));
}, },
0b11 => { 0b11 => {
// LDRSH // LDSH
const value = if (address & 1 == 1) blk: { cpu.r[rd] = u32SignExtend(16, @as(u32, bus.read16(address & 0xFFFF_FFFE)));
break :blk u32SignExtend(8, bus.read8(address));
} else blk: {
break :blk u32SignExtend(16, bus.read16(address));
};
cpu.r[rd] = std.math.rotr(u32, value, 8 * (address & 1));
}, },
} }
} else { } else {