feat(cpu): implement fix for ADC and implement SBC

src/cpu/arm/barrel_shifter.zig

@@ -81,7 +81,7 @@ pub fn logicalLeft(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32
         // We can perform a well-defined shift here
         result = rm << amount;
 
-        if (S) {
+        if (S and total_amount != 0) {
             const carry_bit = @truncate(u5, bit_count - amount);
             cpsr.c.write(rm >> carry_bit & 1 == 1);
         }
@@ -107,7 +107,7 @@ pub fn logicalRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u
     if (total_amount < bit_count) {
         // We can perform a well-defined shift
         result = rm >> amount;
-        if (S) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
+        if (S and total_amount != 0) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
     } else {
         if (S) {
             if (total_amount == bit_count) {
@@ -130,7 +130,7 @@ pub fn arithmeticRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8)
     var result: u32 = 0x0000_0000;
     if (total_amount < bit_count) {
         result = @bitCast(u32, @bitCast(i32, rm) >> amount);
-        if (S) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
+        if (S and total_amount != 0) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
     } else {
         if (S) {
             // ASR #32 and ASR #>32 have the same result
@@ -138,14 +138,12 @@ pub fn arithmeticRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8)
             cpsr.c.write(result >> 31 & 1 == 1);
         }
     }
-
-    std.debug.panic("[BarrelShifter] implement arithmetic shift right", .{});
 }
 
-pub fn rotateRight(comptime S: bool, cpsr: *CPSR, rm: u32, amount: u8) u32 {
-    const result = std.math.rotr(u32, rm, amount);
+pub fn rotateRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
+    const result = std.math.rotr(u32, rm, total_amount);
 
-    if (S and result != 0) {
+    if (S and total_amount != 0) {
         cpsr.c.write(result >> 31 & 1 == 1);
     }
 

src/cpu/arm/data_processing.zig

@@ -10,6 +10,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
             const rd = opcode >> 12 & 0xF;
             const rn = opcode >> 16 & 0xF;
+            const old_carry = @boolToInt(cpu.cpsr.c.read());
 
             const op1 = if (rn == 0xF) cpu.fakePC() else cpu.r[rn];
 
@@ -49,11 +50,10 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
                 },
                 0x5 => {
                     // ADC
-                    const carry = @boolToInt(cpu.cpsr.c.read());
                     var result: u32 = undefined;
 
                     const did = @addWithOverflow(u32, op1, op2, &result);
-                    const overflow = @addWithOverflow(u32, result, carry, &result);
+                    const overflow = @addWithOverflow(u32, result, old_carry, &result);
                     cpu.r[rd] = result;
 
                     if (S and rd != 0xF) {
@@ -63,6 +63,19 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
                         cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
                     }
                 },
+                0x6 => {
+                    // SBC
+                    const subtrahend = @as(u64, op2) - old_carry + 1;
+                    const result = @truncate(u32, op1 -% subtrahend);
+                    cpu.r[rd] = result;
+
+                    if (S and rd != 0xF) {
+                        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+                        cpu.cpsr.z.write(result == 0);
+                        cpu.cpsr.c.write(subtrahend <= op1);
+                        cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
+                    }
+                },
                 0x8 => {
                     // TST
                     const result = op1 & op2;