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11 Commits

Author SHA1 Message Date
5d3a653b2e fix(window): proper inRange impl for window
window wrap now works (it's pretty slow though?)
2022-11-11 03:57:09 -04:00
ee4149716a chore: improve readability of sprite drawing code a bit 2022-11-11 03:57:09 -04:00
2405ba2f7d style: remove unused imports 2022-11-11 03:57:09 -04:00
ce1c670ba1 chore: dont allocate not-small ?Sprite array on stack
use memset like most other allocations in this emu
2022-11-11 03:57:09 -04:00
8b9d06915e chore: move FrameBuffer struct to util.zig 2022-11-11 03:57:08 -04:00
f1758e8426 chore: move OAM, PALRAM and VRAM structs to separate files 2022-11-11 03:57:08 -04:00
91427aa920 fix: 8-bit writes to WIN PPU registers
Advance Wars depends on these registers similar to Mario Kart's 8-bit
writes to Affine Background registers:
2022-11-11 03:57:08 -04:00
03b2648f16 chore: refactor window 2022-11-11 03:57:08 -04:00
f6f9d3eb8d chore: crude background window impl (no affine) 2022-11-11 03:57:08 -04:00
0ccbd02964 chore: rename function (misspelt until now somehow) 2022-11-11 03:57:08 -04:00
1230aa1e91 fix(cpu): remove miscompilation workaround 2022-11-11 03:56:49 -04:00
2 changed files with 2 additions and 4 deletions

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@ -63,7 +63,7 @@ Finally it's worth noting that ZBA uses a TOML config file it'll store in your O
## Compiling ## Compiling
Most recently built on Zig [v0.10.0](https://github.com/ziglang/zig/tree/0.10.0) Most recently built on Zig [v0.11.0-dev.144+892fb0fc8](https://github.com/ziglang/zig/tree/892fb0fc8)
### Dependencies ### Dependencies

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@ -652,9 +652,7 @@ const Pipeline = struct {
pub fn step(self: *Self, cpu: *Arm7tdmi, comptime T: type) ?u32 { pub fn step(self: *Self, cpu: *Arm7tdmi, comptime T: type) ?u32 {
comptime std.debug.assert(T == u32 or T == u16); comptime std.debug.assert(T == u32 or T == u16);
// FIXME: https://github.com/ziglang/zig/issues/12642 const opcode = self.stage[0];
var opcode = self.stage[0];
self.stage[0] = self.stage[1]; self.stage[0] = self.stage[1];
self.stage[1] = cpu.fetch(T, cpu.r[15]); self.stage[1] = cpu.fetch(T, cpu.r[15]);