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6 Commits
92417025e9
...
7783c11fac
Author | SHA1 | Date |
---|---|---|
Rekai Nyangadzayi Musuka | 7783c11fac | |
Rekai Nyangadzayi Musuka | 3fc3366c8a | |
Rekai Nyangadzayi Musuka | d6b182f245 | |
Rekai Nyangadzayi Musuka | 3857c44e68 | |
Rekai Nyangadzayi Musuka | 089c5fa025 | |
Rekai Nyangadzayi Musuka | c977f3f965 |
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@ -7,3 +7,6 @@
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[submodule "lib/known-folders"]
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path = lib/known-folders
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url = https://github.com/ziglibs/known-folders
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[submodule "lib/zig-datetime"]
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path = lib/zig-datetime
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url = https://github.com/frmdstryr/zig-datetime
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@ -13,10 +13,12 @@ pub fn build(b: *std.build.Builder) void {
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const mode = b.standardReleaseOptions();
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const exe = b.addExecutable("zba", "src/main.zig");
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// Known Folders (%APPDATA%, XDG, etc.)
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exe.addPackagePath("known_folders", "lib/known-folders/known-folders.zig");
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// DateTime Library
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exe.addPackagePath("datetime", "lib/zig-datetime/src/main.zig");
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// Bitfield type from FlorenceOS: https://github.com/FlorenceOS/
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// exe.addPackage(.{ .name = "bitfield", .path = .{ .path = "lib/util/bitfield.zig" } });
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exe.addPackagePath("bitfield", "lib/util/bitfield.zig");
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@ -0,0 +1 @@
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Subproject commit 5ec1c36cf3791b3c6c5b330357bdb6feb93979ba
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@ -51,7 +51,7 @@ sched: *Scheduler,
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pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi, paths: FilePaths) !void {
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self.* = .{
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.pak = try GamePak.init(allocator, paths.rom, paths.save),
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.pak = try GamePak.init(allocator, cpu, paths.rom, paths.save),
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.bios = try Bios.init(allocator, paths.bios),
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.ppu = try Ppu.init(allocator, sched),
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.apu = Apu.init(sched),
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@ -1,5 +1,7 @@
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const std = @import("std");
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const DateTime = @import("datetime").datetime.Datetime;
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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const Backup = @import("backup.zig").Backup;
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@ -14,7 +16,7 @@ allocator: Allocator,
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backup: Backup,
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gpio: *Gpio,
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pub fn init(allocator: Allocator, rom_path: []const u8, save_path: ?[]const u8) !Self {
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pub fn init(allocator: Allocator, cpu: *Arm7tdmi, rom_path: []const u8, save_path: ?[]const u8) !Self {
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const file = try std.fs.cwd().openFile(rom_path, .{});
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defer file.close();
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@ -28,7 +30,7 @@ pub fn init(allocator: Allocator, rom_path: []const u8, save_path: ?[]const u8)
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.allocator = allocator,
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.title = title,
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.backup = try Backup.init(allocator, kind, title, save_path),
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.gpio = try Gpio.init(allocator, .Rtc),
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.gpio = try Gpio.init(allocator, cpu, .Rtc),
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};
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}
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@ -230,23 +232,18 @@ const Gpio = struct {
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const Device = struct {
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ptr: ?*anyopaque,
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// TODO: Maybe make this comptime known? Removes some if statements
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kind: Kind,
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kind: Kind, // TODO: Make comptime known?
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const Kind = enum {
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Rtc,
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None,
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};
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const Kind = enum { Rtc, None };
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fn step(self: *Device, value: u4) void {
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switch (self.kind) {
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.Rtc => {
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fn step(self: *Device, value: u4) u4 {
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return switch (self.kind) {
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.Rtc => blk: {
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const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), self.ptr.?));
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clock.step(Clock.GpioData{ .raw = value });
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break :blk clock.step(Clock.Data{ .raw = value });
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},
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.None => {},
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}
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.None => value,
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};
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}
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fn init(kind: Kind, ptr: ?*anyopaque) Device {
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@ -260,7 +257,7 @@ const Gpio = struct {
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Control,
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};
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fn init(allocator: Allocator, kind: Device.Kind) !*This {
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fn init(allocator: Allocator, cpu: *Arm7tdmi, kind: Device.Kind) !*This {
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const self = try allocator.create(This);
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self.* = .{
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@ -271,7 +268,7 @@ const Gpio = struct {
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.device = switch (kind) {
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.Rtc => blk: {
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const clock = try allocator.create(Clock);
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clock.init(self);
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clock.init(cpu, self);
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break :blk Device{ .kind = kind, .ptr = clock };
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},
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@ -294,17 +291,13 @@ const Gpio = struct {
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}
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fn write(self: *This, comptime reg: Register, value: if (reg == .Control) u1 else u4) void {
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log.debug("RTC: Wrote 0b{b:0>4} to {}", .{ value, reg });
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// if (reg == .Data)
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// log.err("original: 0b{b:0>4} masked: 0b{b:0>4} result: 0b{b:0>4}", .{ self.data, value & self.direction, self.data | (value & self.direction) });
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switch (reg) {
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.Data => {
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const masked_value = value & self.direction;
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self.device.step(masked_value);
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self.data = masked_value;
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// The value which is actually stored in the GPIO register
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// might be modified by the device implementing the GPIO interface e.g. RTC reads
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self.data = self.device.step(masked_value);
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},
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.Direction => self.direction = value,
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.Control => self.cnt = value,
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@ -323,22 +316,23 @@ const Gpio = struct {
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};
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/// GBA Real Time Clock
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const Clock = struct {
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pub const Clock = struct {
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const This = @This();
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cmd: Command,
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writer: Writer,
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reader: Reader,
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state: State,
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cnt: Control,
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year: u8,
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month: u5,
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day: u6,
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day_of_week: u3,
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weekday: u3,
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hour: u6,
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minute: u7,
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second: u7,
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cpu: *Arm7tdmi,
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gpio: *const Gpio,
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const Register = enum {
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@ -349,108 +343,126 @@ const Clock = struct {
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const State = union(enum) {
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Idle,
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CommandInput,
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Command,
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Write: Register,
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Read: Register,
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};
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const Reader = struct {
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i: u4,
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count: u8,
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/// Reads a bit from RTC registers. Which bit it reads is dependent on
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///
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/// 1. The RTC State Machine, whitch tells us which register we're accessing
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/// 2. A `count`, which keeps track of which byte is currently being read
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/// 3. An index, which keeps track of which bit of the byte determined by `count` is being read
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fn read(self: *Reader, clock: *const Clock, register: Register) u1 {
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const idx = @intCast(u3, self.i);
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defer self.i += 1;
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// FIXME: What do I do about the unused bits?
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return switch (register) {
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.Control => @truncate(u1, switch (self.count) {
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0 => clock.cnt.raw >> idx,
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else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 1 byte)", .{ self.count, register }),
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}),
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.DateTime => @truncate(u1, switch (self.count) {
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// Date
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0 => clock.year >> idx,
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1 => @as(u8, clock.month) >> idx,
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2 => @as(u8, clock.day) >> idx,
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3 => @as(u8, clock.weekday) >> idx,
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// Time
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4 => @as(u8, clock.hour) >> idx,
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5 => @as(u8, clock.minute) >> idx,
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6 => @as(u8, clock.second) >> idx,
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else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 7 bytes)", .{ self.count, register }),
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}),
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.Time => @truncate(u1, switch (self.count) {
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0 => @as(u8, clock.hour) >> idx,
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1 => @as(u8, clock.minute) >> idx,
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2 => @as(u8, clock.second) >> idx,
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else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 3 bytes)", .{ self.count, register }),
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}),
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};
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}
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/// Is true when a Reader has read a u8's worth of bits
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fn finished(self: *const Reader) bool {
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return self.i >= 8;
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}
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/// Resets the index used to shift bits out of RTC registers
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/// and `count`, which is used to keep track of which byte we're reading
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/// is incremeneted
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fn lap(self: *Reader) void {
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self.i = 0;
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self.count += 1;
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}
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/// Resets the state of a `Reader` in preparation for a future
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/// read command
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fn reset(self: *Reader) void {
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self.i = 0;
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self.count = 0;
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}
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};
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const Writer = struct {
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buf: u8,
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i: u4,
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/// The Number of bytes written to since last reset
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/// The Number of bytes written since last reset
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count: u8,
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/// Append a bit to the internal bit buffer (aka an integer)
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fn push(self: *Writer, value: u1) void {
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const idx = @intCast(u3, self.i);
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self.buf = (self.buf & ~(@as(u8, 1) << idx)) | @as(u8, value) << idx;
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self.i += 1;
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}
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/// Takes the contents of the internal buffer and writes it to an RTC register
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/// Where it writes to is dependent on:
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///
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/// 1. The RTC State Machine, whitch tells us which register we're accessing
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/// 2. A `count`, which keeps track of which byte is currently being read
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fn write(self: *const Writer, clock: *Clock, register: Register) void {
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// FIXME: What do do about unused bits?
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switch (register) {
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.Control => switch (self.count) {
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0 => clock.cnt.raw = (clock.cnt.raw & 0x80) | (self.buf & 0x7F), // Bit 7 read-only
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else => std.debug.panic("Tried to write to byte #{} of {} (hint: there's only 1 byte)", .{ self.count, register }),
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},
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.DateTime, .Time => log.debug("RTC: Ignoring {} write", .{register}),
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}
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}
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/// Is true when 8 bits have been shifted into the internal buffer
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fn finished(self: *const Writer) bool {
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return self.i >= 8;
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}
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/// Resets the internal buffer
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/// resets the index used to shift bits into the internal buffer
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/// increments `count` (which keeps track of byte offsets) by one
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fn lap(self: *Writer) void {
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self.buf = 0;
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self.i = 0;
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self.count += 1;
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}
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/// Resets `Writer` to a clean state in preparation for a future write command
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fn reset(self: *Writer) void {
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self.buf = 0;
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self.i = 0;
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self.count = 0;
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}
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fn isFinished(self: *const Writer) bool {
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return self.i >= 8;
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}
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fn getCount(self: *const Writer) u8 {
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return self.count;
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}
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fn getValue(self: *const Writer) u8 {
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return self.buf;
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}
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};
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const Command = struct {
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buf: u8,
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i: u4,
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fn push(self: *Command, value: u1) void {
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const idx = @intCast(u3, self.i);
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self.buf = (self.buf & ~(@as(u8, 1) << idx)) | @as(u8, value) << idx;
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self.i += 1;
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}
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fn reset(self: *Command) void {
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self.buf = 0;
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self.i = 0;
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}
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fn isFinished(self: *const Command) bool {
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return self.i >= 8;
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}
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fn getCommand(self: *const Command) u8 {
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// If high Nybble does not contain 0x6, reverse the order of the nybbles.
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// For some reason RTC commands can be LSB or MSB which is funny
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return if (self.buf >> 4 & 0xF == 0x6) self.buf else (self.buf & 0xF) << 4 | (self.buf >> 4 & 0xF);
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}
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fn handleCommand(self: *const Command, rtc: *Clock) State {
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log.info("RTC: Failed to handle Command 0b{b:0>8} aka 0x{X:0>2}", .{ self.buf, self.buf });
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const command = self.getCommand();
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const is_write = command & 1 == 0;
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const rtc_register = @intCast(u3, command >> 1 & 0x7); // TODO: Make Truncate
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if (is_write) {
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return switch (rtc_register) {
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0 => blk: {
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rtc.reset();
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break :blk .Idle;
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},
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1 => .{ .Write = .Control },
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2 => .{ .Write = .DateTime },
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3 => .{ .Write = .Time },
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6 => blk: {
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rtc.irq();
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break :blk .Idle;
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},
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4, 5, 7 => .Idle,
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};
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} else {
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return switch (rtc_register) {
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1 => .{ .Read = .Control },
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2 => .{ .Read = .DateTime },
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3 => .{ .Read = .Time },
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0, 4, 5, 6, 7 => .Idle, // Do Nothing
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};
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}
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}
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};
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const GpioData = extern union {
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const Data = extern union {
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sck: Bit(u8, 0),
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sio: Bit(u8, 1),
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cs: Bit(u8, 2),
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@ -473,93 +485,196 @@ const Clock = struct {
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raw: u8,
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};
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fn init(ptr: *This, gpio: *const Gpio) void {
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fn init(ptr: *This, cpu: *Arm7tdmi, gpio: *const Gpio) void {
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ptr.* = .{
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.cmd = .{ .buf = 0, .i = 0 },
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.writer = .{ .buf = 0, .i = 0, .count = 0 },
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.reader = .{ .i = 0, .count = 0 },
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.state = .Idle,
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.cnt = .{ .raw = 0 },
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.year = 0,
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.month = 0,
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.day = 0,
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.day_of_week = 0,
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.hour = 0,
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.minute = 0,
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.second = 0,
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.gpio = gpio,
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.year = 0x01,
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.month = 0x6,
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.day = 0x13,
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.weekday = 0x3,
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.hour = 0x23,
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.minute = 0x59,
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.second = 0x59,
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.cpu = cpu,
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.gpio = gpio, // Can't use Arm7tdmi ptr b/c not initialized yet
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};
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cpu.sched.push(.RealTimeClock, 1 << 24); // Every Second
|
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}
|
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|
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fn attachGpio(self: *This, gpio: *const Gpio) void {
|
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self.gpio = gpio;
|
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pub fn updateTime(self: *This) void {
|
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self.cpu.sched.push(.RealTimeClock, 1 << 24); // Reschedule
|
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|
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const now = DateTime.now();
|
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self.year = toBcd(u8, @intCast(u8, now.date.year - 2000));
|
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self.month = toBcd(u5, now.date.month);
|
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self.day = toBcd(u3, now.date.day);
|
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self.weekday = toBcd(u3, (now.date.weekday() + 1) % 7); // API is Monday = 0, Sunday = 6. We want Sunday = 0, Saturday = 6
|
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self.hour = toBcd(u6, now.time.hour);
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self.minute = toBcd(u7, now.time.minute);
|
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self.second = toBcd(u7, now.time.second);
|
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}
|
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|
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fn step(self: *This, value: GpioData) void {
|
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const cache: GpioData = .{ .raw = self.gpio.data };
|
||||
fn step(self: *This, value: Data) u4 {
|
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const cache: Data = .{ .raw = self.gpio.data };
|
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|
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switch (self.state) {
|
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.Idle => {
|
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// If SCK is high and CS rises, then prepare for Command
|
||||
return switch (self.state) {
|
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.Idle => blk: {
|
||||
// FIXME: Maybe check incoming value to see if SCK is also high?
|
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if (cache.sck.read()) {
|
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if (!cache.cs.read() and value.cs.read()) {
|
||||
log.err("RTC: Entering Command Mode", .{});
|
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self.state = .CommandInput;
|
||||
self.cmd.reset();
|
||||
log.debug("RTC: Entering Command Mode", .{});
|
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self.state = .Command;
|
||||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(u4, value.raw);
|
||||
},
|
||||
.CommandInput => {
|
||||
.Command => blk: {
|
||||
if (!value.cs.read()) log.err("RTC: Expected CS to be set during {}, however CS was cleared", .{self.state});
|
||||
|
||||
if (!cache.sck.read() and value.sck.read()) {
|
||||
// If SCK rises, sample SIO
|
||||
log.debug("RTC: Sampled 0b{b:0>1} from SIO", .{@boolToInt(value.sio.read())});
|
||||
self.cmd.push(@boolToInt(value.sio.read()));
|
||||
|
||||
if (self.cmd.isFinished()) {
|
||||
self.state = self.cmd.handleCommand(self);
|
||||
}
|
||||
}
|
||||
},
|
||||
State{ .Write = .Control } => {
|
||||
if (!value.cs.read()) log.err("RTC: Expected CS to be set during {}, however CS was cleared", .{self.state});
|
||||
|
||||
if (!cache.sck.read() and value.sck.read()) {
|
||||
// If SCK rises, sample SIO
|
||||
|
||||
log.debug("RTC: Sampled 0b{b:0>1} from SIO", .{@boolToInt(value.sio.read())});
|
||||
self.writer.push(@boolToInt(value.sio.read()));
|
||||
|
||||
if (self.writer.isFinished()) {
|
||||
self.writer.lap();
|
||||
self.cnt.raw = self.writer.getValue();
|
||||
if (self.writer.finished()) {
|
||||
self.state = self.processCommand(self.writer.buf);
|
||||
self.writer.reset();
|
||||
|
||||
// FIXME: Move this to a constant or something
|
||||
if (self.writer.getCount() == 1) {
|
||||
log.debug("RTC: Switching to {}", .{self.state});
|
||||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(u4, value.raw);
|
||||
},
|
||||
.Write => |register| blk: {
|
||||
if (!value.cs.read()) log.err("RTC: Expected CS to be set during {}, however CS was cleared", .{self.state});
|
||||
|
||||
// If SCK rises, sample SIO
|
||||
if (!cache.sck.read() and value.sck.read()) {
|
||||
self.writer.push(@boolToInt(value.sio.read()));
|
||||
|
||||
const register_width: u32 = switch (register) {
|
||||
.Control => 1,
|
||||
.DateTime => 7,
|
||||
.Time => 3,
|
||||
};
|
||||
|
||||
if (self.writer.finished()) {
|
||||
self.writer.write(self, register); // write inner buffer to RTC register
|
||||
self.writer.lap();
|
||||
|
||||
if (self.writer.count == register_width) {
|
||||
self.writer.reset();
|
||||
self.state = .Idle;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(u4, value.raw);
|
||||
},
|
||||
else => {
|
||||
// TODO: Implement Read/Writes for Date/Time and Time and Control
|
||||
log.err("RTC: Ignored request to handle {} command", .{self.state});
|
||||
.Read => |register| blk: {
|
||||
if (!value.cs.read()) log.err("RTC: Expected CS to be set during {}, however CS was cleared", .{self.state});
|
||||
var ret = value;
|
||||
|
||||
// if SCK rises, sample SIO
|
||||
if (!cache.sck.read() and value.sck.read()) {
|
||||
ret.sio.write(self.reader.read(self, register) == 0b1);
|
||||
|
||||
const register_width: u32 = switch (register) {
|
||||
.Control => 1,
|
||||
.DateTime => 7,
|
||||
.Time => 3,
|
||||
};
|
||||
|
||||
if (self.reader.finished()) {
|
||||
self.reader.lap();
|
||||
|
||||
if (self.reader.count == register_width) {
|
||||
self.reader.reset();
|
||||
self.state = .Idle;
|
||||
},
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(u4, ret.raw);
|
||||
},
|
||||
};
|
||||
}
|
||||
|
||||
fn reset(self: *This) void {
|
||||
// mGBA and NBA only zero the control register
|
||||
// we'll do the same
|
||||
// mGBA and NBA only zero the control register. We will do the same
|
||||
log.debug("RTC: Reset (control register was zeroed)", .{});
|
||||
|
||||
self.cnt.raw = 0;
|
||||
log.info("RTC: Reset executed (control register was zeroed)", .{});
|
||||
}
|
||||
|
||||
fn irq(_: *const This) void {
|
||||
// TODO: Force GamePak IRQ
|
||||
log.err("RTC: TODO: Force GamePak IRQ", .{});
|
||||
fn irq(self: *This) void {
|
||||
// TODO: Confirm that this is the right behaviour
|
||||
log.debug("RTC: Force GamePak IRQ", .{});
|
||||
|
||||
self.cpu.bus.io.irq.game_pak.set();
|
||||
self.cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
fn processCommand(self: *This, raw_command: u8) State {
|
||||
const command = blk: {
|
||||
// If High Nybble is 0x6, no need to switch the endianness
|
||||
if (raw_command >> 4 & 0xF == 0x6) break :blk raw_command;
|
||||
|
||||
// Turns out reversing the order of bits isn't trivial at all
|
||||
// https://stackoverflow.com/questions/2602823/in-c-c-whats-the-simplest-way-to-reverse-the-order-of-bits-in-a-byte
|
||||
var ret = raw_command;
|
||||
ret = (ret & 0xF0) >> 4 | (ret & 0x0F) << 4;
|
||||
ret = (ret & 0xCC) >> 2 | (ret & 0x33) << 2;
|
||||
ret = (ret & 0xAA) >> 1 | (ret & 0x55) << 1;
|
||||
|
||||
break :blk ret;
|
||||
};
|
||||
log.debug("RTC: Handling Command 0x{X:0>2} [0b{b:0>8}]", .{ command, command });
|
||||
|
||||
const is_write = command & 1 == 0;
|
||||
const rtc_register = @truncate(u3, command >> 1 & 0x7);
|
||||
|
||||
if (is_write) {
|
||||
return switch (rtc_register) {
|
||||
0 => blk: {
|
||||
self.reset();
|
||||
break :blk .Idle;
|
||||
},
|
||||
1 => .{ .Write = .Control },
|
||||
2 => .{ .Write = .DateTime },
|
||||
3 => .{ .Write = .Time },
|
||||
6 => blk: {
|
||||
self.irq();
|
||||
break :blk .Idle;
|
||||
},
|
||||
4, 5, 7 => .Idle,
|
||||
};
|
||||
} else {
|
||||
return switch (rtc_register) {
|
||||
1 => .{ .Read = .Control },
|
||||
2 => .{ .Read = .DateTime },
|
||||
3 => .{ .Read = .Time },
|
||||
0, 4, 5, 6, 7 => .Idle, // Do Nothing
|
||||
};
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
fn toBcd(comptime T: type, value: u8) T {
|
||||
var input = value;
|
||||
var ret: u8 = 0;
|
||||
var shift: u3 = 0;
|
||||
|
||||
while (input > 0) {
|
||||
ret |= (input % 10) << (shift << 2);
|
||||
shift += 1;
|
||||
input /= 10;
|
||||
}
|
||||
|
||||
return @truncate(T, ret);
|
||||
}
|
||||
|
|
|
@ -2,6 +2,7 @@ const std = @import("std");
|
|||
|
||||
const Bus = @import("Bus.zig");
|
||||
const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
|
||||
const Clock = @import("bus/GamePak.zig").Clock;
|
||||
|
||||
const Order = std.math.Order;
|
||||
const PriorityQueue = std.PriorityQueue;
|
||||
|
@ -60,6 +61,13 @@ pub const Scheduler = struct {
|
|||
3 => cpu.bus.apu.ch4.channelTimerOverflow(late),
|
||||
}
|
||||
},
|
||||
.RealTimeClock => {
|
||||
const device = &cpu.bus.pak.gpio.device;
|
||||
if (device.kind != .Rtc or device.ptr == null) return;
|
||||
|
||||
const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), device.ptr.?));
|
||||
clock.updateTime();
|
||||
},
|
||||
.FrameSequencer => cpu.bus.apu.tickFrameSequencer(late),
|
||||
.SampleAudio => cpu.bus.apu.sampleAudio(late),
|
||||
.HBlank => cpu.bus.ppu.handleHBlankEnd(cpu, late), // The end of a HBlank
|
||||
|
@ -118,4 +126,5 @@ pub const EventKind = union(enum) {
|
|||
SampleAudio,
|
||||
FrameSequencer,
|
||||
ApuChannel: u2,
|
||||
RealTimeClock,
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue