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a7e1004e97
| Author | SHA1 | Date |
|---|---|---|
 Rekai Nyangadzayi Musuka
|
a7e1004e97 | |
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Rekai Nyangadzayi Musuka
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937e4f67fb | |
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Rekai Nyangadzayi Musuka
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0ffccde402 |
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@ -1,5 +1,5 @@
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# ZBA (working title)
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An in-progress Game Boy Advance Emulator written in Zig ⚡!
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An in-progress Gameboy Advance Emulator written in Zig ⚡!
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## Tests
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- [ ] [jsmolka's GBA Test Collection](https://github.com/jsmolka/gba-tests)
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@ -10,7 +10,8 @@ An in-progress Game Boy Advance Emulator written in Zig ⚡!
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- [x] `bios.gba`
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- [ ] `nes.gba`
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- [ ] [DenSinH's GBA ROMs](https://github.com/DenSinH/GBARoms)
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- [x] `eeprom-test` and `flash-test`
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- [x] `eeprom-test`
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- [x] `flash-test`
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- [x] `midikey2freq`
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- [ ] `swi-tests-random`
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- [ ] [destoer's GBA Tests](https://github.com/destoer/gba_tests)
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@ -35,14 +36,14 @@ An in-progress Game Boy Advance Emulator written in Zig ⚡!
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* [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
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## Compiling
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Most recently built on Zig [0.10.0-dev.3900+ab4b26d8a](https://github.com/ziglang/zig/tree/ab4b26d8a)
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Most recently built on Zig [0.10.0-dev.2978+803376708](https://github.com/ziglang/zig/tree/803376708)
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### Dependencies
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* [SDL.zig](https://github.com/MasterQ32/SDL.zig)
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* [SDL2](https://www.libsdl.org/download-2.0.php)
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* [zig-clap](https://github.com/Hejsil/zig-clap)
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* [known-folders](https://github.com/ziglibs/known-folders)
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* [`bitfields.zig`](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568197ad24780ec9adb421217530d4466/lib/util/bitfields.zig)
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* [`bitfields.zig`](https://github.com/FlorenceOS/Florence/blob/f6044db788d35d43d66c1d7e58ef1e3c79f10d6f/lib/util/bitfields.zig)
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`bitfields.zig` from [FlorenceOS](https://github.com/FlorenceOS) is included under `lib/util/bitfield.zig`.
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@ -1 +1 @@
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Subproject commit 76ec54bf1d13170f1a9998063eecf8087856541a
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Subproject commit d66925011971fbe221fc2a7f7cb4cd8c181d9ba3
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@ -88,7 +88,7 @@ pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
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},
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0x02 => self.ewram.read(T, aligned_addr),
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0x03 => self.iwram.read(T, aligned_addr),
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0x04 => self.readIo(T, address),
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0x04 => io.read(self, T, aligned_addr),
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// Internal Display Memory
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0x05 => self.ppu.palette.read(T, aligned_addr),
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@ -113,46 +113,31 @@ pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
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};
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}
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fn readIo(self: *const Self, comptime T: type, unaligned_address: u32) T {
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const maybe_value = io.read(self, T, forceAlign(T, unaligned_address));
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return if (maybe_value) |value| value else self.readOpenBus(T, unaligned_address);
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}
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fn readOpenBus(self: *const Self, comptime T: type, address: u32) T {
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const r15 = self.cpu.?.r[15];
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const word = blk: {
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// If u32 Open Bus, read recently fetched opcode (PC + 8)
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if (!self.cpu.?.cpsr.t.read()) break :blk self.dbgRead(u32, r15 + 4);
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const word = if (self.cpu.?.cpsr.t.read()) blk: {
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const page = @truncate(u8, r15 >> 24);
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switch (page) {
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// EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
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0x02, 0x05, 0x06, 0x08...0x0D => {
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// (PC + 4)
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const halfword = self.dbgRead(u16, r15 + 2);
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break :blk @as(u32, halfword) << 16 | halfword;
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},
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// BIOS or OAM (32-bit)
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0x00, 0x07 => {
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// Aligned: (PC + 6) | (PC + 4)
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// Unaligned: (PC + 4) | (PC + 2)
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const offset: u32 = if (address & 3 == 0b00) 2 else 0;
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break :blk @as(u32, self.dbgRead(u16, r15 + 2 + offset)) << 16 | self.dbgRead(u16, r15 + offset);
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break :blk @as(u32, self.dbgRead(u16, (r15 + 2) + offset)) << 16 | self.dbgRead(u16, r15 + offset);
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},
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// IWRAM (16-bit but special)
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0x03 => {
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// Aligned: (PC + 2) | (PC + 4)
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// Unaligned: (PC + 4) | (PC + 2)
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const offset: u32 = if (address & 3 == 0b00) 2 else 0;
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break :blk @as(u32, self.dbgRead(u16, r15 + 2 - offset)) << 16 | self.dbgRead(u16, r15 + offset);
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break :blk @as(u32, self.dbgRead(u16, (r15 + 2) - offset)) << 16 | self.dbgRead(u16, r15 + offset);
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},
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else => unreachable,
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}
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};
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} else self.dbgRead(u32, r15 + 4);
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return @truncate(T, rotr(u32, word, 8 * (address & 3)));
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}
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@ -173,7 +158,7 @@ pub fn read(self: *Self, comptime T: type, address: u32) T {
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},
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0x02 => self.ewram.read(T, aligned_addr),
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0x03 => self.iwram.read(T, aligned_addr),
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0x04 => self.readIo(T, address),
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0x04 => io.read(self, T, aligned_addr),
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// Internal Display Memory
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0x05 => self.ppu.palette.read(T, aligned_addr),
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@ -1,7 +1,6 @@
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const std = @import("std");
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const SDL = @import("sdl2");
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const io = @import("bus/io.zig");
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const util = @import("util.zig");
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const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
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const Scheduler = @import("scheduler.zig").Scheduler;
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@ -10,11 +9,13 @@ const SoundFifo = std.fifo.LinearFifo(u8, .{ .Static = 0x20 });
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const AudioDeviceId = SDL.SDL_AudioDeviceID;
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const intToBytes = @import("util.zig").intToBytes;
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const readUndefined = @import("util.zig").readUndefined;
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const writeUndefined = @import("util.zig").writeUndefined;
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const log = std.log.scoped(.APU);
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pub const host_sample_rate = 1 << 15;
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pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
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pub fn read(comptime T: type, apu: *const Apu, addr: u32) T {
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const byte = @truncate(u8, addr);
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return switch (T) {
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@ -37,7 +38,7 @@ pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
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0x84 => apu.getSoundCntX(),
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0x88 => apu.bias.raw, // SOUNDBIAS
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0x90...0x9F => apu.ch3.wave_dev.read(T, apu.ch3.select, addr),
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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},
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u8 => switch (byte) {
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0x60 => apu.ch1.getSoundCntL(), // NR10
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@ -51,9 +52,9 @@ pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
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0x81 => @truncate(u8, apu.psg_cnt.raw >> 8), // NR51
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0x84 => apu.getSoundCntX(),
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0x89 => @truncate(u8, apu.bias.raw >> 8), // SOUNDBIAS_H
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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},
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u32 => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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u32 => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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else => @compileError("APU: Unsupported read width"),
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};
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}
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@ -77,7 +78,7 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
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0x90...0x9F => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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0xA0 => apu.chA.push(value), // FIFO_A
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0xA4 => apu.chB.push(value), // FIFO_B
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else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
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else => writeUndefined(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
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},
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u16 => switch (byte) {
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0x60 => apu.ch1.setSoundCntL(@truncate(u8, value)), // SOUND1CNT_L
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@ -100,7 +101,7 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
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0x88 => apu.bias.raw = value, // SOUNDBIAS
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// WAVE_RAM
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0x90...0x9F => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
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else => writeUndefined(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
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},
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u8 => switch (byte) {
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0x60 => apu.ch1.setSoundCntL(value),
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@ -132,7 +133,7 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1), // NR52
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0x89 => apu.setSoundBiasH(value),
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0x90...0x9F => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
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else => writeUndefined(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
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},
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else => @compileError("APU: Unsupported write width"),
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}
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@ -1,10 +1,11 @@
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const std = @import("std");
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const util = @import("../util.zig");
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const DmaControl = @import("io.zig").DmaControl;
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const Bus = @import("../Bus.zig");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const readUndefined = @import("../util.zig").readUndefined;
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const writeUndefined = @import("../util.zig").writeUndefined;
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pub const DmaTuple = std.meta.Tuple(&[_]type{ DmaController(0), DmaController(1), DmaController(2), DmaController(3) });
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const log = std.log.scoped(.DmaTransfer);
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@ -12,7 +13,7 @@ pub fn create() DmaTuple {
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return .{ DmaController(0).init(), DmaController(1).init(), DmaController(2).init(), DmaController(3).init() };
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}
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pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) ?T {
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pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) T {
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const byte = @truncate(u8, addr);
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return switch (T) {
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@ -21,16 +22,16 @@ pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) ?T {
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0xC4 => @as(T, dma.*[1].cnt.raw) << 16,
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0xD0 => @as(T, dma.*[2].cnt.raw) << 16,
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0xDC => @as(T, dma.*[3].cnt.raw) << 16,
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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},
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u16 => switch (byte) {
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0xBA => dma.*[0].cnt.raw,
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0xC6 => dma.*[1].cnt.raw,
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0xD2 => dma.*[2].cnt.raw,
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0xDE => dma.*[3].cnt.raw,
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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},
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u8 => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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u8 => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
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else => @compileError("DMA: Unsupported read width"),
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};
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}
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@ -52,7 +53,7 @@ pub fn write(comptime T: type, dma: *DmaTuple, addr: u32, value: T) void {
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0xD4 => dma.*[3].setSad(value),
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0xD8 => dma.*[3].setDad(value),
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0xDC => dma.*[3].setCnt(value),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
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else => writeUndefined(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
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},
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u16 => switch (byte) {
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0xB0 => dma.*[0].setSad(setU32L(dma.*[0].sad, value)),
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@ -82,9 +83,9 @@ pub fn write(comptime T: type, dma: *DmaTuple, addr: u32, value: T) void {
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0xDA => dma.*[3].setDad(setU32H(dma.*[3].dad, value)),
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0xDC => dma.*[3].setCntL(value),
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0xDE => dma.*[3].setCntH(value),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
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else => writeUndefined(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
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},
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u8 => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
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u8 => writeUndefined(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
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else => @compileError("DMA: Unsupported write width"),
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}
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}
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@ -1,9 +1,5 @@
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const std = @import("std");
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const builtin = @import("builtin");
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const timer = @import("timer.zig");
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const dma = @import("dma.zig");
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const apu = @import("../apu.zig");
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const util = @import("../util.zig");
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const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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@ -11,6 +7,12 @@ const Bus = @import("../Bus.zig");
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const DmaController = @import("dma.zig").DmaController;
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const Scheduler = @import("../scheduler.zig").Scheduler;
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const timer = @import("timer.zig");
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const dma = @import("dma.zig");
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const apu = @import("../apu.zig");
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const readUndefined = @import("../util.zig").readUndefined;
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const writeUndefined = @import("../util.zig").writeUndefined;
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const log = std.log.scoped(.@"I/O");
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pub const Io = struct {
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@ -41,7 +43,7 @@ pub const Io = struct {
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}
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};
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pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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return switch (T) {
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u32 => switch (address) {
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// Display
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@ -56,18 +58,18 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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0x0400_0100...0x0400_010C => timer.read(T, &bus.tim, address),
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// Serial Communication 1
|
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0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT and SIOMLT_SEND", .{T}),
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0x0400_0128 => readTodo("Read {} from SIOCNT and SIOMLT_SEND", .{T}),
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// Keypad Input
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0x0400_0130 => util.io.read.todo(log, "Read {} from KEYINPUT", .{T}),
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0x0400_0130 => readTodo("Read {} from KEYINPUT", .{T}),
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// Serial Communication 2
|
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0x0400_0150 => util.io.read.todo(log, "Read {} from JOY_RECV", .{T}),
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0x0400_0150 => readTodo("Read {} from JOY_RECV", .{T}),
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||||
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// Interrupts
|
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0x0400_0200 => @as(T, bus.io.irq.raw) << 16 | bus.io.ie.raw,
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0x0400_0208 => @boolToInt(bus.io.ime),
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||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
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else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
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||||
},
|
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u16 => switch (address) {
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||||
// Display
|
||||
|
|
@ -78,7 +80,7 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
|
|||
0x0400_000A => bus.ppu.bg[1].cnt.raw,
|
||||
0x0400_000C => bus.ppu.bg[2].cnt.raw,
|
||||
0x0400_000E => bus.ppu.bg[3].cnt.raw,
|
||||
0x0400_004C => util.io.read.todo(log, "Read {} from MOSAIC", .{T}),
|
||||
0x0400_004C => readTodo("Read {} from MOSAIC", .{T}),
|
||||
0x0400_0050 => bus.ppu.bldcnt.raw,
|
||||
|
||||
// Sound
|
||||
|
|
@ -91,20 +93,20 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
|
|||
0x0400_0100...0x0400_010E => timer.read(T, &bus.tim, address),
|
||||
|
||||
// Serial Communication 1
|
||||
0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT", .{T}),
|
||||
0x0400_0128 => readTodo("Read {} from SIOCNT", .{T}),
|
||||
|
||||
// Keypad Input
|
||||
0x0400_0130 => bus.io.keyinput.raw,
|
||||
|
||||
// Serial Communication 2
|
||||
0x0400_0134 => util.io.read.todo(log, "Read {} from RCNT", .{T}),
|
||||
0x0400_0134 => readTodo("Read {} from RCNT", .{T}),
|
||||
|
||||
// Interrupts
|
||||
0x0400_0200 => bus.io.ie.raw,
|
||||
0x0400_0202 => bus.io.irq.raw,
|
||||
0x0400_0204 => util.io.read.todo(log, "Read {} from WAITCNT", .{T}),
|
||||
0x0400_0204 => readTodo("Read {} from WAITCNT", .{T}),
|
||||
0x0400_0208 => @boolToInt(bus.io.ime),
|
||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
||||
else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
||||
},
|
||||
u8 => return switch (address) {
|
||||
// Display
|
||||
|
|
@ -121,18 +123,18 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
|
|||
0x0400_0060...0x0400_00A7 => apu.read(T, &bus.apu, address),
|
||||
|
||||
// Serial Communication 1
|
||||
0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT_L", .{T}),
|
||||
0x0400_0128 => readTodo("Read {} from SIOCNT_L", .{T}),
|
||||
|
||||
// Keypad Input
|
||||
0x0400_0130 => util.io.read.todo(log, "read {} from KEYINPUT_L", .{T}),
|
||||
0x0400_0130 => readTodo("read {} from KEYINPUT_L", .{T}),
|
||||
|
||||
// Serial Communication 2
|
||||
0x0400_0135 => util.io.read.todo(log, "Read {} from RCNT_H", .{T}),
|
||||
0x0400_0135 => readTodo("Read {} from RCNT_H", .{T}),
|
||||
|
||||
// Interrupts
|
||||
0x0400_0200 => @truncate(T, bus.io.ie.raw),
|
||||
0x0400_0300 => @enumToInt(bus.io.postflg),
|
||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
||||
else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
||||
},
|
||||
else => @compileError("I/O: Unsupported read width"),
|
||||
};
|
||||
|
|
@ -208,7 +210,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
|
|||
0x0400_0204 => log.debug("Wrote 0x{X:0>8} to WAITCNT", .{value}),
|
||||
0x0400_0208 => bus.io.ime = value & 1 == 1,
|
||||
0x0400_020C...0x0400_021C => {}, // Unused
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
else => writeUndefined(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
},
|
||||
u16 => switch (address) {
|
||||
// Display
|
||||
|
|
@ -290,7 +292,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
|
|||
0x0400_0204 => log.debug("Wrote 0x{X:0>4} to WAITCNT", .{value}),
|
||||
0x0400_0208 => bus.io.ime = value & 1 == 1,
|
||||
0x0400_0206, 0x0400_020A => {}, // Not Used
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
else => writeUndefined(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
},
|
||||
u8 => switch (address) {
|
||||
// Display
|
||||
|
|
@ -323,12 +325,17 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
|
|||
0x0400_0301 => bus.io.haltcnt = if (value >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
|
||||
|
||||
0x0400_0410 => log.debug("Wrote 0x{X:0>2} to the common yet undocumented 0x{X:0>8}", .{ value, address }),
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
else => writeUndefined(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
},
|
||||
else => @compileError("I/O: Unsupported write width"),
|
||||
};
|
||||
}
|
||||
|
||||
fn readTodo(comptime format: []const u8, args: anytype) u8 {
|
||||
log.debug(format, args);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/// Read / Write
|
||||
pub const PostFlag = enum(u1) {
|
||||
FirstBoot = 0,
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
const std = @import("std");
|
||||
const util = @import("../util.zig");
|
||||
|
||||
const TimerControl = @import("io.zig").TimerControl;
|
||||
const Io = @import("io.zig").Io;
|
||||
|
|
@ -7,6 +6,8 @@ const Scheduler = @import("../scheduler.zig").Scheduler;
|
|||
const Event = @import("../scheduler.zig").Event;
|
||||
const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
|
||||
|
||||
const readUndefined = @import("../util.zig").readUndefined;
|
||||
const writeUndefined = @import("../util.zig").writeUndefined;
|
||||
pub const TimerTuple = std.meta.Tuple(&[_]type{ Timer(0), Timer(1), Timer(2), Timer(3) });
|
||||
const log = std.log.scoped(.Timer);
|
||||
|
||||
|
|
@ -14,7 +15,7 @@ pub fn create(sched: *Scheduler) TimerTuple {
|
|||
return .{ Timer(0).init(sched), Timer(1).init(sched), Timer(2).init(sched), Timer(3).init(sched) };
|
||||
}
|
||||
|
||||
pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) ?T {
|
||||
pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) T {
|
||||
const nybble = @truncate(u4, addr);
|
||||
|
||||
return switch (T) {
|
||||
|
|
@ -23,7 +24,7 @@ pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) ?T {
|
|||
0x4 => @as(T, tim.*[1].cnt.raw) << 16 | tim.*[1].getCntL(),
|
||||
0x8 => @as(T, tim.*[2].cnt.raw) << 16 | tim.*[2].getCntL(),
|
||||
0xC => @as(T, tim.*[3].cnt.raw) << 16 | tim.*[3].getCntL(),
|
||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
|
||||
else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
|
||||
},
|
||||
u16 => switch (nybble) {
|
||||
0x0 => tim.*[0].getCntL(),
|
||||
|
|
@ -34,9 +35,9 @@ pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) ?T {
|
|||
0xA => tim.*[2].cnt.raw,
|
||||
0xC => tim.*[3].getCntL(),
|
||||
0xE => tim.*[3].cnt.raw,
|
||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
|
||||
else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
|
||||
},
|
||||
u8 => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
|
||||
u8 => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
|
||||
else => @compileError("TIM: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
|
@ -50,7 +51,7 @@ pub fn write(comptime T: type, tim: *TimerTuple, addr: u32, value: T) void {
|
|||
0x4 => tim.*[1].setCnt(value),
|
||||
0x8 => tim.*[2].setCnt(value),
|
||||
0xC => tim.*[3].setCnt(value),
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
|
||||
else => writeUndefined(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
|
||||
},
|
||||
u16 => switch (nybble) {
|
||||
0x0 => tim.*[0].setCntL(value),
|
||||
|
|
@ -61,9 +62,9 @@ pub fn write(comptime T: type, tim: *TimerTuple, addr: u32, value: T) void {
|
|||
0xA => tim.*[2].setCntH(value),
|
||||
0xC => tim.*[3].setCntL(value),
|
||||
0xE => tim.*[3].setCntH(value),
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
|
||||
else => writeUndefined(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
|
||||
},
|
||||
u8 => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
|
||||
u8 => writeUndefined(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
|
||||
else => @compileError("TIM: Unsupported write width"),
|
||||
};
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,11 +13,10 @@ const Atomic = std.atomic.Atomic;
|
|||
const Allocator = std.mem.Allocator;
|
||||
|
||||
// TODO: Move these to a TOML File
|
||||
const sync_audio = false; // Enable Audio Sync
|
||||
const sync_audio = true; // Enable Audio Sync
|
||||
const sync_video: RunKind = .LimitedFPS; // Configure Video Sync
|
||||
pub const win_scale = 3; // 1x, 2x, 3x, etc. Window Scaling
|
||||
pub const cpu_logging = false; // Enable detailed CPU logging
|
||||
pub const allow_unhandled_io = true; // Only relevant in Debug Builds
|
||||
|
||||
// 228 Lines which consist of 308 dots (which are 4 cycles long)
|
||||
const cycles_per_frame: u64 = 228 * (308 * 4); //280896
|
||||
|
|
|
|||
|
|
@ -3,8 +3,6 @@ const builtin = @import("builtin");
|
|||
const Log2Int = std.math.Log2Int;
|
||||
const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
|
||||
|
||||
const allow_unhandled_io = @import("emu.zig").allow_unhandled_io;
|
||||
|
||||
// Sign-Extend value of type `T` to type `U`
|
||||
pub fn sext(comptime T: type, comptime U: type, value: T) T {
|
||||
// U must have less bits than T
|
||||
|
|
@ -104,28 +102,6 @@ pub const FilePaths = struct {
|
|||
save: ?[]const u8,
|
||||
};
|
||||
|
||||
pub const io = struct {
|
||||
pub const read = struct {
|
||||
pub fn todo(comptime log: anytype, comptime format: []const u8, args: anytype) u8 {
|
||||
log.debug(format, args);
|
||||
return 0;
|
||||
}
|
||||
|
||||
pub fn undef(comptime T: type, log: anytype, comptime format: []const u8, args: anytype) ?T {
|
||||
log.warn(format, args);
|
||||
if (builtin.mode == .Debug and !allow_unhandled_io) std.debug.panic("TODO: Implement I/O Register", .{});
|
||||
|
||||
return null;
|
||||
}
|
||||
};
|
||||
|
||||
pub const write = struct {
|
||||
pub fn undef(log: anytype, comptime format: []const u8, args: anytype) void {
|
||||
log.warn(format, args);
|
||||
if (builtin.mode == .Debug and !allow_unhandled_io) std.debug.panic("TODO: Implement I/O Register", .{});
|
||||
}
|
||||
};
|
||||
};
|
||||
pub fn readUndefined(log: anytype, comptime format: []const u8, args: anytype) u8 {
|
||||
log.warn(format, args);
|
||||
if (builtin.mode == .Debug) std.debug.panic("TODO: Implement I/O Register", .{});
|
||||
|
|
|
|||
Loading…
Reference in New Issue