fix: force align reads/writes in memory bus rather than in CPU

src/Bus.zig

@@ -14,6 +14,9 @@ const Scheduler = @import("scheduler.zig").Scheduler;
 const io = @import("bus/io.zig");
 const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.Bus);
+
+const rotr = @import("util.zig").rotr;
+
 const Self = @This();
 
 const panic_on_und_bus: bool = false;
@@ -51,120 +54,133 @@ pub fn deinit(self: Self) void {
     self.ppu.deinit();
 }
 
-pub fn read32(self: *const Self, addr: u32) u32 {
-    return switch (addr) {
+pub fn read32(self: *const Self, address: u32) u32 {
+    const align_addr = address & 0xFFFF_FFFC; // Force Aligned
+
+    return switch (address) {
         // General Internal Memory
-        0x0000_0000...0x0000_3FFF => self.bios.read(u32, addr),
-        0x0200_0000...0x02FF_FFFF => self.ewram.read(u32, addr),
-        0x0300_0000...0x03FF_FFFF => self.iwram.read(u32, addr),
-        0x0400_0000...0x0400_03FE => io.read32(self, addr),
+        0x0000_0000...0x0000_3FFF => self.bios.read(u32, align_addr),
+        0x0200_0000...0x02FF_FFFF => self.ewram.read(u32, align_addr),
+        0x0300_0000...0x03FF_FFFF => self.iwram.read(u32, align_addr),
+        0x0400_0000...0x0400_03FE => io.read32(self, align_addr),
 
         // Internal Display Memory
-        0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u32, addr),
-        0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u32, addr),
-        0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u32, addr),
+        0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u32, align_addr),
+        0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u32, align_addr),
+        0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u32, align_addr),
 
         // External Memory (Game Pak)
-        0x0800_0000...0x09FF_FFFF => self.pak.read(u32, addr),
-        0x0A00_0000...0x0BFF_FFFF => self.pak.read(u32, addr),
-        0x0C00_0000...0x0DFF_FFFF => self.pak.read(u32, addr),
+        0x0800_0000...0x09FF_FFFF => self.pak.read(u32, align_addr),
+        0x0A00_0000...0x0BFF_FFFF => self.pak.read(u32, align_addr),
+        0x0C00_0000...0x0DFF_FFFF => self.pak.read(u32, align_addr),
+        0x0E00_0000...0x0FFF_FFFF => @as(u32, self.pak.backup.read(address)) * 0x01010101,
 
-        else => undRead("Tried to read from 0x{X:0>8}", .{addr}),
+        else => undRead("Tried to read from 0x{X:0>8}", .{address}),
     };
 }
 
-pub fn write32(self: *Self, addr: u32, word: u32) void {
-    // TODO: write32 can write to GamePak Flash
+pub fn write32(self: *Self, address: u32, word: u32) void {
+    const align_addr = address & 0xFFFF_FFFC; // Force Aligned
 
-    switch (addr) {
+    switch (address) {
         // General Internal Memory
-        0x0200_0000...0x02FF_FFFF => self.ewram.write(u32, addr, word),
-        0x0300_0000...0x03FF_FFFF => self.iwram.write(u32, addr, word),
-        0x0400_0000...0x0400_03FE => io.write32(self, addr, word),
+        0x0200_0000...0x02FF_FFFF => self.ewram.write(u32, align_addr, word),
+        0x0300_0000...0x03FF_FFFF => self.iwram.write(u32, align_addr, word),
+        0x0400_0000...0x0400_03FE => io.write32(self, align_addr, word),
 
         // Internal Display Memory
-        0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u32, addr, word),
-        0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u32, addr, word),
-        0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u32, addr, word),
+        0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u32, align_addr, word),
+        0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u32, align_addr, word),
+        0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u32, align_addr, word),
+        0x0E00_0000...0x0FFF_FFFF => self.pak.backup.write(address, @truncate(u8, rotr(u32, word, 8 * (address & 3)))),
 
-        else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, addr }),
+        else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, address }),
     }
 }
 
-pub fn read16(self: *const Self, addr: u32) u16 {
-    return switch (addr) {
+pub fn read16(self: *const Self, address: u32) u16 {
+    const align_addr = address & 0xFFFF_FFFE; // Force Aligned
+
+    return switch (address) {
         // General Internal Memory
-        0x0000_0000...0x0000_3FFF => self.bios.read(u16, addr),
-        0x0200_0000...0x02FF_FFFF => self.ewram.read(u16, addr),
-        0x0300_0000...0x03FF_FFFF => self.iwram.read(u16, addr),
-        0x0400_0000...0x0400_03FE => io.read16(self, addr),
+        0x0000_0000...0x0000_3FFF => self.bios.read(u16, align_addr),
+        0x0200_0000...0x02FF_FFFF => self.ewram.read(u16, align_addr),
+        0x0300_0000...0x03FF_FFFF => self.iwram.read(u16, align_addr),
+        0x0400_0000...0x0400_03FE => io.read16(self, align_addr),
 
         // Internal Display Memory
-        0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u16, addr),
-        0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u16, addr),
-        0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u16, addr),
+        0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u16, align_addr),
+        0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u16, align_addr),
+        0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u16, align_addr),
 
         // External Memory (Game Pak)
-        0x0800_0000...0x09FF_FFFF => self.pak.read(u16, addr),
-        0x0A00_0000...0x0BFF_FFFF => self.pak.read(u16, addr),
-        0x0C00_0000...0x0DFF_FFFF => self.pak.read(u16, addr),
+        0x0800_0000...0x09FF_FFFF => self.pak.read(u16, align_addr),
+        0x0A00_0000...0x0BFF_FFFF => self.pak.read(u16, align_addr),
+        0x0C00_0000...0x0DFF_FFFF => self.pak.read(u16, align_addr),
+        0x0E00_0000...0x0FFF_FFFF => @as(u16, self.pak.backup.read(address)) * 0x0101,
 
-        else => undRead("Tried to read from 0x{X:0>8}", .{addr}),
+        else => undRead("Tried to read from 0x{X:0>8}", .{address}),
     };
 }
 
-pub fn write16(self: *Self, addr: u32, halfword: u16) void {
-    // TODO: write16 can write to GamePak Flash
-    switch (addr) {
+pub fn write16(self: *Self, address: u32, halfword: u16) void {
+    const align_addr = address & 0xFFFF_FFFE;
+
+    switch (address) {
         // General Internal Memory
-        0x0200_0000...0x02FF_FFFF => self.ewram.write(u16, addr, halfword),
-        0x0300_0000...0x03FF_FFFF => self.iwram.write(u16, addr, halfword),
-        0x0400_0000...0x0400_03FE => io.write16(self, addr, halfword),
+        0x0200_0000...0x02FF_FFFF => self.ewram.write(u16, align_addr, halfword),
+        0x0300_0000...0x03FF_FFFF => self.iwram.write(u16, align_addr, halfword),
+        0x0400_0000...0x0400_03FE => io.write16(self, align_addr, halfword),
 
         // Internal Display Memory
-        0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u16, addr, halfword),
-        0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u16, addr, halfword),
-        0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u16, addr, halfword),
+        0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u16, align_addr, halfword),
+        0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u16, align_addr, halfword),
+        0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u16, align_addr, halfword),
         0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}),
 
-        else => undWrite("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, addr }),
+        // External Memory (Game Pak)
+        0x0E00_0000...0x0FFF_FFFF => {
+            self.pak.backup.write(address, @truncate(u8, rotr(u16, halfword, 8 * (address & 1))));
+        },
+
+        else => undWrite("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, address }),
     }
 }
 
-pub fn read8(self: *const Self, addr: u32) u8 {
-    return switch (addr) {
+pub fn read8(self: *const Self, address: u32) u8 {
+    return switch (address) {
         // General Internal Memory
-        0x0000_0000...0x0000_3FFF => self.bios.read(u8, addr),
-        0x0200_0000...0x02FF_FFFF => self.ewram.read(u8, addr),
-        0x0300_0000...0x03FF_FFFF => self.iwram.read(u8, addr),
-        0x0400_0000...0x0400_03FE => io.read8(self, addr),
+        0x0000_0000...0x0000_3FFF => self.bios.read(u8, address),
+        0x0200_0000...0x02FF_FFFF => self.ewram.read(u8, address),
+        0x0300_0000...0x03FF_FFFF => self.iwram.read(u8, address),
+        0x0400_0000...0x0400_03FE => io.read8(self, address),
 
         // Internal Display Memory
-        0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u8, addr),
-        0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u8, addr),
-        0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u8, addr),
+        0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u8, address),
+        0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u8, address),
+        0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u8, address),
 
         // External Memory (Game Pak)
-        0x0800_0000...0x09FF_FFFF => self.pak.read(u8, addr),
-        0x0A00_0000...0x0BFF_FFFF => self.pak.read(u8, addr),
-        0x0C00_0000...0x0DFF_FFFF => self.pak.read(u8, addr),
-        0x0E00_0000...0x0E00_FFFF => self.pak.backup.read(addr),
+        0x0800_0000...0x09FF_FFFF => self.pak.read(u8, address),
+        0x0A00_0000...0x0BFF_FFFF => self.pak.read(u8, address),
+        0x0C00_0000...0x0DFF_FFFF => self.pak.read(u8, address),
+        0x0E00_0000...0x0FFF_FFFF => self.pak.backup.read(address),
 
-        else => undRead("Tried to read from 0x{X:0>2}", .{addr}),
+        else => undRead("Tried to read from 0x{X:0>2}", .{address}),
     };
 }
 
-pub fn write8(self: *Self, addr: u32, byte: u8) void {
-    switch (addr) {
+pub fn write8(self: *Self, address: u32, byte: u8) void {
+    switch (address) {
         // General Internal Memory
-        0x0200_0000...0x02FF_FFFF => self.ewram.write(u8, addr, byte),
-        0x0300_0000...0x03FF_FFFF => self.iwram.write(u8, addr, byte),
-        0x0400_0000...0x0400_03FE => io.write8(self, addr, byte),
-        0x0400_0410 => log.info("Ignored write of 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }),
+        0x0200_0000...0x02FF_FFFF => self.ewram.write(u8, address, byte),
+        0x0300_0000...0x03FF_FFFF => self.iwram.write(u8, address, byte),
+        0x0400_0000...0x0400_03FE => io.write8(self, address, byte),
+        0x0400_0410 => log.info("Ignored write of 0x{X:0>2} to 0x{X:0>8}", .{ byte, address }),
 
         // External Memory (Game Pak)
-        0x0E00_0000...0x0E00_FFFF => self.pak.backup.write(addr, byte),
-        else => undWrite("Tried to write 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }),
+        0x0E00_0000...0x0FFF_FFFF => self.pak.backup.write(address, byte),
+        else => undWrite("Tried to write 0x{X:0>2} to 0x{X:0>8}", .{ byte, address }),
     }
 }
 

src/bus/GamePak.zig

@@ -21,7 +21,7 @@ pub fn init(alloc: Allocator, rom_path: []const u8, save_path: ?[]const u8) !Sel
     defer alloc.free(file_buf);
 
     const title = parseTitle(file_buf);
-    const kind = Backup.guessKind(file_buf) orelse .Sram;
+    const kind = Backup.guessKind(file_buf) orelse .None;
 
     const buf = try alloc.alloc(u8, 0x200_0000); // 32MiB
 
@@ -40,6 +40,7 @@ pub fn init(alloc: Allocator, rom_path: []const u8, save_path: ?[]const u8) !Sel
         .backup = try Backup.init(alloc, kind, title, save_path),
     };
     pak.parseHeader();
+    log.info("Backup: {}", .{kind});
 
     return pak;
 }

src/bus/backup.zig

@@ -32,10 +32,11 @@ pub const Backup = struct {
             .Flash => 0x10000, // 64K
             .Flash1M => 0x20000, // 128K
             .Eeprom => 0x2000, // FIXME: We assume 8K here
+            .None => 0,
         };
 
         const buf = try alloc.alloc(u8, buf_len);
-        std.mem.set(u8, buf, 0);
+        std.mem.set(u8, buf, 0xFF);
 
         var backup = Self{
             .buf = buf,
@@ -80,8 +81,10 @@ pub const Backup = struct {
 
         switch (self.kind) {
             .Sram, .Flash, .Flash1M => {
-                std.mem.copy(u8, self.buf, file_buf);
-                log.info("Loaded Save from {s}", .{file_path});
+                if (self.buf.len == file_buf.len) {
+                    std.mem.copy(u8, self.buf, file_buf);
+                    log.info("Loaded Save from {s}", .{file_path});
+                }
             },
             else => return SaveError.UnsupportedBackupKind,
         }
@@ -139,6 +142,7 @@ pub const Backup = struct {
             },
             .Eeprom => return self.buf[addr],
             .Sram => return self.buf[addr & 0x7FFF], // 32K SRAM chip is mirrored
+            .None => return 0xFF,
         }
     }
 
@@ -171,6 +175,7 @@ pub const Backup = struct {
             },
             .Eeprom => self.buf[addr] = byte,
             .Sram => self.buf[addr & 0x7FFF] = byte,
+            .None => {},
         }
     }
 };
@@ -180,6 +185,7 @@ const BackupKind = enum {
     Sram,
     Flash,
     Flash1M,
+    None,
 };
 
 const Needle = struct {

src/cpu/arm/block_data_transfer.zig

@@ -54,9 +54,9 @@ pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, c
                 }
 
                 if (L) {
-                    cpu.r[15] = bus.read32(und_addr & 0xFFFF_FFFC);
+                    cpu.r[15] = bus.read32(und_addr);
                 } else {
-                    bus.write32(und_addr & 0xFFFF_FFFC, cpu.r[15] + 8);
+                    bus.write32(und_addr, cpu.r[15] + 8);
                 }
 
                 cpu.r[rn] = if (U) cpu.r[rn] + 0x40 else cpu.r[rn] - 0x40;
@@ -83,9 +83,9 @@ pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, c
             if (L) {
                 if (S and !r15_present) {
                     // Always Transfer User mode Registers
-                    cpu.setUserModeRegister(i, bus.read32(address & 0xFFFF_FFFC));
+                    cpu.setUserModeRegister(i, bus.read32(address));
                 } else {
-                    const value = bus.read32(address & 0xFFFF_FFFC);
+                    const value = bus.read32(address);
                     cpu.r[i] = if (i == 0xF) value & 0xFFFF_FFFC else value;
                     if (S and i == 0xF) cpu.setCpsr(cpu.spsr.raw);
                 }
@@ -94,9 +94,9 @@ pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, c
                     // Always Transfer User mode Registers
                     // This happens regardless if r15 is in the list
                     const value = cpu.getUserModeRegister(i);
-                    bus.write32(address & 0xFFFF_FFFC, value + if (i == 0xF) 8 else @as(u32, 0)); // PC is already 4 ahead to make 12
+                    bus.write32(address, value + if (i == 0xF) 8 else @as(u32, 0)); // PC is already 4 ahead to make 12
                 } else {
-                    bus.write32(address & 0xFFFF_FFFC, cpu.r[i] + if (i == 0xF) 8 else @as(u32, 0));
+                    bus.write32(address, cpu.r[i] + if (i == 0xF) 8 else @as(u32, 0));
                 }
             }
         }

src/cpu/arm/half_signed_data_transfer.zig

@@ -38,7 +38,7 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
                 switch (@truncate(u2, opcode >> 5)) {
                     0b01 => {
                         // LDRH
-                        const value = bus.read16(address & 0xFFFF_FFFE);
+                        const value = bus.read16(address);
                         result = rotr(u32, value, 8 * (address & 1));
                     },
                     0b10 => {
@@ -60,7 +60,7 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
             } else {
                 if (opcode >> 5 & 0x01 == 0x01) {
                     // STRH
-                    bus.write16(address & 0xFFFF_FFFE, @truncate(u16, cpu.r[rd]));
+                    bus.write16(address, @truncate(u16, cpu.r[rd]));
                 } else unreachable; // SWP
             }
 

src/cpu/arm/single_data_swap.zig

@@ -22,8 +22,8 @@ pub fn singleDataSwap(comptime B: bool) InstrFn {
                 cpu.r[rd] = value;
             } else {
                 // SWP
-                const value = rotr(u32, bus.read32(address & 0xFFFF_FFFC), 8 * (address & 0x3));
-                bus.write32(address & 0xFFFF_FFFC, cpu.r[rm]);
+                const value = rotr(u32, bus.read32(address), 8 * (address & 0x3));
+                bus.write32(address, cpu.r[rm]);
                 cpu.r[rd] = value;
             }
         }

src/cpu/arm/single_data_transfer.zig

@@ -34,7 +34,7 @@ pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool,
                     result = bus.read8(address);
                 } else {
                     // LDR
-                    const value = bus.read32(address & 0xFFFF_FFFC);
+                    const value = bus.read32(address);
                     result = rotr(u32, value, 8 * (address & 0x3));
                 }
             } else {
@@ -45,7 +45,7 @@ pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool,
                 } else {
                     // STR
                     const value = if (rd == 0xF) cpu.r[rd] + 8 else cpu.r[rd];
-                    bus.write32(address & 0xFFFF_FFFC, value);
+                    bus.write32(address, value);
                 }
             }
 

src/cpu/thumb/block_data_transfer.zig

@@ -21,9 +21,9 @@ pub fn format14(comptime L: bool, comptime R: bool) InstrFn {
             while (i < 8) : (i += 1) {
                 if (opcode >> i & 1 == 1) {
                     if (L) {
-                        cpu.r[i] = bus.read32(address & 0xFFFF_FFFC);
+                        cpu.r[i] = bus.read32(address);
                     } else {
-                        bus.write32(address & 0xFFFF_FFFC, cpu.r[i]);
+                        bus.write32(address, cpu.r[i]);
                     }
 
                     address += 4;
@@ -32,10 +32,10 @@ pub fn format14(comptime L: bool, comptime R: bool) InstrFn {
 
             if (R) {
                 if (L) {
-                    const value = bus.read32(address & 0xFFFF_FFFC);
+                    const value = bus.read32(address);
                     cpu.r[15] = value & 0xFFFF_FFFE;
                 } else {
-                    bus.write32(address & 0xFFFF_FFFC, cpu.r[14]);
+                    bus.write32(address, cpu.r[14]);
                 }
                 address += 4;
             }
@@ -52,7 +52,7 @@ pub fn format15(comptime L: bool, comptime rb: u3) InstrFn {
             const end_address = cpu.r[rb] + 4 * countRlist(opcode);
 
             if (opcode & 0xFF == 0) {
-                if (L) cpu.r[15] = bus.read32(address & 0xFFFF_FFFC) else bus.write32(address & 0xFFFF_FFFC, cpu.r[15] + 4);
+                if (L) cpu.r[15] = bus.read32(address) else bus.write32(address, cpu.r[15] + 4);
                 cpu.r[rb] += 0x40;
                 return;
             }
@@ -63,9 +63,9 @@ pub fn format15(comptime L: bool, comptime rb: u3) InstrFn {
             while (i < 8) : (i += 1) {
                 if (opcode >> i & 1 == 1) {
                     if (L) {
-                        cpu.r[i] = bus.read32(address & 0xFFFF_FFFC);
+                        cpu.r[i] = bus.read32(address);
                     } else {
-                        bus.write32(address & 0xFFFF_FFFC, cpu.r[i]);
+                        bus.write32(address, cpu.r[i]);
                     }
 
                     if (!L and first_write) {

src/cpu/thumb/data_transfer.zig

@@ -32,7 +32,7 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
                 switch (op) {
                     0b00 => {
                         // STRH
-                        bus.write16(address & 0xFFFF_FFFE, @truncate(u16, cpu.r[rd]));
+                        bus.write16(address, @truncate(u16, cpu.r[rd]));
                     },
                     0b01 => {
                         // LDSB
@@ -40,7 +40,7 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
                     },
                     0b10 => {
                         // LDRH
-                        const value = bus.read16(address & 0xFFFF_FFFE);
+                        const value = bus.read16(address);
                         cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
                     },
                     0b11 => {
@@ -59,7 +59,7 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
                 switch (op) {
                     0b00 => {
                         // STR
-                        bus.write32(address & 0xFFFF_FFFC, cpu.r[rd]);
+                        bus.write32(address, cpu.r[rd]);
                     },
                     0b01 => {
                         // STRB
@@ -67,7 +67,7 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
                     },
                     0b10 => {
                         // LDR
-                        const value = bus.read32(address & 0xFFFF_FFFC);
+                        const value = bus.read32(address);
                         cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
                     },
                     0b11 => {
@@ -94,7 +94,7 @@ pub fn format9(comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn
                 } else {
                     // LDR
                     const address = cpu.r[rb] + (@as(u32, offset) << 2);
-                    const value = bus.read32(address & 0xFFFF_FFFC);
+                    const value = bus.read32(address);
                     cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
                 }
             } else {
@@ -105,7 +105,7 @@ pub fn format9(comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn
                 } else {
                     // STR
                     const address = cpu.r[rb] + (@as(u32, offset) << 2);
-                    bus.write32(address & 0xFFFF_FFFC, cpu.r[rd]);
+                    bus.write32(address, cpu.r[rd]);
                 }
             }
         }
@@ -122,11 +122,11 @@ pub fn format10(comptime L: bool, comptime offset: u5) InstrFn {
 
             if (L) {
                 // LDRH
-                const value = bus.read16(address & 0xFFFF_FFFE);
+                const value = bus.read16(address);
                 cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
             } else {
                 // STRH
-                bus.write16(address & 0xFFFF_FFFE, @truncate(u16, cpu.r[rd]));
+                bus.write16(address, @truncate(u16, cpu.r[rd]));
             }
         }
     }.inner;
@@ -140,11 +140,11 @@ pub fn format11(comptime L: bool, comptime rd: u3) InstrFn {
 
             if (L) {
                 // LDR
-                const value = bus.read32(address & 0xFFFF_FFFC);
+                const value = bus.read32(address);
                 cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
             } else {
                 // STR
-                bus.write32(address & 0xFFFF_FFFC, cpu.r[rd]);
+                bus.write32(address, cpu.r[rd]);
             }
         }
     }.inner;