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6ab4610a81
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@ -453,7 +453,7 @@ fn thumbPopulate() [0x400]ThumbInstrFn {
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lut[i] = format6(rd);
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} else if (i >> 6 & 0xF == 0b0101) {
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const op = i >> 4 & 0x3;
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const op = i >> 5 & 0x3;
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const T = i >> 3 & 1 == 1;
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lut[i] = format78(op, T);
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@ -10,23 +10,17 @@ const add = @import("../arm/data_processing.zig").add;
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pub fn format5(comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
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const src_idx = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
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const dst_idx = @as(u4, h1) << 3 | (opcode & 0x7);
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const src = if (src_idx == 0xF) (cpu.r[src_idx] + 2) & 0xFFFF_FFFE else cpu.r[src_idx];
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const dst = if (dst_idx == 0xF) (cpu.r[dst_idx] + 2) & 0xFFFF_FFFE else cpu.r[dst_idx];
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const src = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
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const dst = @as(u4, h1) << 3 | (opcode & 0x7);
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switch (op) {
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0b00 => cpu.r[dst_idx] = add(false, cpu, dst, src) & if (dst_idx == 0xF) 0xFFFF_FFFC else @as(u32, 0xFFF_FFFF), // ADD
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0b01 => cmp(cpu, dst, src), // CMP
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0b10 => {
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// MOV
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cpu.r[dst_idx] = if (dst_idx == 0xF) src & 0xFFFF_FFFC else src;
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},
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0b00 => cpu.r[dst] = add(false, cpu, cpu.r[dst], cpu.r[src]), // ADD
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0b01 => cmp(cpu, cpu.r[dst], cpu.r[src]), // CMP
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0b10 => cpu.r[dst] = cpu.r[src], // MOV
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0b11 => {
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// BX
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cpu.cpsr.t.write(src & 1 == 1);
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cpu.r[15] = src & 0xFFFF_FFFE;
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cpu.cpsr.t.write(cpu.r[src] & 1 == 1);
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cpu.r[15] = cpu.r[src] & 0xFFFF_FFFE;
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},
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}
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}
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