tmp: incomplete impl of GPIO + RTC

src/Gui.zig

@@ -8,12 +8,12 @@ const Scheduler = @import("core/scheduler.zig").Scheduler;
 const FpsTracker = @import("core/util.zig").FpsTracker;
 
 const pitch = @import("core/ppu.zig").framebuf_pitch;
+const scale = @import("core/emu.zig").win_scale;
 
 const emu = @import("core/emu.zig");
 const asString = @import("core/util.zig").asString;
 const log = std.log.scoped(.GUI);
 
-const scale = 4;
 const default_title: []const u8 = "ZBA";
 
 window: *SDL.SDL_Window,

src/core/Bus.zig

@@ -77,70 +77,29 @@ pub fn attach(self: *Self, cpu: *Arm7tdmi) void {
     self.cpu = cpu;
 }
 
-pub fn debugRead(self: *const Self, comptime T: type, address: u32) T {
+pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
-    const cached = self.sched.tick;
-    defer self.sched.tick = cached;
-
-    // FIXME: This is bad but it's a debug read so I don't care that much?
-    const this = @intToPtr(*Self, @ptrToInt(self));
-
-    return this.read(T, address);
-}
-
-fn readOpenBus(self: *const Self, comptime T: type, address: u32) T {
-    const r15 = self.cpu.?.r[15];
-
-    const word = if (self.cpu.?.cpsr.t.read()) blk: {
-        const page = @truncate(u8, r15 >> 24);
-
-        switch (page) {
-            // EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
-            0x02, 0x05, 0x06, 0x08...0x0D => {
-                const halfword = self.debugRead(u16, r15 + 2);
-                break :blk @as(u32, halfword) << 16 | halfword;
-            },
-            // BIOS or OAM (32-bit)
-            0x00, 0x07 => {
-                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
-                break :blk @as(u32, self.debugRead(u16, (r15 + 2) + offset)) << 16 | self.debugRead(u16, r15 + offset);
-            },
-            // IWRAM (16-bit but special)
-            0x03 => {
-                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
-                break :blk @as(u32, self.debugRead(u16, (r15 + 2) - offset)) << 16 | self.debugRead(u16, r15 + offset);
-            },
-            else => unreachable,
-        }
-    } else self.debugRead(u32, r15 + 4);
-
-    return @truncate(T, rotr(u32, word, 8 * (address & 3)));
-}
-
-fn readBios(self: *Self, comptime T: type, address: u32) T {
-    if (address < Bios.size) return self.bios.checkedRead(T, self.cpu.?.r[15], alignAddress(T, address));
-
-    return self.readOpenBus(T, address);
-}
-
-pub fn read(self: *Self, comptime T: type, address: u32) T {
     const page = @truncate(u8, address >> 24);
-    const align_addr = alignAddress(T, address);
+    const aligned_addr = forceAlign(T, address);
-    defer self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
 
     return switch (page) {
         // General Internal Memory
-        0x00 => self.readBios(T, address),
+        0x00 => blk: {
-        0x02 => self.ewram.read(T, align_addr),
+            if (address < Bios.size)
-        0x03 => self.iwram.read(T, align_addr),
+                break :blk self.bios.dbgRead(T, self.cpu.?.r[15], aligned_addr);
-        0x04 => io.read(self, T, align_addr),
+
+            break :blk self.readOpenBus(T, address);
+        },
+        0x02 => self.ewram.read(T, aligned_addr),
+        0x03 => self.iwram.read(T, aligned_addr),
+        0x04 => io.read(self, T, aligned_addr),
 
         // Internal Display Memory
-        0x05 => self.ppu.palette.read(T, align_addr),
+        0x05 => self.ppu.palette.read(T, aligned_addr),
-        0x06 => self.ppu.vram.read(T, align_addr),
+        0x06 => self.ppu.vram.read(T, aligned_addr),
-        0x07 => self.ppu.oam.read(T, align_addr),
+        0x07 => self.ppu.oam.read(T, aligned_addr),
 
         // External Memory (Game Pak)
-        0x08...0x0D => self.pak.read(T, align_addr),
+        0x08...0x0D => self.pak.dbgRead(T, aligned_addr),
         0x0E...0x0F => blk: {
             const value = self.pak.backup.read(address);
 
@@ -153,29 +112,100 @@ pub fn read(self: *Self, comptime T: type, address: u32) T {
 
             break :blk @as(T, value) * multiplier;
         },
-        else => readOpenBus(self, T, address),
+        else => self.readOpenBus(T, address),
+    };
+}
+
+fn readOpenBus(self: *const Self, comptime T: type, address: u32) T {
+    const r15 = self.cpu.?.r[15];
+
+    const word = if (self.cpu.?.cpsr.t.read()) blk: {
+        const page = @truncate(u8, r15 >> 24);
+
+        switch (page) {
+            // EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
+            0x02, 0x05, 0x06, 0x08...0x0D => {
+                const halfword = self.dbgRead(u16, r15 + 2);
+                break :blk @as(u32, halfword) << 16 | halfword;
+            },
+            // BIOS or OAM (32-bit)
+            0x00, 0x07 => {
+                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
+                break :blk @as(u32, self.dbgRead(u16, (r15 + 2) + offset)) << 16 | self.dbgRead(u16, r15 + offset);
+            },
+            // IWRAM (16-bit but special)
+            0x03 => {
+                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
+                break :blk @as(u32, self.dbgRead(u16, (r15 + 2) - offset)) << 16 | self.dbgRead(u16, r15 + offset);
+            },
+            else => unreachable,
+        }
+    } else self.dbgRead(u32, r15 + 4);
+
+    return @truncate(T, rotr(u32, word, 8 * (address & 3)));
+}
+
+pub fn read(self: *Self, comptime T: type, address: u32) T {
+    const page = @truncate(u8, address >> 24);
+    const aligned_addr = forceAlign(T, address);
+
+    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+
+    return switch (page) {
+        // General Internal Memory
+        0x00 => blk: {
+            if (address < Bios.size)
+                break :blk self.bios.read(T, self.cpu.?.r[15], aligned_addr);
+
+            break :blk self.readOpenBus(T, address);
+        },
+        0x02 => self.ewram.read(T, aligned_addr),
+        0x03 => self.iwram.read(T, aligned_addr),
+        0x04 => io.read(self, T, aligned_addr),
+
+        // Internal Display Memory
+        0x05 => self.ppu.palette.read(T, aligned_addr),
+        0x06 => self.ppu.vram.read(T, aligned_addr),
+        0x07 => self.ppu.oam.read(T, aligned_addr),
+
+        // External Memory (Game Pak)
+        0x08...0x0D => self.pak.read(T, aligned_addr),
+        0x0E...0x0F => blk: {
+            const value = self.pak.backup.read(address);
+
+            const multiplier = switch (T) {
+                u32 => 0x01010101,
+                u16 => 0x0101,
+                u8 => 1,
+                else => @compileError("Backup: Unsupported read width"),
+            };
+
+            break :blk @as(T, value) * multiplier;
+        },
+        else => self.readOpenBus(T, address),
     };
 }
 
 pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
     const page = @truncate(u8, address >> 24);
-    const align_addr = alignAddress(T, address);
+    const aligned_addr = forceAlign(T, address);
-    defer self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+
+    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
 
     switch (page) {
         // General Internal Memory
-        0x00 => self.bios.write(T, align_addr, value),
+        0x00 => self.bios.write(T, aligned_addr, value),
-        0x02 => self.ewram.write(T, align_addr, value),
+        0x02 => self.ewram.write(T, aligned_addr, value),
-        0x03 => self.iwram.write(T, align_addr, value),
+        0x03 => self.iwram.write(T, aligned_addr, value),
-        0x04 => io.write(self, T, align_addr, value),
+        0x04 => io.write(self, T, aligned_addr, value),
 
         // Internal Display Memory
-        0x05 => self.ppu.palette.write(T, align_addr, value),
+        0x05 => self.ppu.palette.write(T, aligned_addr, value),
-        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, align_addr, value),
+        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, aligned_addr, value),
-        0x07 => self.ppu.oam.write(T, align_addr, value),
+        0x07 => self.ppu.oam.write(T, aligned_addr, value),
 
         // External Memory (Game Pak)
-        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, align_addr, value),
+        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, aligned_addr, value),
         0x0E...0x0F => {
             const rotate_by = switch (T) {
                 u32 => address & 3,
@@ -190,7 +220,7 @@ pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
     }
 }
 
-fn alignAddress(comptime T: type, address: u32) u32 {
+fn forceAlign(comptime T: type, address: u32) u32 {
     return switch (T) {
         u32 => address & 0xFFFF_FFFC,
         u16 => address & 0xFFFF_FFFE,

src/core/bus/Bios.zig

@@ -31,17 +31,22 @@ pub fn deinit(self: Self) void {
     if (self.buf) |buf| self.alloc.free(buf);
 }
 
-pub fn checkedRead(self: *Self, comptime T: type, r15: u32, addr: u32) T {
+pub fn read(self: *Self, comptime T: type, r15: u32, addr: u32) T {
     if (r15 < Self.size) {
         self.addr_latch = addr;
-        return self.read(T, addr);
+        return self.uncheckedRead(T, addr);
     }
 
     log.debug("Rejected read since r15=0x{X:0>8}", .{r15});
-    return @truncate(T, self.read(T, self.addr_latch + 8));
+    return @truncate(T, self.uncheckedRead(T, self.addr_latch + 8));
 }
 
-fn read(self: *const Self, comptime T: type, addr: u32) T {
+pub fn dbgRead(self: *const Self, comptime T: type, r15: u32, addr: u32) T {
+    if (r15 < Self.size) return self.uncheckedRead(T, addr);
+    return @truncate(T, self.uncheckedRead(T, self.addr_latch + 8));
+}
+
+fn uncheckedRead(self: *const Self, comptime T: type, addr: u32) T {
     if (self.buf) |buf| {
         return switch (T) {
             u32, u16, u8 => std.mem.readIntSliceLittle(T, buf[addr..][0..@sizeOf(T)]),

src/core/bus/GamePak.zig

@@ -1,5 +1,7 @@
 const std = @import("std");
 
+const Bit = @import("bitfield").Bit;
+const Bitfield = @import("bitfield").Bitfield;
 const Backup = @import("backup.zig").Backup;
 const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.GamePak);
@@ -10,6 +12,7 @@ title: [12]u8,
 buf: []u8,
 alloc: Allocator,
 backup: Backup,
+gpio: Gpio,
 
 pub fn init(alloc: Allocator, rom_path: []const u8, save_path: ?[]const u8) !Self {
     const file = try std.fs.cwd().openFile(rom_path, .{});
@@ -19,10 +22,11 @@ pub fn init(alloc: Allocator, rom_path: []const u8, save_path: ?[]const u8) !Sel
     const title = parseTitle(file_buf);
     const kind = Backup.guessKind(file_buf) orelse .None;
 
-    const pak = Self{
+    var pak = Self{
         .buf = file_buf,
         .alloc = alloc,
         .title = title,
+        .gpio = Gpio.init(alloc, .Rtc),
         .backup = try Backup.init(alloc, kind, title, save_path),
     };
     pak.parseHeader();
@@ -30,6 +34,24 @@ pub fn init(alloc: Allocator, rom_path: []const u8, save_path: ?[]const u8) !Sel
     return pak;
 }
 
+/// Configures any GPIO Device that may be enabled
+///
+/// Fundamentally, this just passes a pointer to the initialized GPIO struct to whatever heap allocated GPIO Device struct
+/// we happen to be using
+///
+/// WARNIG: As far as I know, this method must be called in main() or else we'll have a dangling pointer issue
+/// Despite using the General Purpose Allocator, Zig doesn't prevent me from doing this :sadface:
+pub fn setupGpio(self: *Self) void {
+    switch (self.gpio.device.kind) {
+        .Rtc => {
+            const ptr = self.gpio.device.ptr orelse @panic("RTC ptr is missing despite GPIO Device Kind");
+            const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), ptr));
+            Clock.init(clock, &self.gpio);
+        },
+        .None => {},
+    }
+}
+
 fn parseHeader(self: *const Self) void {
     const title = parseTitle(self.buf);
     const code = self.buf[0xAC..0xB0];
@@ -61,6 +83,7 @@ inline fn isLarge(self: *const Self) bool {
 pub fn deinit(self: Self) void {
     self.alloc.free(self.buf);
     self.backup.deinit();
+    self.gpio.deinit(self.alloc);
 }
 
 pub fn read(self: *Self, comptime T: type, address: u32) T {
@@ -82,6 +105,62 @@ pub fn read(self: *Self, comptime T: type, address: u32) T {
         }
     }
 
+    if (self.gpio.cnt == 1) {
+        // GPIO Can be read from
+        // We assume that this will only be true when a ROM actually does want something from GPIO
+
+        switch (T) {
+            u32 => switch (address) {
+                // TODO: Do I even need to implement these?
+                0x0800_00C4 => std.debug.panic("Handle 32-bit GPIO Data/Direction Reads", .{}),
+                0x0800_00C6 => std.debug.panic("Handle 32-bit GPIO Direction/Control Reads", .{}),
+                0x0800_00C8 => std.debug.panic("Handle 32-bit GPIO Control Reads", .{}),
+                else => {},
+            },
+            u16 => switch (address) {
+                // FIXME: What do 16-bit GPIO Reads look like?
+                0x0800_00C4 => return self.gpio.read(.Data),
+                0x0800_00C6 => return self.gpio.read(.Direction),
+                0x0800_00C8 => return self.gpio.read(.Control),
+                else => {},
+            },
+            u8 => switch (address) {
+                0x0800_00C4 => return self.gpio.read(.Data),
+                0x0800_00C6 => return self.gpio.read(.Direction),
+                0x0800_00C8 => return self.gpio.read(.Control),
+                else => {},
+            },
+            else => @compileError("GamePak[GPIO]: Unsupported read width"),
+        }
+    }
+
+    return switch (T) {
+        u32 => (@as(T, self.get(addr + 3)) << 24) | (@as(T, self.get(addr + 2)) << 16) | (@as(T, self.get(addr + 1)) << 8) | (@as(T, self.get(addr))),
+        u16 => (@as(T, self.get(addr + 1)) << 8) | @as(T, self.get(addr)),
+        u8 => self.get(addr),
+        else => @compileError("GamePak: Unsupported read width"),
+    };
+}
+
+pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
+    const addr = address & 0x1FF_FFFF;
+
+    if (self.backup.kind == .Eeprom) {
+        if (self.isLarge()) {
+            // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
+            // * Backup type is EEPROM
+            // * Large ROM (Size is greater than 16MB)
+            if (addr > 0x1FF_FEFF)
+                return self.backup.eeprom.dbgRead();
+        } else {
+            // Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
+            // * Backup type is EEPROM
+            // * Small ROM (less than 16MB)
+            if (@truncate(u8, address >> 24) == 0x0D)
+                return self.backup.eeprom.dbgRead();
+        }
+    }
+
     return switch (T) {
         u32 => (@as(T, self.get(addr + 3)) << 24) | (@as(T, self.get(addr + 2)) << 16) | (@as(T, self.get(addr + 1)) << 8) | (@as(T, self.get(addr))),
         u16 => (@as(T, self.get(addr + 1)) << 8) | @as(T, self.get(addr)),
@@ -113,17 +192,23 @@ pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value
 
     switch (T) {
         u32 => switch (address) {
-            0x0800_00C4 => log.debug("Wrote {} 0x{X:} to I/O Port Data and Direction", .{ T, value }),
+            0x0800_00C4 => {
-            0x0800_00C6 => log.debug("Wrote {} 0x{X:} to I/O Port Direction and Control", .{ T, value }),
+                self.gpio.write(.Data, @truncate(u4, value));
-            else => {},
+                self.gpio.write(.Direction, @truncate(u4, value >> 16));
+            },
+            0x0800_00C6 => {
+                self.gpio.write(.Direction, @truncate(u4, value));
+                self.gpio.write(.Control, @truncate(u1, value >> 16));
+            },
+            else => log.err("Wrote {} 0x{X:0>8} to 0x{X:0>8}, Unhandled", .{ T, value, address }),
         },
         u16 => switch (address) {
-            0x0800_00C4 => log.debug("Wrote {} 0x{X:} to I/O Port Data", .{ T, value }),
+            0x0800_00C4 => self.gpio.write(.Data, @truncate(u4, value)),
-            0x0800_00C6 => log.debug("Wrote {} 0x{X:} to I/O Port Direction", .{ T, value }),
+            0x0800_00C6 => self.gpio.write(.Direction, @truncate(u4, value)),
-            0x0800_00C8 => log.debug("Wrote {} 0x{X:} to I/O Port Control", .{ T, value }),
+            0x0800_00C8 => self.gpio.write(.Control, @truncate(u1, value)),
-            else => {},
+            else => log.err("Wrote {} 0x{X:0>4} to 0x{X:0>8}, Unhandled", .{ T, value, address }),
         },
-        u8 => log.debug("Wrote {} 0x{X:} to 0x{X:0>8}, Ignored.", .{ T, value, address }),
+        u8 => log.debug("Wrote {} 0x{X:0>2} to 0x{X:0>8}, Ignored.", .{ T, value, address }),
         else => @compileError("GamePak: Unsupported write width"),
     }
 }
@@ -155,3 +240,343 @@ test "OOB Access" {
     std.debug.assert(pak.get(4) == 0x02); // 0x0002
     std.debug.assert(pak.get(5) == 0x00);
 }
+
+/// GPIO Register Implementation
+const Gpio = struct {
+    const This = @This();
+
+    data: u4,
+    direction: u4,
+    cnt: u1,
+
+    device: Device,
+
+    const Device = struct {
+        ptr: ?*anyopaque,
+        // TODO: Maybe make this comptime known? Removes some if statements
+        kind: Kind,
+
+        const Kind = enum {
+            Rtc,
+            None,
+        };
+
+        fn step(self: *Device, value: u4) void {
+            switch (self.kind) {
+                .Rtc => {
+                    const ptr = self.ptr orelse @panic("Device.ptr should != null when Device.kind == .Rtc");
+                    const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), ptr));
+
+                    clock.step(Clock.GpioData{ .raw = value });
+                },
+                .None => {},
+            }
+        }
+
+        fn init(kind: Kind, ptr: ?*anyopaque) Device {
+            return .{ .kind = kind, .ptr = ptr };
+        }
+    };
+
+    const Register = enum {
+        Data,
+        Direction,
+        Control,
+    };
+
+    fn init(allocator: Allocator, kind: Device.Kind) This {
+        return .{
+            .data = 0b0000,
+            .direction = 0b1111, // TODO: What is GPIO Direction set to by default?
+            .cnt = 0b0,
+
+            .device = switch (kind) {
+                .Rtc => blk: {
+                    const ptr = allocator.create(Clock) catch @panic("Failed to allocate RTC struct on heap");
+                    break :blk Device{ .kind = kind, .ptr = ptr };
+                },
+                .None => Device{ .kind = kind, .ptr = null },
+            },
+        };
+    }
+
+    fn deinit(self: This, allocator: Allocator) void {
+        switch (self.device.kind) {
+            .Rtc => {
+                const ptr = self.device.ptr orelse @panic("Device.ptr should != null when Device.kind == .Rtc");
+                allocator.destroy(@ptrCast(*Clock, @alignCast(@alignOf(*Clock), ptr)));
+            },
+            .None => {},
+        }
+    }
+
+    fn write(self: *This, comptime reg: Register, value: if (reg == .Control) u1 else u4) void {
+        log.debug("RTC: Wrote 0b{b:0>4} to {}", .{ value, reg });
+
+        // if (reg == .Data)
+        // log.err("original: 0b{b:0>4} masked: 0b{b:0>4} result: 0b{b:0>4}", .{ self.data, value & self.direction, self.data | (value & self.direction) });
+
+        switch (reg) {
+            .Data => {
+                const masked_value = value & self.direction;
+
+                self.device.step(masked_value);
+                self.data = masked_value;
+            },
+            .Direction => self.direction = value,
+            .Control => self.cnt = value,
+        }
+    }
+
+    fn read(self: *const This, comptime reg: Register) if (reg == .Control) u1 else u4 {
+        if (self.cnt == 0) return 0;
+
+        return switch (reg) {
+            .Data => self.data & ~self.direction,
+            .Direction => self.direction,
+            .Control => self.cnt,
+        };
+    }
+};
+
+/// GBA Real Time Clock
+const Clock = struct {
+    const This = @This();
+
+    cmd: Command,
+    writer: Writer,
+    state: State,
+    cnt: Control,
+
+    year: u8,
+    month: u5,
+    day: u6,
+    day_of_week: u3,
+    hour: u6,
+    minute: u7,
+    second: u7,
+
+    gpio: *const Gpio,
+
+    const Register = enum {
+        Control,
+        DateTime,
+        Time,
+    };
+
+    const State = union(enum) {
+        Idle,
+        CommandInput,
+        Write: Register,
+        Read: Register,
+    };
+
+    const Writer = struct {
+        buf: u8,
+        i: u4,
+
+        /// The Number of bytes written to since last reset
+        count: u8,
+
+        fn push(self: *Writer, value: u1) void {
+            const idx = @intCast(u3, self.i);
+            self.buf = (self.buf & ~(@as(u8, 1) << idx)) | @as(u8, value) << idx;
+            self.i += 1;
+        }
+
+        fn lap(self: *Writer) void {
+            self.buf = 0;
+            self.i = 0;
+            self.count += 1;
+        }
+
+        fn reset(self: *Writer) void {
+            self.buf = 0;
+            self.i = 0;
+            self.count = 0;
+        }
+
+        fn isFinished(self: *const Writer) bool {
+            return self.i >= 8;
+        }
+
+        fn getCount(self: *const Writer) u8 {
+            return self.count;
+        }
+
+        fn getValue(self: *const Writer) u8 {
+            return self.buf;
+        }
+    };
+
+    const Command = struct {
+        buf: u8,
+        i: u4,
+
+        fn push(self: *Command, value: u1) void {
+            const idx = @intCast(u3, self.i);
+            self.buf = (self.buf & ~(@as(u8, 1) << idx)) | @as(u8, value) << idx;
+            self.i += 1;
+        }
+
+        fn reset(self: *Command) void {
+            self.buf = 0;
+            self.i = 0;
+        }
+
+        fn isFinished(self: *const Command) bool {
+            return self.i >= 8;
+        }
+
+        fn getCommand(self: *const Command) u8 {
+            // If high Nybble does not contain 0x6, reverse the order of the nybbles.
+            // For some reason RTC commands can be LSB or MSB which is funny
+            return if (self.buf >> 4 & 0xF == 0x6) self.buf else (self.buf & 0xF) << 4 | (self.buf >> 4 & 0xF);
+        }
+
+        fn handleCommand(self: *const Command, rtc: *Clock) State {
+            log.info("RTC: Failed to handle Command 0b{b:0>8} aka 0x{X:0>2}", .{ self.buf, self.buf });
+            const command = self.getCommand();
+
+            const is_write = command & 1 == 0;
+            const rtc_register = @intCast(u3, command >> 1 & 0x7); // TODO: Make Truncate
+
+            if (is_write) {
+                return switch (rtc_register) {
+                    0 => blk: {
+                        rtc.reset();
+                        break :blk .Idle;
+                    },
+                    1 => .{ .Write = .Control },
+                    2 => .{ .Write = .DateTime },
+                    3 => .{ .Write = .Time },
+                    6 => blk: {
+                        rtc.irq();
+                        break :blk .Idle;
+                    },
+                    4, 5, 7 => .Idle,
+                };
+            } else {
+                return switch (rtc_register) {
+                    1 => .{ .Read = .Control },
+                    2 => .{ .Read = .DateTime },
+                    3 => .{ .Read = .Time },
+                    0, 4, 5, 6, 7 => .Idle, // Do Nothing
+                };
+            }
+        }
+    };
+
+    const GpioData = extern union {
+        sck: Bit(u4, 0),
+        sio: Bit(u4, 1),
+        cs: Bit(u4, 2),
+        raw: u4,
+    };
+
+    const Control = extern union {
+        /// Unknown, value should be preserved though
+        unk: Bit(u8, 1),
+        /// Per-minute IRQ
+        /// If set, fire a Gamepak IRQ every 30s,
+        irq: Bit(u8, 3),
+        /// 12/24 Hour Bit
+        /// If set, 12h mode
+        /// If cleared, 24h mode
+        mode: Bit(u8, 6),
+        /// Read-Only, bit cleared on read
+        /// If is set, means that there has been a failure / time has been lost
+        off: Bit(u8, 7),
+        raw: u8,
+    };
+
+    fn init(ptr: *This, gpio: *const Gpio) void {
+        ptr.* = .{
+            .cmd = .{ .buf = 0, .i = 0 },
+            .writer = .{ .buf = 0, .i = 0, .count = 0 },
+            .state = .Idle,
+            .cnt = .{ .raw = 0 },
+            .year = 0,
+            .month = 0,
+            .day = 0,
+            .day_of_week = 0,
+            .hour = 0,
+            .minute = 0,
+            .second = 0,
+            .gpio = gpio,
+        };
+    }
+
+    fn attachGpio(self: *This, gpio: *const Gpio) void {
+        self.gpio = gpio;
+    }
+
+    fn step(self: *This, value: GpioData) void {
+        const cache: GpioData = .{ .raw = self.gpio.data };
+
+        switch (self.state) {
+            .Idle => {
+                // If SCK is high and CS rises, then prepare for Command
+                // FIXME: Maybe check incoming value to see if SCK is also high?
+                if (cache.sck.read()) {
+                    if (!cache.cs.read() and value.cs.read()) {
+                        log.err("RTC: Entering Command Mode", .{});
+                        self.state = .CommandInput;
+                        self.cmd.reset();
+                    }
+                }
+            },
+            .CommandInput => {
+                if (!value.cs.read()) log.err("RTC: Expected CS to be set during {}, however CS was cleared", .{self.state});
+
+                if (!cache.sck.read() and value.sck.read()) {
+                    // If SCK rises, sample SIO
+                    log.debug("RTC: Sampled 0b{b:0>1} from SIO", .{@boolToInt(value.sio.read())});
+                    self.cmd.push(@boolToInt(value.sio.read()));
+
+                    if (self.cmd.isFinished()) {
+                        self.state = self.cmd.handleCommand(self);
+                    }
+                }
+            },
+            State{ .Write = .Control } => {
+                if (!value.cs.read()) log.err("RTC: Expected CS to be set during {}, however CS was cleared", .{self.state});
+
+                if (!cache.sck.read() and value.sck.read()) {
+                    // If SCK rises, sample SIO
+
+                    log.debug("RTC: Sampled 0b{b:0>1} from SIO", .{@boolToInt(value.sio.read())});
+                    self.writer.push(@boolToInt(value.sio.read()));
+
+                    if (self.writer.isFinished()) {
+                        self.writer.lap();
+                        self.cnt.raw = self.writer.getValue();
+
+                        // FIXME: Move this to a constant or something
+                        if (self.writer.getCount() == 1) {
+                            self.writer.reset();
+                            self.state = .Idle;
+                        }
+                    }
+                }
+            },
+            else => {
+                // TODO: Implement Read/Writes for Date/Time and Time and Control
+                log.err("RTC: Ignored request to handle {} command", .{self.state});
+                self.state = .Idle;
+            },
+        }
+    }
+
+    fn reset(self: *This) void {
+        // mGBA and NBA only zero the control register
+        // we'll do the same
+        self.cnt.raw = 0;
+        log.info("RTC: Reset executed (control register was zeroed)", .{});
+    }
+
+    fn irq(_: *const This) void {
+        // TODO: Force GamePak IRQ
+        log.err("RTC: TODO: Force GamePak IRQ", .{});
+    }
+};

src/core/bus/backup.zig

@@ -340,6 +340,10 @@ const Eeprom = struct {
         return self.reader.read();
     }
 
+    pub fn dbgRead(self: *const Self) u1 {
+        return self.reader.dbgRead();
+    }
+
     pub fn write(self: *Self, word_count: u16, buf: *[]u8, bit: u1) void {
         if (self.guessKind(word_count)) |found| {
             log.info("EEPROM Kind: {}", .{found});
@@ -492,6 +496,19 @@ const Eeprom = struct {
 
             return bit;
         }
+
+        fn dbgRead(self: *const This) u1 {
+            if (!self.enabled) return 1;
+
+            const bit = if (self.i < 4) blk: {
+                break :blk 0;
+            } else blk: {
+                const idx = @intCast(u6, 63 - (self.i - 4));
+                break :blk @truncate(u1, self.data >> idx);
+            };
+
+            return bit;
+        }
     };
 
     const Writer = struct {

src/core/cpu.zig

@@ -520,11 +520,11 @@ pub const Arm7tdmi = struct {
         prettyPrintPsr(&self.spsr);
 
         if (self.cpsr.t.read()) {
-            const opcode = self.bus.debugRead(u16, self.r[15] - 4);
+            const opcode = self.bus.dbgRead(u16, self.r[15] - 4);
             const id = thumbIdx(opcode);
             std.debug.print("opcode: ID: 0x{b:0>10} 0x{X:0>4}\n", .{ id, opcode });
         } else {
-            const opcode = self.bus.debugRead(u32, self.r[15] - 4);
+            const opcode = self.bus.dbgRead(u32, self.r[15] - 4);
             const id = armIdx(opcode);
             std.debug.print("opcode: ID: 0x{X:0>3} 0x{X:0>8}\n", .{ id, opcode });
         }
@@ -590,7 +590,7 @@ pub const Arm7tdmi = struct {
         if (self.cpsr.t.read()) {
             if (opcode >> 11 == 0x1E) {
                 // Instruction 1 of a BL Opcode, print in ARM mode
-                const other_half = self.bus.debugRead(u16, self.r[15]);
+                const other_half = self.bus.dbgRead(u16, self.r[15]);
                 const bl_opcode = @as(u32, opcode) << 16 | other_half;
 
                 log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, bl_opcode });

src/core/emu.zig

@@ -12,9 +12,11 @@ const Thread = std.Thread;
 const Atomic = std.atomic.Atomic;
 const Allocator = std.mem.Allocator;
 
-const sync_audio = false;
+// TODO: Move these to a TOML File
-const sync_video: RunKind = .UnlimitedFPS;
+const sync_audio = true; // Enable Audio Sync
-pub const cpu_logging = false;
+const sync_video: RunKind = .LimitedFPS; // Configure Video Sync
+pub const win_scale = 3; // 1x, 2x, 3x, etc. Window Scaling
+pub const cpu_logging = false; // Enable detailed CPU logging
 
 // 228 Lines which consist of 308 dots (which are 4 cycles long)
 const cycles_per_frame: u64 = 228 * (308 * 4); //280896

src/core/util.zig

@@ -137,7 +137,7 @@ pub const Logger = struct {
         if (arm7tdmi.cpsr.t.read()) {
             if (opcode >> 11 == 0x1E) {
                 // Instruction 1 of a BL Opcode, print in ARM mode
-                const low = arm7tdmi.bus.debugRead(u16, arm7tdmi.r[15]);
+                const low = arm7tdmi.bus.dbgRead(u16, arm7tdmi.r[15]);
                 const bl_opcode = @as(u32, opcode) << 16 | low;
 
                 self.print(arm_fmt, Self.fmtArgs(arm7tdmi, bl_opcode)) catch @panic("failed to write to log file");

src/main.zig

@@ -45,6 +45,7 @@ pub fn main() anyerror!void {
     defer scheduler.deinit();
 
     var bus = try Bus.init(allocator, &scheduler, paths);
+    bus.pak.setupGpio(); // FIXME: Can I not call this in main()?
     defer bus.deinit();
 
     var arm7tdmi = Arm7tdmi.init(&scheduler, &bus);