chore: switch from zig-toml to tomlz

README.md

@@ -10,7 +10,7 @@ This is a simple (read: incomplete) for-fun long-term project. I hope to get "mo
 
 ### TODO
 
-- [x] Affine Sprites
+- [ ] Affine Sprites
 - [ ] Windowing (see [this branch](https://git.musuka.dev/paoda/zba/src/branch/window))
 - [ ] Audio Resampler (Having issues with SDL2's)
 - [ ] Immediate Mode GUI
@@ -77,7 +77,7 @@ arm7wrestler GBA Fixed | [destoer](https://github.com/destoer)
 
 ## Compiling
 
-Most recently built on Zig [v0.11.0-dev.987+a1d82352d](https://github.com/ziglang/zig/tree/a1d82352d)
+Most recently built on Zig [0.11.0-dev.368+1829b6eab](https://github.com/ziglang/zig/tree/1829b6eab)
 
 ### Dependencies
 

build.zig

@@ -4,7 +4,7 @@ const Sdk = @import("lib/SDL.zig/Sdk.zig");
 
 pub fn build(b: *std.build.Builder) void {
     // Minimum Zig Version
-    const min_ver = std.SemanticVersion.parse("0.11.0-dev.987+a1d82352d") catch return; // https://github.com/ziglang/zig/commit/19056cb68
+    const min_ver = std.SemanticVersion.parse("0.11.0-dev.323+30eb2a175") catch return; // https://github.com/ziglang/zig/commit/30eb2a175
     if (builtin.zig_version.order(min_ver).compare(.lt)) {
         std.log.err("{s}", .{b.fmt("Zig v{} does not meet the minimum version requirement. (Zig v{})", .{ builtin.zig_version, min_ver })});
         std.os.exit(1);

lib/SDL.zig

@@ -1 +1 @@
-Subproject commit 2fbd4b228516bf08348a3173f1446c7e8d75540a
+Subproject commit 00b43568854f14e3bab340a4e062776ecb44a727

lib/tomlz

@@ -1 +1 @@
-Subproject commit c1537005e3426dbba8f8f3e524e7879b283d0326
+Subproject commit a0337d65a07d285efe5d5b060c7ec1aa0035a2b9

lib/zig-clap

@@ -1 +1 @@
-Subproject commit 88edafd00ec25dcc01deb8fc69e9864a16f8717c
+Subproject commit a1b01ffeab452790790034b8a0e97aa30bbeb800

src/core/Bus.zig

@@ -60,8 +60,9 @@ allocator: Allocator,
 pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi, paths: FilePaths) !void {
     const tables = try allocator.alloc(?*anyopaque, 3 * table_len); // Allocate all tables
 
-    const read_table = tables[0..table_len];
+    const read_table: *[table_len]?*const anyopaque = tables[0..table_len];
-    const write_tables = .{ tables[table_len .. 2 * table_len], tables[2 * table_len .. 3 * table_len] };
+    const left_write: *[table_len]?*anyopaque = tables[table_len .. 2 * table_len];
+    const right_write: *[table_len]?*anyopaque = tables[2 * table_len .. 3 * table_len];
 
     self.* = .{
         .pak = try GamePak.init(allocator, cpu, paths.rom, paths.save),
@@ -77,15 +78,18 @@ pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi
         .sched = sched,
 
         .read_table = read_table,
-        .write_tables = write_tables,
+        .write_tables = .{ left_write, right_write },
         .allocator = allocator,
     };
 
-    self.fillReadTable(read_table);
+    // read_table, write_tables, and *Self are not restricted to the lifetime
+    // of this init function so we can initialize our tables here
+    fillReadTable(self, read_table);
 
-    // Internal Display Memory behaves differently on 8-bit reads
+    // Internal Display Memory behavious unusually on 8-bit reads
-    self.fillWriteTable(u32, write_tables[0]);
+    // so we have two different tables depending on whether there's an 8-bit read or not
-    self.fillWriteTable(u8, write_tables[1]);
+    fillWriteTable(u32, self, left_write);
+    fillWriteTable(u8, self, right_write);
 }
 
 pub fn deinit(self: *Self) void {
@@ -102,50 +106,50 @@ pub fn deinit(self: *Self) void {
     self.* = undefined;
 }
 
-fn fillReadTable(self: *Self, table: *[table_len]?*const anyopaque) void {
+fn fillReadTable(bus: *Self, table: *[table_len]?*const anyopaque) void {
-    const vramMirror = @import("ppu/Vram.zig").mirror;
+    const vramMirror = @import("ppu.zig").Vram.mirror;
 
     for (table) |*ptr, i| {
-        const addr = @intCast(u32, page_size * i);
+        const addr = page_size * i;
 
         ptr.* = switch (addr) {
             // General Internal Memory
             0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
-            0x0200_0000...0x02FF_FFFF => &self.ewram.buf[addr & 0x3FFFF],
+            0x0200_0000...0x02FF_FFFF => &bus.ewram.buf[addr & 0x3FFFF],
-            0x0300_0000...0x03FF_FFFF => &self.iwram.buf[addr & 0x7FFF],
+            0x0300_0000...0x03FF_FFFF => &bus.iwram.buf[addr & 0x7FFF],
             0x0400_0000...0x0400_03FF => null, // I/O
 
             // Internal Display Memory
-            0x0500_0000...0x05FF_FFFF => &self.ppu.palette.buf[addr & 0x3FF],
+            0x0500_0000...0x05FF_FFFF => &bus.ppu.palette.buf[addr & 0x3FF],
-            0x0600_0000...0x06FF_FFFF => &self.ppu.vram.buf[vramMirror(addr)],
+            0x0600_0000...0x06FF_FFFF => &bus.ppu.vram.buf[vramMirror(addr)],
-            0x0700_0000...0x07FF_FFFF => &self.ppu.oam.buf[addr & 0x3FF],
+            0x0700_0000...0x07FF_FFFF => &bus.ppu.oam.buf[addr & 0x3FF],
 
             // External Memory (Game Pak)
-            0x0800_0000...0x0DFF_FFFF => self.fillReadTableExternal(addr),
+            0x0800_0000...0x0DFF_FFFF => fillTableExternalMemory(bus, addr),
             0x0E00_0000...0x0FFF_FFFF => null, // SRAM
             else => null,
         };
     }
 }
 
-fn fillWriteTable(self: *Self, comptime T: type, table: *[table_len]?*const anyopaque) void {
+fn fillWriteTable(comptime T: type, bus: *Self, table: *[table_len]?*const anyopaque) void {
     comptime std.debug.assert(T == u32 or T == u16 or T == u8);
-    const vramMirror = @import("ppu/Vram.zig").mirror;
+    const vramMirror = @import("ppu.zig").Vram.mirror;
 
     for (table) |*ptr, i| {
-        const addr = @intCast(u32, page_size * i);
+        const addr = page_size * i;
 
         ptr.* = switch (addr) {
             // General Internal Memory
             0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
-            0x0200_0000...0x02FF_FFFF => &self.ewram.buf[addr & 0x3FFFF],
+            0x0200_0000...0x02FF_FFFF => &bus.ewram.buf[addr & 0x3FFFF],
-            0x0300_0000...0x03FF_FFFF => &self.iwram.buf[addr & 0x7FFF],
+            0x0300_0000...0x03FF_FFFF => &bus.iwram.buf[addr & 0x7FFF],
             0x0400_0000...0x0400_03FF => null, // I/O
 
             // Internal Display Memory
-            0x0500_0000...0x05FF_FFFF => if (T != u8) &self.ppu.palette.buf[addr & 0x3FF] else null,
+            0x0500_0000...0x05FF_FFFF => if (T != u8) &bus.ppu.palette.buf[addr & 0x3FF] else null,
-            0x0600_0000...0x06FF_FFFF => if (T != u8) &self.ppu.vram.buf[vramMirror(addr)] else null,
+            0x0600_0000...0x06FF_FFFF => if (T != u8) &bus.ppu.vram.buf[vramMirror(addr)] else null,
-            0x0700_0000...0x07FF_FFFF => if (T != u8) &self.ppu.oam.buf[addr & 0x3FF] else null,
+            0x0700_0000...0x07FF_FFFF => if (T != u8) &bus.ppu.oam.buf[addr & 0x3FF] else null,
 
             // External Memory (Game Pak)
             0x0800_0000...0x0DFF_FFFF => null, // ROM
@@ -155,29 +159,24 @@ fn fillWriteTable(self: *Self, comptime T: type, table: *[table_len]?*const anyo
     }
 }
 
-fn fillReadTableExternal(self: *Self, addr: u32) ?*anyopaque {
+fn fillTableExternalMemory(bus: *Self, addr: usize) ?*anyopaque {
     // see `GamePak.zig` for more information about what conditions need to be true
     // so that a simple pointer dereference isn't possible
 
-    std.debug.assert(addr & @as(u32, page_size - 1) == 0); // addr is guaranteed to be page-aligned
-
     const start_addr = addr;
-    const end_addr = start_addr + page_size;
+    const end_addr = addr + page_size;
 
-    {
+    const gpio_data = start_addr <= 0x0800_00C4 and 0x0800_00C4 < end_addr;
-        const data = start_addr <= 0x0800_00C4 and 0x0800_00C4 < end_addr; // GPIO Data
+    const gpio_direction = start_addr <= 0x0800_00C6 and 0x0800_00C6 < end_addr;
-        const direction = start_addr <= 0x0800_00C6 and 0x0800_00C6 < end_addr; // GPIO Direction
+    const gpio_control = start_addr <= 0x0800_00C8 and 0x0800_00C8 < end_addr;
-        const control = start_addr <= 0x0800_00C8 and 0x0800_00C8 < end_addr; // GPIO Control
 
-        const has_gpio = data or direction or control;
+    if (bus.pak.gpio.device.kind != .None and (gpio_data or gpio_direction or gpio_control)) {
-        const gpio_kind = self.pak.gpio.device.kind;
+        // We found a GPIO device, and this page a GPIO register. We want to handle this in slowmem
-
+        return null;
-        // There is a GPIO Device, and the current page contains at least one memory-mapped GPIO register
-        if (gpio_kind != .None and has_gpio) return null;
     }
 
-    if (self.pak.backup.kind == .Eeprom) {
+    if (bus.pak.backup.kind == .Eeprom) {
-        if (self.pak.buf.len > 0x100_000) {
+        if (bus.pak.buf.len > 0x100_000) {
             // We are using a "large" EEPROM which means that if the below check is true
             // this page has an address that's reserved for the EEPROM and therefore must
             // be handled in slowmem
@@ -193,33 +192,13 @@ fn fillReadTableExternal(self: *Self, addr: u32) ?*anyopaque {
     // Finally, the GamePak has some unique behaviour for reads past the end of the ROM,
     // so those will be handled by slowmem as well
     const masked_addr = addr & 0x1FF_FFFF;
-    if (masked_addr >= self.pak.buf.len) return null;
+    if (masked_addr >= bus.pak.buf.len) return null;
 
-    return &self.pak.buf[masked_addr];
+    return &bus.pak.buf[masked_addr];
 }
 
+// TODO: Take advantage of fastmem here too?
 pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // We're doing some serious out-of-bounds open-bus reads
-    if (page >= table_len) return self.openBus(T, unaligned_address);
-
-    if (self.read_table[page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const Ptr = [*]const T;
-        const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        return ptr[forceAlign(T, offset) / @sizeOf(T)];
-    }
-
-    return self.dbgSlowRead(T, unaligned_address);
-}
-
-fn dbgSlowRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
     const page = @truncate(u8, unaligned_address >> 24);
     const address = forceAlign(T, unaligned_address);
 
@@ -227,22 +206,33 @@ fn dbgSlowRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
         // General Internal Memory
         0x00 => blk: {
             if (address < Bios.size)
-                break :blk self.bios.dbgRead(T, self.cpu.r[15], unaligned_address);
+                break :blk self.bios.dbgRead(T, self.cpu.r[15], address);
 
             break :blk self.openBus(T, address);
         },
-        0x02 => unreachable, // handled by fastmem
+        0x02 => self.ewram.read(T, address),
-        0x03 => unreachable, // handled by fastmem
+        0x03 => self.iwram.read(T, address),
         0x04 => self.readIo(T, address),
 
         // Internal Display Memory
-        0x05 => unreachable, // handled by fastmem
+        0x05 => self.ppu.palette.read(T, address),
-        0x06 => unreachable, // handled by fastmem
+        0x06 => self.ppu.vram.read(T, address),
-        0x07 => unreachable, // handled by fastmem
+        0x07 => self.ppu.oam.read(T, address),
 
         // External Memory (Game Pak)
         0x08...0x0D => self.pak.dbgRead(T, address),
-        0x0E...0x0F => self.readBackup(T, unaligned_address),
+        0x0E...0x0F => blk: {
+            const value = self.pak.backup.read(unaligned_address);
+
+            const multiplier = switch (T) {
+                u32 => 0x01010101,
+                u16 => 0x0101,
+                u8 => 1,
+                else => @compileError("Backup: Unsupported read width"),
+            };
+
+            break :blk @as(T, value) * multiplier;
+        },
         else => self.openBus(T, address),
     };
 }
@@ -326,7 +316,8 @@ pub fn read(self: *Self, comptime T: type, unaligned_address: u32) T {
     if (self.read_table[page]) |some_ptr| {
         // We have a pointer to a page, cast the pointer to it's underlying type
         const Ptr = [*]const T;
-        const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
+        const alignment = @alignOf(std.meta.Child(Ptr));
+        const ptr = @ptrCast(Ptr, @alignCast(alignment, some_ptr));
 
         // Note: We don't check array length, since we force align the
         // lower bits of the address as the GBA would
@@ -346,7 +337,7 @@ fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
         // General Internal Memory
         0x00 => blk: {
             if (address < Bios.size)
-                break :blk self.bios.read(T, self.cpu.r[15], unaligned_address);
+                break :blk self.bios.read(T, self.cpu.r[15], address);
 
             break :blk self.openBus(T, address);
         },
@@ -361,24 +352,22 @@ fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
 
         // External Memory (Game Pak)
         0x08...0x0D => self.pak.read(T, address),
-        0x0E...0x0F => self.readBackup(T, unaligned_address),
+        0x0E...0x0F => blk: {
+            const value = self.pak.backup.read(unaligned_address);
+
+            const multiplier = switch (T) {
+                u32 => 0x01010101,
+                u16 => 0x0101,
+                u8 => 1,
+                else => @compileError("Backup: Unsupported read width"),
+            };
+
+            break :blk @as(T, value) * multiplier;
+        },
         else => self.openBus(T, address),
     };
 }
 
-fn readBackup(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const value = self.pak.backup.read(unaligned_address);
-
-    const multiplier = switch (T) {
-        u32 => 0x01010101,
-        u16 => 0x0101,
-        u8 => 1,
-        else => @compileError("Backup: Unsupported read width"),
-    };
-
-    return @as(T, value) * multiplier;
-}
-
 pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
     const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
     const page = unaligned_address >> bits;
@@ -393,7 +382,8 @@ pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) vo
     if (self.write_tables[@boolToInt(T == u8)][page]) |some_ptr| {
         // We have a pointer to a page, cast the pointer to it's underlying type
         const Ptr = [*]T;
-        const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
+        const alignment = @alignOf(std.meta.Child(Ptr));
+        const ptr = @ptrCast(Ptr, @alignCast(alignment, some_ptr));
 
         // Note: We don't check array length, since we force align the
         // lower bits of the address as the GBA would
@@ -406,9 +396,8 @@ pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) vo
     }
 }
 
-fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
+pub fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    @setCold(true);
+    // @setCold(true);
-
     const page = @truncate(u8, unaligned_address >> 24);
     const address = forceAlign(T, unaligned_address);
 
@@ -436,11 +425,11 @@ inline fn rotateBy(comptime T: type, address: u32) u32 {
         u32 => address & 3,
         u16 => address & 1,
         u8 => 0,
-        else => @compileError("Unsupported write width"),
+        else => @compileError("Backup: Unsupported write width"),
     };
 }
 
-pub inline fn forceAlign(comptime T: type, address: u32) u32 {
+inline fn forceAlign(comptime T: type, address: u32) u32 {
     return switch (T) {
         u32 => address & ~@as(u32, 3),
         u16 => address & ~@as(u32, 1),

src/core/apu/ToneSweep.zig

@@ -94,9 +94,10 @@ pub fn sound1CntL(self: *const Self) u8 {
 pub fn setSound1CntL(self: *Self, value: u8) void {
     const new = io.Sweep{ .raw = value };
 
-    if (!new.direction.read()) {
+    if (self.sweep.direction.read() and !new.direction.read()) {
-        // If at least one (1) sweep calculation has been made with
+        // Sweep Negate bit has been cleared
-        // the negate bit set (since last trigger), disable the channel
+        // If At least 1 Sweep Calculation has been made since
+        // the last trigger, the channel is immediately disabled
 
         if (self.sweep_dev.calc_performed) self.enabled = false;
     }

src/core/apu/device/Sweep.zig

@@ -31,6 +31,7 @@ pub fn tick(self: *Self, ch1: *ToneSweep) void {
     if (self.timer == 0) {
         const period = ch1.sweep.period.read();
         self.timer = if (period == 0) 8 else period;
+        if (!self.calc_performed) self.calc_performed = true;
 
         if (self.enabled and period != 0) {
             const new_freq = self.calculate(ch1.sweep, &ch1.enabled);
@@ -51,10 +52,7 @@ pub fn calculate(self: *Self, sweep: io.Sweep, ch_enable: *bool) u12 {
     const shadow_shifted = shadow >> sweep.shift.read();
     const decrease = sweep.direction.read();
 
-    const freq = if (decrease) blk: {
+    const freq = if (decrease) shadow - shadow_shifted else shadow + shadow_shifted;
-        self.calc_performed = true;
-        break :blk shadow - shadow_shifted;
-    } else shadow + shadow_shifted;
     if (freq > 0x7FF) ch_enable.* = false;
 
     return freq;

src/core/bus/Bios.zig

@@ -3,9 +3,6 @@ const std = @import("std");
 const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.Bios);
 
-const rotr = @import("../../util.zig").rotr;
-const forceAlign = @import("../Bus.zig").forceAlign;
-
 /// Size of the BIOS in bytes
 pub const size = 0x4000;
 const Self = @This();
@@ -13,37 +10,21 @@ const Self = @This();
 buf: ?[]u8,
 allocator: Allocator,
 
-addr_latch: u32 = 0,
+addr_latch: u32,
 
-// https://github.com/ITotalJustice/notorious_beeg/issues/106
+pub fn read(self: *Self, comptime T: type, r15: u32, addr: u32) T {
-pub fn read(self: *Self, comptime T: type, r15: u32, address: u32) T {
     if (r15 < Self.size) {
-        const addr = forceAlign(T, address);
-
         self.addr_latch = addr;
         return self._read(T, addr);
     }
 
-    log.warn("Open Bus! Read from 0x{X:0>8}, but PC was 0x{X:0>8}", .{ address, r15 });
+    log.debug("Rejected read since r15=0x{X:0>8}", .{r15});
-    const value = self._read(u32, self.addr_latch);
+    return @truncate(T, self._read(T, self.addr_latch));
-
-    return @truncate(T, rotr(u32, value, 8 * rotateBy(T, address)));
 }
 
-fn rotateBy(comptime T: type, address: u32) u32 {
+pub fn dbgRead(self: *const Self, comptime T: type, r15: u32, addr: u32) T {
-    return switch (T) {
+    if (r15 < Self.size) return self._read(T, addr);
-        u8 => address & 3,
+    return @truncate(T, self._read(T, self.addr_latch + 8));
-        u16 => address & 2,
-        u32 => 0,
-        else => @compileError("bios: unsupported read width"),
-    };
-}
-
-pub fn dbgRead(self: *const Self, comptime T: type, r15: u32, address: u32) T {
-    if (r15 < Self.size) return self._read(T, forceAlign(T, address));
-
-    const value = self._read(u32, self.addr_latch);
-    return @truncate(T, rotr(u32, value, 8 * rotateBy(T, address)));
 }
 
 /// Read without the GBA safety checks
@@ -62,19 +43,18 @@ pub fn write(_: *Self, comptime T: type, addr: u32, value: T) void {
 }
 
 pub fn init(allocator: Allocator, maybe_path: ?[]const u8) !Self {
-    if (maybe_path == null) return .{ .buf = null, .allocator = allocator };
+    const buf: ?[]u8 = if (maybe_path) |path| blk: {
-    const path = maybe_path.?;
+        const file = try std.fs.cwd().openFile(path, .{});
+        defer file.close();
 
-    const buf = try allocator.alloc(u8, Self.size);
+        break :blk try file.readToEndAlloc(allocator, try file.getEndPos());
-    errdefer allocator.free(buf);
+    } else null;
 
-    const file = try std.fs.cwd().openFile(path, .{});
+    return Self{
-    defer file.close();
+        .buf = buf,
-
+        .allocator = allocator,
-    const file_len = try file.readAll(buf);
+        .addr_latch = 0,
-    if (file_len != Self.size) log.err("Expected BIOS to be {}B, was {}B", .{ Self.size, file_len });
+    };
-
-    return Self{ .buf = buf, .allocator = allocator };
 }
 
 pub fn deinit(self: *Self) void {

src/core/bus/dma.zig

@@ -338,7 +338,7 @@ fn DmaController(comptime id: u2) type {
     };
 }
 
-pub fn onBlanking(bus: *Bus, comptime kind: DmaKind) void {
+pub fn pollDmaOnBlank(bus: *Bus, comptime kind: DmaKind) void {
     comptime var i: usize = 0;
     inline while (i < 4) : (i += 1) {
         bus.dma[i].poll(kind);

src/core/bus/io.zig

@@ -449,8 +449,6 @@ pub const BldY = extern union {
     raw: u16,
 };
 
-const u8WriteKind = enum { Hi, Lo };
-
 /// Write-only
 pub const WinH = extern union {
     x2: Bitfield(u16, 0, 8),
@@ -460,8 +458,6 @@ pub const WinH = extern union {
 
 /// Write-only
 pub const WinV = extern union {
-    const Self = @This();
-
     y2: Bitfield(u16, 0, 8),
     y1: Bitfield(u16, 8, 8),
     raw: u16,
@@ -470,20 +466,20 @@ pub const WinV = extern union {
 pub const WinIn = extern union {
     w0_bg: Bitfield(u16, 0, 4),
     w0_obj: Bit(u16, 4),
-    w0_bld: Bit(u16, 5),
+    w0_colour: Bit(u16, 5),
     w1_bg: Bitfield(u16, 8, 4),
     w1_obj: Bit(u16, 12),
-    w1_bld: Bit(u16, 13),
+    w1_colour: Bit(u16, 13),
     raw: u16,
 };
 
 pub const WinOut = extern union {
     out_bg: Bitfield(u16, 0, 4),
     out_obj: Bit(u16, 4),
-    out_bld: Bit(u16, 5),
+    out_colour: Bit(u16, 5),
     obj_bg: Bitfield(u16, 8, 4),
     obj_obj: Bit(u16, 12),
-    obj_bld: Bit(u16, 13),
+    obj_colour: Bit(u16, 13),
     raw: u16,
 };
 

src/core/cpu/arm/data_processing.zig

@@ -24,7 +24,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
             if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
 
             var result: u32 = undefined;
-            var overflow: u1 = undefined;
+            var overflow: bool = undefined;
 
             // Perform Data Processing Logic
             switch (kind) {
@@ -62,9 +62,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
                     if (rd == 0xF)
                         return undefinedTestBehaviour(cpu);
 
-                    const tmp = @addWithOverflow(op1, op2);
+                    overflow = @addWithOverflow(u32, op1, op2, &result);
-                    result = tmp[0];
-                    overflow = tmp[1];
                 },
                 0xC => result = op1 | op2, // ORR
                 0xD => result = op2, // MOV
@@ -112,7 +110,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
                     // ADD, ADC Flags
                     cpu.cpsr.n.write(result >> 31 & 1 == 1);
                     cpu.cpsr.z.write(result == 0);
-                    cpu.cpsr.c.write(overflow == 0b1);
+                    cpu.cpsr.c.write(overflow);
                     cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
                 },
                 0x6, 0x7 => if (S and rd != 0xF) {
@@ -143,7 +141,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
                         cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
                     } else if (kind == 0xB) {
                         // CMN specific
-                        cpu.cpsr.c.write(overflow == 0b1);
+                        cpu.cpsr.c.write(overflow);
                         cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
                     } else {
                         // TST, TEQ specific
@@ -164,19 +162,19 @@ pub fn sbc(left: u32, right: u32, old_carry: u1) u32 {
     return ret;
 }
 
-pub fn add(overflow: *u1, left: u32, right: u32) u32 {
+pub fn add(overflow: *bool, left: u32, right: u32) u32 {
-    const ret = @addWithOverflow(left, right);
+    var ret: u32 = undefined;
-    overflow.* = ret[1];
+    overflow.* = @addWithOverflow(u32, left, right, &ret);
-
+    return ret;
-    return ret[0];
 }
 
-pub fn adc(overflow: *u1, left: u32, right: u32, old_carry: u1) u32 {
+pub fn adc(overflow: *bool, left: u32, right: u32, old_carry: u1) u32 {
-    const tmp = @addWithOverflow(left, right);
+    var ret: u32 = undefined;
-    const ret = @addWithOverflow(tmp[0], old_carry);
+    const first = @addWithOverflow(u32, left, right, &ret);
-    overflow.* = tmp[1] | ret[1];
+    const second = @addWithOverflow(u32, ret, old_carry, &ret);
 
-    return ret[0];
+    overflow.* = first or second;
+    return ret;
 }
 
 fn undefinedTestBehaviour(cpu: *Arm7tdmi) void {

src/core/cpu/thumb/alu.zig

@@ -21,8 +21,7 @@ pub fn fmt4(comptime op: u4) InstrFn {
             const op2 = cpu.r[rs];
 
             var result: u32 = undefined;
-            var overflow: u1 = undefined;
+            var overflow: bool = undefined;
-
             switch (op) {
                 0x0 => result = op1 & op2, // AND
                 0x1 => result = op1 ^ op2, // EOR
@@ -35,12 +34,7 @@ pub fn fmt4(comptime op: u4) InstrFn {
                 0x8 => result = op1 & op2, // TST
                 0x9 => result = 0 -% op2, // NEG
                 0xA => result = op1 -% op2, // CMP
-                0xB => {
+                0xB => overflow = @addWithOverflow(u32, op1, op2, &result), // CMN
-                    // CMN
-                    const tmp = @addWithOverflow(op1, op2);
-                    result = tmp[0];
-                    overflow = tmp[1];
-                },
                 0xC => result = op1 | op2, // ORR
                 0xD => result = @truncate(u32, @as(u64, op2) * @as(u64, op1)),
                 0xE => result = op1 & ~op2,
@@ -77,7 +71,7 @@ pub fn fmt4(comptime op: u4) InstrFn {
                     // ADC, CMN
                     cpu.cpsr.n.write(result >> 31 & 1 == 1);
                     cpu.cpsr.z.write(result == 0);
-                    cpu.cpsr.c.write(overflow == 0b1);
+                    cpu.cpsr.c.write(overflow);
                     cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
                 },
                 0x6 => {

src/core/cpu/thumb/data_processing.zig

@@ -64,7 +64,7 @@ pub fn fmt5(comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
             const op2 = cpu.r[rs];
 
             var result: u32 = undefined;
-            var overflow: u1 = undefined;
+            var overflow: bool = undefined;
             switch (op) {
                 0b00 => result = add(&overflow, op1, op2), // ADD
                 0b01 => result = op1 -% op2, // CMP
@@ -126,13 +126,13 @@ pub fn fmt2(comptime I: bool, is_sub: bool, rn: u3) InstrFn {
                 cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
             } else {
                 // ADD
-                var overflow: u1 = undefined;
+                var overflow: bool = undefined;
                 const result = add(&overflow, op1, op2);
                 cpu.r[rd] = result;
 
                 cpu.cpsr.n.write(result >> 31 & 1 == 1);
                 cpu.cpsr.z.write(result == 0);
-                cpu.cpsr.c.write(overflow == 0b1);
+                cpu.cpsr.c.write(overflow);
                 cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
             }
         }
@@ -145,7 +145,7 @@ pub fn fmt3(comptime op: u2, comptime rd: u3) InstrFn {
             const op1 = cpu.r[rd];
             const op2: u32 = opcode & 0xFF; // Offset
 
-            var overflow: u1 = undefined;
+            var overflow: bool = undefined;
             const result: u32 = switch (op) {
                 0b00 => op2, // MOV
                 0b01 => op1 -% op2, // CMP
@@ -169,7 +169,7 @@ pub fn fmt3(comptime op: u2, comptime rd: u3) InstrFn {
                 },
                 0b10 => {
                     // ADD
-                    cpu.cpsr.c.write(overflow == 0b1);
+                    cpu.cpsr.c.write(overflow);
                     cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
                 },
             }

src/core/emu.zig

@@ -94,7 +94,7 @@ pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
         if (!cpu.stepDmaTransfer()) {
             if (cpu.isHalted()) {
                 // Fast-forward to next Event
-                sched.tick = sched.nextTimestamp();
+                sched.tick = sched.queue.peek().?.tick;
             } else {
                 cpu.step();
             }

src/core/ppu/Oam.zig

@@ -1,40 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x400;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = address & 0x3FF;
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
-        else => @compileError("OAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
-    const addr = address & 0x3FF;
-
-    switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
-        u8 => return, // 8-bit writes are explicitly ignored
-        else => @compileError("OAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    std.mem.set(u8, buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}

src/core/ppu/Palette.zig

@@ -1,47 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x400;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = address & 0x3FF;
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
-        else => @compileError("PALRAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
-    const addr = address & 0x3FF;
-
-    switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
-        u8 => {
-            const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
-            std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
-        },
-        else => @compileError("PALRAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    std.mem.set(u8, buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-pub inline fn backdrop(self: *const Self) u16 {
-    return std.mem.readIntNative(u16, self.buf[0..2]);
-}

src/core/ppu/Vram.zig

@@ -1,60 +0,0 @@
-const std = @import("std");
-const io = @import("../bus/io.zig");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x18000;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = Self.mirror(address);
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
-        else => @compileError("VRAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address: usize, value: T) void {
-    const mode: u3 = dispcnt.bg_mode.read();
-    const idx = Self.mirror(address);
-
-    switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
-        u8 => {
-            // Ignore write if it falls within the boundaries of OBJ VRAM
-            switch (mode) {
-                0, 1, 2 => if (0x0001_0000 <= idx) return,
-                else => if (0x0001_4000 <= idx) return,
-            }
-
-            const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
-            std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
-        },
-        else => @compileError("VRAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    std.mem.set(u8, buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-pub fn mirror(address: usize) usize {
-    // Mirrored in steps of 128K (64K + 32K + 32K) (abcc)
-    const addr = address & 0x1FFFF;
-
-    // If the address is within 96K we don't do anything,
-    // otherwise we want to mirror the last 32K (addresses between 64K and 96K)
-    return if (addr < buf_len) addr else 0x10000 + (addr & 0x7FFF);
-}

src/core/scheduler.zig

@@ -31,55 +31,61 @@ pub const Scheduler = struct {
     }
 
     pub fn handleEvent(self: *Self, cpu: *Arm7tdmi) void {
-        const event = self.queue.remove();
+        if (self.queue.removeOrNull()) |event| {
-        const late = self.tick - event.tick;
+            const late = self.tick - event.tick;
 
-        switch (event.kind) {
+            switch (event.kind) {
-            .HeatDeath => {
+                .HeatDeath => {
-                log.err("u64 overflow. This *actually* should never happen.", .{});
+                    log.err("u64 overflow. This *actually* should never happen.", .{});
-                unreachable;
+                    unreachable;
-            },
+                },
-            .Draw => {
+                .Draw => {
-                // The end of a VDraw
+                    // The end of a VDraw
-                cpu.bus.ppu.drawScanline();
+                    cpu.bus.ppu.drawScanline();
-                cpu.bus.ppu.onHdrawEnd(cpu, late);
+                    cpu.bus.ppu.onHdrawEnd(cpu, late);
-            },
+                },
-            .TimerOverflow => |id| {
+                .TimerOverflow => |id| {
-                switch (id) {
+                    switch (id) {
-                    inline 0...3 => |idx| cpu.bus.tim[idx].onTimerExpire(cpu, late),
+                        inline 0...3 => |idx| cpu.bus.tim[idx].onTimerExpire(cpu, late),
-                }
+                    }
-            },
+                },
-            .ApuChannel => |id| {
+                .ApuChannel => |id| {
-                switch (id) {
+                    switch (id) {
-                    0 => cpu.bus.apu.ch1.onToneSweepEvent(late),
+                        0 => cpu.bus.apu.ch1.onToneSweepEvent(late),
-                    1 => cpu.bus.apu.ch2.onToneEvent(late),
+                        1 => cpu.bus.apu.ch2.onToneEvent(late),
-                    2 => cpu.bus.apu.ch3.onWaveEvent(late),
+                        2 => cpu.bus.apu.ch3.onWaveEvent(late),
-                    3 => cpu.bus.apu.ch4.onNoiseEvent(late),
+                        3 => cpu.bus.apu.ch4.onNoiseEvent(late),
-                }
+                    }
-            },
+                },
-            .RealTimeClock => {
+                .RealTimeClock => {
-                const device = &cpu.bus.pak.gpio.device;
+                    const device = &cpu.bus.pak.gpio.device;
-                if (device.kind != .Rtc or device.ptr == null) return;
+                    if (device.kind != .Rtc or device.ptr == null) return;
 
-                const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), device.ptr.?));
+                    const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), device.ptr.?));
-                clock.onClockUpdate(late);
+                    clock.onClockUpdate(late);
-            },
+                },
-            .FrameSequencer => cpu.bus.apu.onSequencerTick(late),
+                .FrameSequencer => cpu.bus.apu.onSequencerTick(late),
-            .SampleAudio => cpu.bus.apu.sampleAudio(late),
+                .SampleAudio => cpu.bus.apu.sampleAudio(late),
-            .HBlank => cpu.bus.ppu.onHblankEnd(cpu, late), // The end of a HBlank
+                .HBlank => cpu.bus.ppu.onHblankEnd(cpu, late), // The end of a HBlank
-            .VBlank => cpu.bus.ppu.onHdrawEnd(cpu, late), // The end of a VBlank
+                .VBlank => cpu.bus.ppu.onHdrawEnd(cpu, late), // The end of a VBlank
+            }
         }
     }
 
     /// Removes the **first** scheduled event of type `needle`
     pub fn removeScheduledEvent(self: *Self, needle: EventKind) void {
-        for (self.queue.items) |event, i| {
+        var it = self.queue.iterator();
+
+        var i: usize = 0;
+        while (it.next()) |event| : (i += 1) {
             if (std.meta.eql(event.kind, needle)) {
 
-                // invalidates the slice we're iterating over
+                // This invalidates the iterator
                 _ = self.queue.removeIndex(i);
 
-                log.debug("Removed {?}@{}", .{ event.kind, event.tick });
+                // Since removing something from the PQ invalidates the iterator,
+                // this implementation can safely only remove the first instance of
+                // a Scheduled Event. Exit Early
                 break;
             }
         }

src/platform.zig

@@ -64,7 +64,7 @@ pub const Gui = struct {
         const ctx = SDL.SDL_GL_CreateContext(window) orelse panic();
         if (SDL.SDL_GL_MakeCurrent(window, ctx) < 0) panic();
 
-        gl.load(ctx, Self.glGetProcAddress) catch {};
+        try gl.load(ctx, Self.glGetProcAddress);
         if (SDL.SDL_GL_SetSwapInterval(@boolToInt(config.config().host.vsync)) < 0) panic();
 
         const program_id = try compileShaders();

src/util.zig

@@ -5,8 +5,6 @@ const config = @import("config.zig");
 const Log2Int = std.math.Log2Int;
 const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
 
-const Allocator = std.mem.Allocator;
-
 // Sign-Extend value of type `T` to type `U`
 pub fn sext(comptime T: type, comptime U: type, value: T) T {
     // U must have less bits than T
@@ -125,7 +123,6 @@ pub const io = struct {
 
 pub const Logger = struct {
     const Self = @This();
-    const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });
 
     buf: std.io.BufferedWriter(4096 << 2, std.fs.File.Writer),
 
@@ -184,6 +181,8 @@ pub const Logger = struct {
     }
 };
 
+const FmtArgTuple = struct { u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 };
+
 pub const audio = struct {
     const _io = @import("core/bus/io.zig");
 
@@ -276,44 +275,3 @@ fn HalfInt(comptime T: type) type {
 
     return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1);
 }
-
-/// Double Buffering Implementation
-pub const FrameBuffer = struct {
-    const Self = @This();
-
-    layers: [2][]u8,
-    buf: []u8,
-    current: u1,
-
-    allocator: Allocator,
-
-    // TODO: Rename
-    const Device = enum { Emulator, Renderer };
-
-    pub fn init(allocator: Allocator, comptime len: comptime_int) !Self {
-        const buf = try allocator.alloc(u8, len * 2);
-        std.mem.set(u8, buf, 0);
-
-        return .{
-            // Front and Back Framebuffers
-            .layers = [_][]u8{ buf[0..][0..len], buf[len..][0..len] },
-            .buf = buf,
-            .current = 0,
-
-            .allocator = allocator,
-        };
-    }
-
-    pub fn deinit(self: *Self) void {
-        self.allocator.free(self.buf);
-        self.* = undefined;
-    }
-
-    pub fn swap(self: *Self) void {
-        self.current = ~self.current;
-    }
-
-    pub fn get(self: *Self, comptime dev: Device) []u8 {
-        return self.layers[if (dev == .Emulator) self.current else ~self.current];
-    }
-};