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No commits in common. "3596caf106c903d95513ffa0fa062429b5816454" and "3be084cb820d1df8dd76523565481584b5251acd" have entirely different histories.

2 changed files with 1 additions and 2 deletions

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@ -43,7 +43,7 @@ pub fn read32(self: *const Self, addr: u32) u32 {
0x0000_0000...0x0000_3FFF => self.bios.get32(@as(usize, addr)), 0x0000_0000...0x0000_3FFF => self.bios.get32(@as(usize, addr)),
0x0200_0000...0x0203_FFFF => self.iwram.get32(addr - 0x0200_0000), 0x0200_0000...0x0203_FFFF => self.iwram.get32(addr - 0x0200_0000),
0x0300_0000...0x0300_7FFF => self.ewram.get32(addr - 0x0300_0000), 0x0300_0000...0x0300_7FFF => self.ewram.get32(addr - 0x0300_0000),
0x0400_0000...0x0400_03FE => self.io.read32(addr), 0x0400_0000...0x0400_03FE => self.read32(addr),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x0500_03FF => self.ppu.palette.get32(@as(usize, addr - 0x0500_0000)), 0x0500_0000...0x0500_03FF => self.ppu.palette.get32(@as(usize, addr - 0x0500_0000)),

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@ -76,7 +76,6 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
0xC => { 0xC => {
// ORR // ORR
const result = cpu.r[op1] | op2; const result = cpu.r[op1] | op2;
cpu.r[rd] = result;
if (S and rd != 0xF) { if (S and rd != 0xF) {
cpu.cpsr.n.write(result >> 31 & 1 == 1); cpu.cpsr.n.write(result >> 31 & 1 == 1);