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17 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka acdb270793 chore: reimplement alpha blending 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 4ceed382ed chore(ppu): use @ptrCast in drawTextMode 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 52ce4f3d20 chore(ppu): reimplement modes 3, 4, and 5 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka c1c8cac6e4 style(ppu): move text mode drawing to unique fn 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka be7a34f719 fix(window): proper inRange impl for window
window wrap now works (it's pretty slow though?)
2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka f7a94634f9 chore: improve readability of sprite drawing code a bit 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 7d4ab6db2c style: remove unused imports 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 0a78587d8e chore: dont allocate not-small ?Sprite array on stack
use memset like most other allocations in this emu
2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka b753ceef8e chore: move FrameBuffer struct to util.zig 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 8963fe205b chore: move OAM, PALRAM and VRAM structs to separate files 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka e906506e16 fix: 8-bit writes to WIN PPU registers
Advance Wars depends on these registers similar to Mario Kart's 8-bit
writes to Affine Background registers:
2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 3195a45e3d chore: refactor window 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 6aad911985 chore: crude background window impl (no affine) 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka e3b45ef794 chore: rename function (misspelt until now somehow) 2022-12-16 22:16:37 -04:00
Rekai Nyangadzayi Musuka 8e1a539e70 chore: debug read takes advantage of fastmem
deduplicate slowmem backup read handler
2022-12-15 23:18:54 -04:00
Rekai Nyangadzayi Musuka 63fa972afa chore: update dependencies
in response to zig master deprecations
2022-12-14 22:57:51 -04:00
Rekai Nyangadzayi Musuka bf95eee3f1 fix(apu): resolve bug in NR10 obscure behaviour 2022-12-05 11:08:04 -04:00
12 changed files with 640 additions and 466 deletions

@ -1 +1 @@
Subproject commit 00b43568854f14e3bab340a4e062776ecb44a727 Subproject commit 2fbd4b228516bf08348a3173f1446c7e8d75540a

@ -1 +1 @@
Subproject commit a1b01ffeab452790790034b8a0e97aa30bbeb800 Subproject commit 8a38c14266d1d00e0c3aee16b2e2b69675209147

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@ -107,7 +107,7 @@ pub fn deinit(self: *Self) void {
} }
fn fillReadTable(bus: *Self, table: *[table_len]?*const anyopaque) void { fn fillReadTable(bus: *Self, table: *[table_len]?*const anyopaque) void {
const vramMirror = @import("ppu.zig").Vram.mirror; const vramMirror = @import("ppu/Vram.zig").mirror;
for (table) |*ptr, i| { for (table) |*ptr, i| {
const addr = page_size * i; const addr = page_size * i;
@ -134,7 +134,7 @@ fn fillReadTable(bus: *Self, table: *[table_len]?*const anyopaque) void {
fn fillWriteTable(comptime T: type, bus: *Self, table: *[table_len]?*const anyopaque) void { fn fillWriteTable(comptime T: type, bus: *Self, table: *[table_len]?*const anyopaque) void {
comptime std.debug.assert(T == u32 or T == u16 or T == u8); comptime std.debug.assert(T == u32 or T == u16 or T == u8);
const vramMirror = @import("ppu.zig").Vram.mirror; const vramMirror = @import("ppu/Vram.zig").mirror;
for (table) |*ptr, i| { for (table) |*ptr, i| {
const addr = page_size * i; const addr = page_size * i;
@ -197,8 +197,29 @@ fn fillTableExternalMemory(bus: *Self, addr: usize) ?*anyopaque {
return &bus.pak.buf[masked_addr]; return &bus.pak.buf[masked_addr];
} }
// TODO: Take advantage of fastmem here too?
pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T { pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
const page = unaligned_address >> bits;
const offset = unaligned_address & (page_size - 1);
// We're doing some serious out-of-bounds open-bus reads
if (page >= table_len) return self.openBus(T, unaligned_address);
if (self.read_table[page]) |some_ptr| {
// We have a pointer to a page, cast the pointer to it's underlying type
const Ptr = [*]const T;
const alignment = @alignOf(std.meta.Child(Ptr));
const ptr = @ptrCast(Ptr, @alignCast(alignment, some_ptr));
// Note: We don't check array length, since we force align the
// lower bits of the address as the GBA would
return ptr[forceAlign(T, offset) / @sizeOf(T)];
}
return self.dbgSlowRead(T, unaligned_address);
}
fn dbgSlowRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
const page = @truncate(u8, unaligned_address >> 24); const page = @truncate(u8, unaligned_address >> 24);
const address = forceAlign(T, unaligned_address); const address = forceAlign(T, unaligned_address);
@ -210,29 +231,18 @@ pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
break :blk self.openBus(T, address); break :blk self.openBus(T, address);
}, },
0x02 => self.ewram.read(T, address), 0x02 => unreachable, // handled by fastmem
0x03 => self.iwram.read(T, address), 0x03 => unreachable, // handled by fastmem
0x04 => self.readIo(T, address), 0x04 => self.readIo(T, address),
// Internal Display Memory // Internal Display Memory
0x05 => self.ppu.palette.read(T, address), 0x05 => unreachable, // handled by fastmem
0x06 => self.ppu.vram.read(T, address), 0x06 => unreachable, // handled by fastmem
0x07 => self.ppu.oam.read(T, address), 0x07 => unreachable, // handled by fastmem
// External Memory (Game Pak) // External Memory (Game Pak)
0x08...0x0D => self.pak.dbgRead(T, address), 0x08...0x0D => self.pak.dbgRead(T, address),
0x0E...0x0F => blk: { 0x0E...0x0F => self.readBackup(T, unaligned_address),
const value = self.pak.backup.read(unaligned_address);
const multiplier = switch (T) {
u32 => 0x01010101,
u16 => 0x0101,
u8 => 1,
else => @compileError("Backup: Unsupported read width"),
};
break :blk @as(T, value) * multiplier;
},
else => self.openBus(T, address), else => self.openBus(T, address),
}; };
} }
@ -352,7 +362,12 @@ fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
// External Memory (Game Pak) // External Memory (Game Pak)
0x08...0x0D => self.pak.read(T, address), 0x08...0x0D => self.pak.read(T, address),
0x0E...0x0F => blk: { 0x0E...0x0F => self.readBackup(T, unaligned_address),
else => self.openBus(T, address),
};
}
fn readBackup(self: *const Self, comptime T: type, unaligned_address: u32) T {
const value = self.pak.backup.read(unaligned_address); const value = self.pak.backup.read(unaligned_address);
const multiplier = switch (T) { const multiplier = switch (T) {
@ -362,10 +377,7 @@ fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
else => @compileError("Backup: Unsupported read width"), else => @compileError("Backup: Unsupported read width"),
}; };
break :blk @as(T, value) * multiplier; return @as(T, value) * multiplier;
},
else => self.openBus(T, address),
};
} }
pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) void { pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {

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@ -94,10 +94,9 @@ pub fn sound1CntL(self: *const Self) u8 {
pub fn setSound1CntL(self: *Self, value: u8) void { pub fn setSound1CntL(self: *Self, value: u8) void {
const new = io.Sweep{ .raw = value }; const new = io.Sweep{ .raw = value };
if (self.sweep.direction.read() and !new.direction.read()) { if (!new.direction.read()) {
// Sweep Negate bit has been cleared // If at least one (1) sweep calculation has been made with
// If At least 1 Sweep Calculation has been made since // the negate bit set (since last trigger), disable the channel
// the last trigger, the channel is immediately disabled
if (self.sweep_dev.calc_performed) self.enabled = false; if (self.sweep_dev.calc_performed) self.enabled = false;
} }

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@ -31,7 +31,6 @@ pub fn tick(self: *Self, ch1: *ToneSweep) void {
if (self.timer == 0) { if (self.timer == 0) {
const period = ch1.sweep.period.read(); const period = ch1.sweep.period.read();
self.timer = if (period == 0) 8 else period; self.timer = if (period == 0) 8 else period;
if (!self.calc_performed) self.calc_performed = true;
if (self.enabled and period != 0) { if (self.enabled and period != 0) {
const new_freq = self.calculate(ch1.sweep, &ch1.enabled); const new_freq = self.calculate(ch1.sweep, &ch1.enabled);
@ -52,7 +51,10 @@ pub fn calculate(self: *Self, sweep: io.Sweep, ch_enable: *bool) u12 {
const shadow_shifted = shadow >> sweep.shift.read(); const shadow_shifted = shadow >> sweep.shift.read();
const decrease = sweep.direction.read(); const decrease = sweep.direction.read();
const freq = if (decrease) shadow - shadow_shifted else shadow + shadow_shifted; const freq = if (decrease) blk: {
self.calc_performed = true;
break :blk shadow - shadow_shifted;
} else shadow + shadow_shifted;
if (freq > 0x7FF) ch_enable.* = false; if (freq > 0x7FF) ch_enable.* = false;
return freq; return freq;

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@ -338,7 +338,7 @@ fn DmaController(comptime id: u2) type {
}; };
} }
pub fn pollDmaOnBlank(bus: *Bus, comptime kind: DmaKind) void { pub fn onBlanking(bus: *Bus, comptime kind: DmaKind) void {
comptime var i: usize = 0; comptime var i: usize = 0;
inline while (i < 4) : (i += 1) { inline while (i < 4) : (i += 1) {
bus.dma[i].poll(kind); bus.dma[i].poll(kind);

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@ -449,6 +449,8 @@ pub const BldY = extern union {
raw: u16, raw: u16,
}; };
const u8WriteKind = enum { Hi, Lo };
/// Write-only /// Write-only
pub const WinH = extern union { pub const WinH = extern union {
x2: Bitfield(u16, 0, 8), x2: Bitfield(u16, 0, 8),
@ -458,6 +460,8 @@ pub const WinH = extern union {
/// Write-only /// Write-only
pub const WinV = extern union { pub const WinV = extern union {
const Self = @This();
y2: Bitfield(u16, 0, 8), y2: Bitfield(u16, 0, 8),
y1: Bitfield(u16, 8, 8), y1: Bitfield(u16, 8, 8),
raw: u16, raw: u16,
@ -466,20 +470,20 @@ pub const WinV = extern union {
pub const WinIn = extern union { pub const WinIn = extern union {
w0_bg: Bitfield(u16, 0, 4), w0_bg: Bitfield(u16, 0, 4),
w0_obj: Bit(u16, 4), w0_obj: Bit(u16, 4),
w0_colour: Bit(u16, 5), w0_bld: Bit(u16, 5),
w1_bg: Bitfield(u16, 8, 4), w1_bg: Bitfield(u16, 8, 4),
w1_obj: Bit(u16, 12), w1_obj: Bit(u16, 12),
w1_colour: Bit(u16, 13), w1_bld: Bit(u16, 13),
raw: u16, raw: u16,
}; };
pub const WinOut = extern union { pub const WinOut = extern union {
out_bg: Bitfield(u16, 0, 4), out_bg: Bitfield(u16, 0, 4),
out_obj: Bit(u16, 4), out_obj: Bit(u16, 4),
out_colour: Bit(u16, 5), out_bld: Bit(u16, 5),
obj_bg: Bitfield(u16, 8, 4), obj_bg: Bitfield(u16, 8, 4),
obj_obj: Bit(u16, 12), obj_obj: Bit(u16, 12),
obj_colour: Bit(u16, 13), obj_bld: Bit(u16, 13),
raw: u16, raw: u16,
}; };

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40
src/core/ppu/Oam.zig Normal file
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@ -0,0 +1,40 @@
const std = @import("std");
const Allocator = std.mem.Allocator;
const buf_len = 0x400;
const Self = @This();
buf: []u8,
allocator: Allocator,
pub fn read(self: *const Self, comptime T: type, address: usize) T {
const addr = address & 0x3FF;
return switch (T) {
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
else => @compileError("OAM: Unsupported read width"),
};
}
pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
const addr = address & 0x3FF;
switch (T) {
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
u8 => return, // 8-bit writes are explicitly ignored
else => @compileError("OAM: Unsupported write width"),
}
}
pub fn init(allocator: Allocator) !Self {
const buf = try allocator.alloc(u8, buf_len);
std.mem.set(u8, buf, 0);
return Self{ .buf = buf, .allocator = allocator };
}
pub fn deinit(self: *Self) void {
self.allocator.free(self.buf);
self.* = undefined;
}

47
src/core/ppu/Palette.zig Normal file
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@ -0,0 +1,47 @@
const std = @import("std");
const Allocator = std.mem.Allocator;
const buf_len = 0x400;
const Self = @This();
buf: []u8,
allocator: Allocator,
pub fn read(self: *const Self, comptime T: type, address: usize) T {
const addr = address & 0x3FF;
return switch (T) {
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
else => @compileError("PALRAM: Unsupported read width"),
};
}
pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
const addr = address & 0x3FF;
switch (T) {
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
u8 => {
const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
},
else => @compileError("PALRAM: Unsupported write width"),
}
}
pub fn init(allocator: Allocator) !Self {
const buf = try allocator.alloc(u8, buf_len);
std.mem.set(u8, buf, 0);
return Self{ .buf = buf, .allocator = allocator };
}
pub fn deinit(self: *Self) void {
self.allocator.free(self.buf);
self.* = undefined;
}
pub inline fn backdrop(self: *const Self) u16 {
return std.mem.readIntNative(u16, self.buf[0..2]);
}

60
src/core/ppu/Vram.zig Normal file
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@ -0,0 +1,60 @@
const std = @import("std");
const io = @import("../bus/io.zig");
const Allocator = std.mem.Allocator;
const buf_len = 0x18000;
const Self = @This();
buf: []u8,
allocator: Allocator,
pub fn read(self: *const Self, comptime T: type, address: usize) T {
const addr = Self.mirror(address);
return switch (T) {
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
else => @compileError("VRAM: Unsupported read width"),
};
}
pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address: usize, value: T) void {
const mode: u3 = dispcnt.bg_mode.read();
const idx = Self.mirror(address);
switch (T) {
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
u8 => {
// Ignore write if it falls within the boundaries of OBJ VRAM
switch (mode) {
0, 1, 2 => if (0x0001_0000 <= idx) return,
else => if (0x0001_4000 <= idx) return,
}
const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
},
else => @compileError("VRAM: Unsupported write width"),
}
}
pub fn init(allocator: Allocator) !Self {
const buf = try allocator.alloc(u8, buf_len);
std.mem.set(u8, buf, 0);
return Self{ .buf = buf, .allocator = allocator };
}
pub fn deinit(self: *Self) void {
self.allocator.free(self.buf);
self.* = undefined;
}
pub fn mirror(address: usize) usize {
// Mirrored in steps of 128K (64K + 32K + 32K) (abcc)
const addr = address & 0x1FFFF;
// If the address is within 96K we don't do anything,
// otherwise we want to mirror the last 32K (addresses between 64K and 96K)
return if (addr < buf_len) addr else 0x10000 + (addr & 0x7FFF);
}

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@ -5,6 +5,8 @@ const config = @import("config.zig");
const Log2Int = std.math.Log2Int; const Log2Int = std.math.Log2Int;
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi; const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
const Allocator = std.mem.Allocator;
// Sign-Extend value of type `T` to type `U` // Sign-Extend value of type `T` to type `U`
pub fn sext(comptime T: type, comptime U: type, value: T) T { pub fn sext(comptime T: type, comptime U: type, value: T) T {
// U must have less bits than T // U must have less bits than T
@ -123,6 +125,7 @@ pub const io = struct {
pub const Logger = struct { pub const Logger = struct {
const Self = @This(); const Self = @This();
const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });
buf: std.io.BufferedWriter(4096 << 2, std.fs.File.Writer), buf: std.io.BufferedWriter(4096 << 2, std.fs.File.Writer),
@ -181,8 +184,6 @@ pub const Logger = struct {
} }
}; };
const FmtArgTuple = struct { u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 };
pub const audio = struct { pub const audio = struct {
const _io = @import("core/bus/io.zig"); const _io = @import("core/bus/io.zig");
@ -275,3 +276,44 @@ fn HalfInt(comptime T: type) type {
return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1); return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1);
} }
/// Double Buffering Implementation
pub const FrameBuffer = struct {
const Self = @This();
layers: [2][]u8,
buf: []u8,
current: u1,
allocator: Allocator,
// TODO: Rename
const Device = enum { Emulator, Renderer };
pub fn init(allocator: Allocator, comptime len: comptime_int) !Self {
const buf = try allocator.alloc(u8, len * 2);
std.mem.set(u8, buf, 0);
return .{
// Front and Back Framebuffers
.layers = [_][]u8{ buf[0..][0..len], buf[len..][0..len] },
.buf = buf,
.current = 0,
.allocator = allocator,
};
}
pub fn deinit(self: *Self) void {
self.allocator.free(self.buf);
self.* = undefined;
}
pub fn swap(self: *Self) void {
self.current = ~self.current;
}
pub fn get(self: *Self, comptime dev: Device) []u8 {
return self.layers[if (dev == .Emulator) self.current else ~self.current];
}
};