The PC would fall behind whenever an IRQ was called because the pipeline
was reloaded (+8 to PC), however that was never actually done by any code
Now, the PC is always incremented when the pipeline is reloaded
I believe this to be necessary in order to get hardware interrupts
working.
thumb.gba test 108 fails but I'm committing anyways (despite the
regression) because this is kind of rebase/merge hell and I have
something that at least sort of works rn
This worked fine on stage1, and works fine in debug in stage3.
However, stage3 ReleaseSafe would panic due to what I assume must
have been an undefined behaviour optimization.
While I'm happy that I was quickly made aware of the issue thanks to
the safety checks in ReleaseSafe I do wish that this issue showed itself
in Debug, since I *am* using the GPA
