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b4e0682801
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fix(cpu): allow for select values to overflow
FuzzARM found these operations which panicked, when they should
have overflowed. These are now fixed
n = 8000
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2022-10-21 05:12:12 -03:00 |
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af10c1b076
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feat(cpu): implement format 13
While bugs do exist, at this point all THUMB and ARMv4 instructions
have been implemented! Yay!
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2022-10-21 05:12:12 -03:00 |
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e6a0eab667
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feat(cpu): implement THUMB format 17
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2022-10-21 05:12:12 -03:00 |
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523b9d2736
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feat(cpu): implement THUMB format11
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2022-10-21 05:12:12 -03:00 |
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c37546d273
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chore: progress towards passing ldr/str thumb in armwrestler
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2022-10-21 05:12:11 -03:00 |
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fbedebb938
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fix(cpu): properly negate in NEG
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2022-10-21 05:12:11 -03:00 |
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1773a3acc8
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fix(cpu): reimplement THUMB offset shifts
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2022-10-21 05:12:11 -03:00 |
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058c02150c
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fix(cpu): op == 0b00 decodes to add in format 5
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2022-10-21 05:12:11 -03:00 |
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8d841ead50
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fix(cpu): account for overflow in THUMB alu MUL
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2022-10-21 05:12:10 -03:00 |
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7dbd2fc556
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fix(cpu): account for rn in rlist in block data transfer
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2022-10-21 05:12:10 -03:00 |
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85e0924669
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feat: implement LDM/STM behaviour when S is set
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2022-10-21 05:12:10 -03:00 |
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97919f646d
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feat(cpu): Pass all LDR/STR ARMwrestler tests
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2022-10-21 05:12:10 -03:00 |
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151de2eab4
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feat(cpu): implement ARM SWP and SWPB
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2022-10-21 05:12:10 -03:00 |
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da681c946e
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feat(cpu): Implement Multiply Long ARM instructions
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2022-10-21 05:12:09 -03:00 |
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7013389288
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feat(cpu): implement format 18 THUMB instructions
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2022-10-21 05:12:09 -03:00 |
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443520ecae
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chore: more detailed panic message
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2022-10-21 05:12:09 -03:00 |
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96d7285111
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feat(cpu): implement format 10 THUMB instructions
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2022-10-21 05:12:08 -03:00 |
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7e6fc44191
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feat(cpu): implement SWP
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2022-10-21 05:12:08 -03:00 |
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9cb4ebaa7f
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fix(cpu): perform MUL with u64s, throw away upper 32 bits
|
2022-10-21 05:12:08 -03:00 |
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e1fec48a0e
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fix(cpu): properly decode multiply instructions
|
2022-10-21 05:12:07 -03:00 |
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0778ee8dd7
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feat(cpu): implement ARM multiply instructions
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2022-10-21 05:12:07 -03:00 |
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980e4ff5dd
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fix(cpu): properly decode THUMB PUSH and POP at comptime
|
2022-10-21 05:12:06 -03:00 |
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1ac193c506
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fix(cpu): don't ignore 11th bit of THUMB BL offset
|
2022-10-21 05:12:06 -03:00 |
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d6ed071bc6
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feat(cpu): implement thumb push / pop and stub format 13 thumb instrs
|
2022-10-21 05:12:06 -03:00 |
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a3d53d40fb
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feat(cpu): implement THUMB format 9 loads / stores
|
2022-10-21 05:12:06 -03:00 |
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a17dfbe41f
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fix(cpu): resolve issues with unexpected PC value in THUMB
|
2022-10-21 05:12:06 -03:00 |
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b9a81baa47
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feat(cpu): implement THUMB ldmia stmia
|
2022-10-21 05:12:06 -03:00 |
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97b236225e
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chore: implement THUMB format 4 instructions
|
2022-10-21 05:12:05 -03:00 |
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8113146b86
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chore: dedup code in THUMB instructions
|
2022-10-21 05:12:05 -03:00 |
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e6625113db
|
chore: refactor and genericize ARM data processing calculations
|
2022-10-21 05:12:05 -03:00 |
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2643504eb5
|
chore: relocate barrel_shifter zig file
|
2022-10-21 05:12:05 -03:00 |
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f7518d1bab
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feat(cpu): implement format2 THUMB instructions
|
2022-10-21 05:12:05 -03:00 |
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800ca798cd
|
feat(cpu): implement format19 THUMB instructions
|
2022-10-21 05:12:05 -03:00 |
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7bc186a03c
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feat(cpu): implement format16 THUMB instructions
|
2022-10-21 05:12:04 -03:00 |
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b94b87d186
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feat(cpu): implement format 1 THUMB instructions
|
2022-10-21 05:12:04 -03:00 |
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93922b65e3
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feat(cpu): implement format 6 THUMB instructions
|
2022-10-21 05:12:04 -03:00 |
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c4e131b92d
|
chore: binary logging + file logging + DP chanes + fastBoot changes
|
2022-10-21 05:12:02 -03:00 |
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4bdb85834c
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feat(cpu): implement SWI
|
2022-10-21 05:12:02 -03:00 |
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8bb7ea6be6
|
fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction
|
2022-10-21 05:12:01 -03:00 |
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60a1f7fa99
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chore(cpu): implement behaviour for undefined test instruction
|
2022-10-21 05:12:01 -03:00 |
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b3b8182f85
|
fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set
|
2022-10-21 05:12:01 -03:00 |
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56e660714c
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fix(cpu): implement S set + rd == 15 case for data processing
|
2022-10-21 05:12:01 -03:00 |
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eb632056a2
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feat(cpu): implement banked registers
|
2022-10-21 05:12:01 -03:00 |
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fbc9de0335
|
fix(cpu): improve MRS and MSR instructions
|
2022-10-21 05:12:01 -03:00 |
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5c7539cd26
|
feat(cpu): implement CMN
|
2022-10-21 05:12:00 -03:00 |
|
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7c20e5fdb5
|
fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter
|
2022-10-21 05:12:00 -03:00 |
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f79e7126ee
|
feat(cpu): Implement RSC
|
2022-10-21 05:12:00 -03:00 |
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15e92bc6af
|
feat(cpu): implement RSB
|
2022-10-21 05:12:00 -03:00 |
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47fc96fe00
|
feat(cpu): implement BIC
|
2022-10-21 05:12:00 -03:00 |
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4ac5ad42c6
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feat(cpu): implement EOR
|
2022-10-21 05:12:00 -03:00 |
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