 Rekai Nyangadzayi Musuka
|
c3ae727ed1
|
fix: improve perf of instructions w/ rotr
|
2022-10-21 05:12:28 -03:00 |
|
Rekai Nyangadzayi Musuka
|
97919f646d
|
feat(cpu): Pass all LDR/STR ARMwrestler tests
|
2022-10-21 05:12:10 -03:00 |
|
Rekai Nyangadzayi Musuka
|
2643504eb5
|
chore: relocate barrel_shifter zig file
|
2022-10-21 05:12:05 -03:00 |
|
Rekai Nyangadzayi Musuka
|
83a5370196
|
chore(cpu): refactor ARM functions to make room for THUMB
|
2022-10-21 05:11:56 -03:00 |
|
Rekai Nyangadzayi Musuka
|
ff70aadfdb
|
fix(cpu): make Data Processing instructions r15-aware
|
2022-10-21 05:11:55 -03:00 |
|
Rekai Nyangadzayi Musuka
|
b9255bffe7
|
feat(cpu): implement MSR and MRS
|
2022-10-21 05:11:55 -03:00 |
|
Rekai Nyangadzayi Musuka
|
357211a4cc
|
chore: remove premature inlines
|
2022-10-21 05:11:52 -03:00 |
|
Rekai Nyangadzayi Musuka
|
036b861b05
|
chore: code cleanup
|
2022-10-21 05:11:50 -03:00 |
|
Rekai Nyangadzayi Musuka
|
d495f5b4c5
|
feat: implement S (when rd != 15) for several data processing instructions
|
2022-10-21 05:11:49 -03:00 |
|
Rekai Nyangadzayi Musuka
|
788bef188d
|
feat: implement dedicated Barrel Shifter SHL and SHR
|
2022-10-21 05:11:49 -03:00 |