 Rekai Nyangadzayi Musuka
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96d7285111
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feat(cpu): implement format 10 THUMB instructions
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2022-10-21 05:12:08 -03:00 |
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Rekai Nyangadzayi Musuka
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e1fec48a0e
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fix(cpu): properly decode multiply instructions
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2022-10-21 05:12:07 -03:00 |
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Rekai Nyangadzayi Musuka
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0778ee8dd7
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feat(cpu): implement ARM multiply instructions
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2022-10-21 05:12:07 -03:00 |
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Rekai Nyangadzayi Musuka
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eabf787305
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fix(cpu): properly decode ldm stm thumb instructions
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2022-10-21 05:12:07 -03:00 |
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Rekai Nyangadzayi Musuka
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980e4ff5dd
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fix(cpu): properly decode THUMB PUSH and POP at comptime
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2022-10-21 05:12:06 -03:00 |
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Rekai Nyangadzayi Musuka
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d6ed071bc6
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feat(cpu): implement thumb push / pop and stub format 13 thumb instrs
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2022-10-21 05:12:06 -03:00 |
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Rekai Nyangadzayi Musuka
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a3d53d40fb
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feat(cpu): implement THUMB format 9 loads / stores
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2022-10-21 05:12:06 -03:00 |
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Rekai Nyangadzayi Musuka
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b9a81baa47
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feat(cpu): implement THUMB ldmia stmia
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2022-10-21 05:12:06 -03:00 |
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Rekai Nyangadzayi Musuka
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97b236225e
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chore: implement THUMB format 4 instructions
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2022-10-21 05:12:05 -03:00 |
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Rekai Nyangadzayi Musuka
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2643504eb5
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chore: relocate barrel_shifter zig file
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2022-10-21 05:12:05 -03:00 |
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Rekai Nyangadzayi Musuka
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f7518d1bab
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feat(cpu): implement format2 THUMB instructions
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2022-10-21 05:12:05 -03:00 |
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Rekai Nyangadzayi Musuka
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800ca798cd
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feat(cpu): implement format19 THUMB instructions
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2022-10-21 05:12:05 -03:00 |
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Rekai Nyangadzayi Musuka
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d714ffb4f9
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chore: account for THUMB BL instruction when mimicking mGBA logs
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2022-10-21 05:12:04 -03:00 |
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Rekai Nyangadzayi Musuka
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7bc186a03c
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feat(cpu): implement format16 THUMB instructions
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2022-10-21 05:12:04 -03:00 |
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Rekai Nyangadzayi Musuka
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b94b87d186
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feat(cpu): implement format 1 THUMB instructions
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2022-10-21 05:12:04 -03:00 |
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Rekai Nyangadzayi Musuka
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93922b65e3
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feat(cpu): implement format 6 THUMB instructions
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2022-10-21 05:12:04 -03:00 |
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Rekai Nyangadzayi Musuka
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464479b986
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chore: mark indexing methods as inline
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2022-10-21 05:12:03 -03:00 |
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Rekai Nyangadzayi Musuka
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de1c84914c
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feat: create emulator thread
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2022-10-21 05:12:03 -03:00 |
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Rekai Nyangadzayi Musuka
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8e7766e694
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chore: disable logging by default
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2022-10-21 05:12:03 -03:00 |
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Rekai Nyangadzayi Musuka
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4858dbc5dc
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chore: revert fastboot changes
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2022-10-21 05:12:03 -03:00 |
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Rekai Nyangadzayi Musuka
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c4e131b92d
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chore: binary logging + file logging + DP chanes + fastBoot changes
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2022-10-21 05:12:02 -03:00 |
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Rekai Nyangadzayi Musuka
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2e54be76d6
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chore: rename skipBios to fastBoot
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2022-10-21 05:12:02 -03:00 |
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Rekai Nyangadzayi Musuka
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7914268702
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chore: set correct values for select banked registers on fast boot
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2022-10-21 05:12:02 -03:00 |
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Rekai Nyangadzayi Musuka
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4bdb85834c
|
feat(cpu): implement SWI
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2022-10-21 05:12:02 -03:00 |
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Rekai Nyangadzayi Musuka
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eb632056a2
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feat(cpu): implement banked registers
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2022-10-21 05:12:01 -03:00 |
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Rekai Nyangadzayi Musuka
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fbc9de0335
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fix(cpu): improve MRS and MSR instructions
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2022-10-21 05:12:01 -03:00 |
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Rekai Nyangadzayi Musuka
|
daad98bbfe
|
feat(cpu): implement format 12 thumb instructions
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2022-10-21 05:11:57 -03:00 |
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Rekai Nyangadzayi Musuka
|
96d21f27a5
|
feat(cpu): implement THUMB format 5 instructions
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2022-10-21 05:11:57 -03:00 |
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Rekai Nyangadzayi Musuka
|
793110f315
|
chore: mgba log now supports printing THUMB instructions
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2022-10-21 05:11:57 -03:00 |
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Rekai Nyangadzayi Musuka
|
5ed5c5d52d
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feat(cpu): implement like 1 THUMB instruction
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2022-10-21 05:11:57 -03:00 |
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Rekai Nyangadzayi Musuka
|
01385ee46b
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chore: distinguish between undefined ARM and THUMB instr
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2022-10-21 05:11:57 -03:00 |
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Rekai Nyangadzayi Musuka
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0eba3aca1f
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chore(cpu): lay groundwork for THUMB instruction decoding and execution
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2022-10-21 05:11:57 -03:00 |
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Rekai Nyangadzayi Musuka
|
83a5370196
|
chore(cpu): refactor ARM functions to make room for THUMB
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2022-10-21 05:11:56 -03:00 |
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Rekai Nyangadzayi Musuka
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b0b6247f06
|
fix(cpu): fix conditions for GT cond
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2022-10-21 05:11:56 -03:00 |
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Rekai Nyangadzayi Musuka
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97b933d9ea
|
feat(cpu): implement branch and exchange
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
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2022-10-21 05:11:56 -03:00 |
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Rekai Nyangadzayi Musuka
|
b9255bffe7
|
feat(cpu): implement MSR and MRS
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2022-10-21 05:11:55 -03:00 |
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Rekai Nyangadzayi Musuka
|
e1f8400343
|
feat(cpu): stub PSR Transfer instructions
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2022-10-21 05:11:55 -03:00 |
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Rekai Nyangadzayi Musuka
|
527bd2889e
|
feat(cpu): implement LDM/STM
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2022-10-21 05:11:53 -03:00 |
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Rekai Nyangadzayi Musuka
|
357211a4cc
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chore: remove premature inlines
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2022-10-21 05:11:52 -03:00 |
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Rekai Nyangadzayi Musuka
|
2cec8d9f70
|
chore: improve code clarity
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2022-10-21 05:11:51 -03:00 |
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Rekai Nyangadzayi Musuka
|
036b861b05
|
chore: code cleanup
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2022-10-21 05:11:50 -03:00 |
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Rekai Nyangadzayi Musuka
|
880546468c
|
chore(bus): refactor bus.zig
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2022-10-21 05:11:50 -03:00 |
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Rekai Nyangadzayi Musuka
|
1a9c9ba4cb
|
chore: refactor instruction exec code
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2022-10-21 05:11:50 -03:00 |
|
Rekai Nyangadzayi Musuka
|
d54c8df7b3
|
feat(sched): add HBlank and VBlank events to the scheduler
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2022-10-21 05:11:49 -03:00 |
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Rekai Nyangadzayi Musuka
|
788bef188d
|
feat: implement dedicated Barrel Shifter SHL and SHR
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2022-10-21 05:11:49 -03:00 |
|
Rekai Nyangadzayi Musuka
|
44424e0687
|
chore: comment-out logging by default
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2022-10-21 05:11:48 -03:00 |
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Rekai Nyangadzayi Musuka
|
32f0b9d71c
|
chore: add mgba compatible (minus disasm) log function
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2022-10-21 05:11:47 -03:00 |
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Rekai Nyangadzayi Musuka
|
bbdcc0a8c2
|
chore: rename CPSR u32 from val to raw
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2022-10-21 05:11:47 -03:00 |
|
Rekai Nyangadzayi Musuka
|
67bf975034
|
chore: remove print statements
|
2022-10-21 05:11:47 -03:00 |
|
Rekai Nyangadzayi Musuka
|
c6de540c8a
|
feat(cpu): implement skipBios method
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2022-10-21 05:11:46 -03:00 |