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433 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka 02572dd15c feat: DMA Transfer MVP 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka 6d253cc74e feat(ppu): implement transparency + backdrop in mode 0 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka 4885a86833 chore(io): replace some bitfields with enums 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka fd9ffb20b4 fix: better emulate behaviour of IO reads 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka 56ef2b077a chore: document select unimplmented I/O registers 
These registers are written to / read from Kirby: Nightmare in Dream Land
 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka d4c7cfdf8b feat: impelement a barebones SRAM 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka 4d75d156e5 feat: pass retAddr.gba 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka d30a4d7ee5 feat: implement Hblank and Vcount Interrupts 
Also implemented unique behaviour when writing to IF
 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka d1fce8ba75 chore: improve Bus log + panic messages 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka 0f74e4fcf9 chore: improve io.zig 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka 4afcbd0957 feat: implement mirroring for IWRAM EWRAM, OAM and PALRAM 
Also realized I confused IWRAM and EWRAM. This is also fixed
TODO: Implemnt Mirroring for VRRAM
 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka 50dc31447d fix: resolve integer overflow in BG0 Drawing 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka acf1a10f91 chore: don't panic on 32-bit I/O 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka 606f9b959a chore: stub CPU HALTing 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka f19b42baf3 chore: correct logic errors in map size 1 and 3 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka 2a3d0c8b0d chore: properly write to VOFS and HOFS in 32-bit bus 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka 4405fa6bbf feat: implement hofs and vofs on io bus 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka e2b2bf882a feat: implement scrolling 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka 08e4eb1bf1 feat: add support for multiple BGs in Mode 0 2022-10-21 05:12:20 -03:00
Rekai Nyangadzayi Musuka f4b176a813 feat: document mode 0 2022-10-21 05:12:20 -03:00
Rekai Nyangadzayi Musuka efc7d817db feat: Mode 0 MVP 2022-10-21 05:12:20 -03:00
Rekai Nyangadzayi Musuka 1b17b1eb0c chore: use zig slices for fun 2022-10-21 05:12:20 -03:00
Rekai Nyangadzayi Musuka fab6d4c2a2 chore: give DISPCNT DISPSTAT and VCOUNT to PPU struct 2022-10-21 05:12:20 -03:00
Rekai Nyangadzayi Musuka 223a3403c0 chore: give io read/write functions access to the entire Bus 2022-10-21 05:12:20 -03:00
Rekai Nyangadzayi Musuka dfd0d064de feat: implement BG Scrolling Registers 2022-10-21 05:12:19 -03:00
Rekai Nyangadzayi Musuka 0c4882e658 feat: impelemnt BG0,1,2CNT and IF 2022-10-21 05:12:19 -03:00
Rekai Nyangadzayi Musuka bfdad9fa32 feat: implement OAM 2022-10-21 05:12:19 -03:00
Rekai Nyangadzayi Musuka 37fd8dab84 chore: squash bugs preventing swi_demo.gba from working 2022-10-21 05:12:19 -03:00
Rekai Nyangadzayi Musuka c143aefb01 chore(cpu): reimplement bank switching logic 2022-10-21 05:12:19 -03:00
Rekai Nyangadzayi Musuka 05bf245b5a fix: don't mask away MSB in THUMB.5 add 2022-10-21 05:12:19 -03:00
Rekai Nyangadzayi Musuka f9e7128061 fix: properly decode format 11 instructions 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 603e4b6fdf chore: make use of scoped logging 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 599a1f2973 chore: remove TODOs and some useless imports 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 22424ca69c fix: improper condition check and initialization of register 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 67a785cc22 fix(cpu): force align thumb and arm block data transfers 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 4eb3842606 feat: pass arm.gba 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka 1ee8b51b2b chore: reimplement ARM LDM/STM 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka 130310e5cc chore: improve arm ldm/stm 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka e933d7e5c7 fix(cpu): force-align SWP reads and writes 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka 44e8b5b882 fix: force-align ARM STRH reads 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka 28361e8b7d fix: implement the same LDRSH logic as THUMB LDRSH 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 75921d6413 fix: PC is 12 ahead when it is rd in str and strb 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 17226d8f75 fix: listen to my past self 
By deleting this line I go from test 234 to test 355 in arm.gba
 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 2cb1bf834a chore: dont use std.mem.bytesToValue 
the stdlib accounts for endianness, which isn't something we want.
 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 8006ca31e6 chore: remove unnecessary @as calls 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 82b92b4733 feat: pass thumb.gba 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka bf42d3ae2f chore: account for empty rlist in THUMB LDM/STM 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka f63ae76931 fix(cpu): handle edge case in LDRSH 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka f046787523 chore: reorganize util.zig 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka bbd73550e8 fix: zero initialize all allocated memory 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka 4776dc0788 Revert "fix: allow for 32-bit reads to KEYINPUT" 
This reverts commit 3a51707280.
 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka d8bd6da563 fix: resolve decoding mixup in THUMB format 8 instructions 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka b569a32170 fix: allow for 32-bit reads to KEYINPUT 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka 06e20666bd chore: refactor ARMv4 decoding 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka 36687c5c67 chore: add more debug information to CPU panic method 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka dd9b20030a chore: give more descriptive panic messages when changing mode fails 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka c0db2a987b chore: clean up THUMB instruction decoding 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka c3ff2ed6c1 feat: parse cartridge header 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 271f42cf0e feat: rename ARM and THUMB SWI functions 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 01e15584da chore: group THUMB and select ARM instructions together (same file) 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 17b91db2ef feat: integrate zig-clap with ZBA 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 3e786d02ac fix(cpu): properly decode format 7 and 8 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka c8f2db69df fix(cpu): resolve edge cases in THUMB Format 5 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka b4e0682801 fix(cpu): allow for select values to overflow 
FuzzARM found these operations which panicked, when they should
have overflowed. These are now fixed

n = 8000
 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka af10c1b076 feat(cpu): implement format 13 
While bugs do exist, at this point all THUMB and ARMv4 instructions
have been implemented! Yay!
 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka e6a0eab667 feat(cpu): implement THUMB format 17 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka 523b9d2736 feat(cpu): implement THUMB format11 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka 011d2f2f2a chore: update to latest zig nightly 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka c37546d273 chore: progress towards passing ldr/str thumb in armwrestler 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka fbedebb938 fix(cpu): properly negate in NEG 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka 1773a3acc8 fix(cpu): reimplement THUMB offset shifts 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka 058c02150c fix(cpu): op == 0b00 decodes to add in format 5 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka 8d841ead50 fix(cpu): account for overflow in THUMB alu MUL 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 152dafbdf7 chore: use if-else when decoding THUMB instructions 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 7dbd2fc556 fix(cpu): account for rn in rlist in block data transfer 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 85e0924669 feat: implement LDM/STM behaviour when S is set 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 97919f646d feat(cpu): Pass all LDR/STR ARMwrestler tests 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 696cc1b359 feat(cpu): decode and implement all necessary ARM CPU instructions 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 151de2eab4 feat(cpu): implement ARM SWP and SWPB 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka e7f6464564 fix: resolve off by n * 2 when accessing Palette during BG Mode 4 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka da681c946e feat(cpu): Implement Multiply Long ARM instructions 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka e0e43eece5 fix: no buttons are pressed by default 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 7013389288 feat(cpu): implement format 18 THUMB instructions 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 443520ecae chore: more detailed panic message 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 96d7285111 feat(cpu): implement format 10 THUMB instructions 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 7e6fc44191 feat(cpu): implement SWP 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 9cb4ebaa7f fix(cpu): perform MUL with u64s, throw away upper 32 bits 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 3e4d7e7ed8 feat: implement keyboard input 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 3a6951d93d chore: don't panic on unsupported BG mode 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 391096872e chore: tempoarily disable fps counter 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka eebf6fcae4 chore: zero-initialize VRAM 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 8b7223cf35 chore: stub KeyInput I/O register 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka e1fec48a0e fix(cpu): properly decode multiply instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 0778ee8dd7 feat(cpu): implement ARM multiply instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 14d5160674 fix: allow 32-bit writes to DISPCNT 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka eabf787305 fix(cpu): properly decode ldm stm thumb instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 980e4ff5dd fix(cpu): properly decode THUMB PUSH and POP at comptime 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka 1ac193c506 fix(cpu): don't ignore 11th bit of THUMB BL offset 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka d6ed071bc6 feat(cpu): implement thumb push / pop and stub format 13 thumb instrs 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka a3d53d40fb feat(cpu): implement THUMB format 9 loads / stores 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka a17dfbe41f fix(cpu): resolve issues with unexpected PC value in THUMB 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka b9a81baa47 feat(cpu): implement THUMB ldmia stmia 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka 97b236225e chore: implement THUMB format 4 instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka 8113146b86 chore: dedup code in THUMB instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka e6625113db chore: refactor and genericize ARM data processing calculations 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka 2643504eb5 chore: relocate barrel_shifter zig file 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka f7518d1bab feat(cpu): implement format2 THUMB instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka 800ca798cd feat(cpu): implement format19 THUMB instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka d714ffb4f9 chore: account for THUMB BL instruction when mimicking mGBA logs 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 7bc186a03c feat(cpu): implement format16 THUMB instructions 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka b94b87d186 feat(cpu): implement format 1 THUMB instructions 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 0289be60ef fix: dont close file handle early 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 93922b65e3 feat(cpu): implement format 6 THUMB instructions 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka c6608748c6 chore: rename title 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 8e383d55d7 chore: refactor GBA Display Timings 
This change should reflect that the Hblank bit of DISPSTAT is toggled on all scanlines
while also ensuring that the Vblank bit is set on all Vblank scanlines
 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 8926026b5b chore: move a single statement lol 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 464479b986 chore: mark indexing methods as inline 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka de1c84914c feat: create emulator thread 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 8e7766e694 chore: disable logging by default 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 4858dbc5dc chore: revert fastboot changes 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka c4e131b92d chore: binary logging + file logging + DP chanes + fastBoot changes 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 2e54be76d6 chore: rename skipBios to fastBoot 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 7914268702 chore: set correct values for select banked registers on fast boot 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 4bdb85834c feat(cpu): implement SWI 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka f89a37936f chore(bios): allow reading from BIOS 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 8bb7ea6be6 fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka 60a1f7fa99 chore(cpu): implement behaviour for undefined test instruction 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka b3b8182f85 fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka 56e660714c fix(cpu): implement S set + rd == 15 case for data processing 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka eb632056a2 feat(cpu): implement banked registers 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka fbc9de0335 fix(cpu): improve MRS and MSR instructions 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka 5c7539cd26 feat(cpu): implement CMN 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka 7c20e5fdb5 fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka f79e7126ee feat(cpu): Implement RSC 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka 15e92bc6af feat(cpu): implement RSB 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka 47fc96fe00 feat(cpu): implement BIC 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka 4ac5ad42c6 feat(cpu): implement EOR 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka c93153672f feat(cpu): implement ADD 2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka a46dd448f4 feat(cpu): implement fix for ADC and implement SBC 2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka 01f75112ce chore(barrel_shifter): remove panic from ASR 2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka 051b98bc02 fix(barrel_shifter): should not modify cpsr when amount == 0 2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka 5d0bc1b335 chore(cpu): refactor the barrel shifter once again 2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka 43d011538e feat(cpu): implement ADC 
ADC interacting w/ the Barrel Shifter is not working though
 2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka f3ad5e90ff feat(cpu): implement RRX for Barrel Shifter 2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka 9b867c02e0 feat(cpu): implement SUB in THUMB format 3 2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka 2ba09868ba feat(cpu): implement ARM SUB in data processing 2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka 9394754593 feat(cpu): implement MVN 2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka 41bab3d6ba chore(cpu): refactor barrel shifter 2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka 99b686b2d7 fix(cpu): use barrel shifter in data processing immediates 2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka daad98bbfe feat(cpu): implement format 12 thumb instructions 2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka 2fb01577af feat(cpu): implement some already decoded format 3 instructions 2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka 96d21f27a5 feat(cpu): implement THUMB format 5 instructions 2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka 793110f315 chore: mgba log now supports printing THUMB instructions 2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka 5ed5c5d52d feat(cpu): implement like 1 THUMB instruction 2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka 01385ee46b chore: distinguish between undefined ARM and THUMB instr 2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka 0eba3aca1f chore(cpu): lay groundwork for THUMB instruction decoding and execution 2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka 83a5370196 chore(cpu): refactor ARM functions to make room for THUMB 2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka b0b6247f06 fix(cpu): fix conditions for GT cond 2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka 2a33716166 fix(cpu): fix imm value calculation in MSR 2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka 9b26454c72 fix(cpu): resolve off-by-one error when executing LDM 2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka 97b933d9ea feat(cpu): implement branch and exchange 
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
 2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka ff70aadfdb fix(cpu): make Data Processing instructions r15-aware 2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka ae53f92d40 fix(cpu): make LDRH and STRH aware of r15 2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka f51e1d3154 fix(cpu): account for r15 in LDR and STR instructions 2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka a21f94569f fix(cpu): flip two branches in PSR Transfer execution 2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka b9255bffe7 feat(cpu): implement MSR and MRS 2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka e1f8400343 feat(cpu): stub PSR Transfer instructions 2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka 52493831cc chore(io): implement IE and IME 2022-10-21 05:11:54 -03:00
Rekai Nyangadzayi Musuka 00ba7afac4 chore: remove some magic constants 2022-10-21 05:11:54 -03:00
Rekai Nyangadzayi Musuka 97e663febf fix(bus): remove accidental recursion 2022-10-21 05:11:54 -03:00
Rekai Nyangadzayi Musuka 9a5959e46c fix(cpu): write results of ORR to destination register 2022-10-21 05:11:54 -03:00
Rekai Nyangadzayi Musuka 780c717409 feat(cpu): implement TEQ 2022-10-21 05:11:53 -03:00
Rekai Nyangadzayi Musuka 34c6df344d feat(cpu): Implement ORR 2022-10-21 05:11:53 -03:00
Rekai Nyangadzayi Musuka 670347d4a0 feat(bus): implement IWRAM and EWRAM 2022-10-21 05:11:53 -03:00
Rekai Nyangadzayi Musuka e0c4b3b407 fix(ppu): properly access Mode 4 palette 2022-10-21 05:11:53 -03:00
Rekai Nyangadzayi Musuka cffffab8ea feat(cpu): refactor LDM/STM 2022-10-21 05:11:53 -03:00
Rekai Nyangadzayi Musuka 527bd2889e feat(cpu): implement LDM/STM 2022-10-21 05:11:53 -03:00
Rekai Nyangadzayi Musuka 15dc4ce03a chore(io): DISPSTAT bits 3 and 4 better match GBATEK documentation 2022-10-21 05:11:52 -03:00
Rekai Nyangadzayi Musuka 4f629227ab fix(cpu): fix off-by-word bug in BL 2022-10-21 05:11:52 -03:00
Rekai Nyangadzayi Musuka caa799853e feat(bus): have VCOUNT be addressable on the bus 2022-10-21 05:11:52 -03:00
Rekai Nyangadzayi Musuka 3590215d33 feat(ppu): implement Mode 4 
Implementation is not tested. Pending on LDM and STM so that I can
run beeg.gba
 2022-10-21 05:11:52 -03:00
Rekai Nyangadzayi Musuka d6aafc61bd chore(io): rename some io bitfield fields 2022-10-21 05:11:52 -03:00
Rekai Nyangadzayi Musuka 357211a4cc chore: remove premature inlines 2022-10-21 05:11:52 -03:00
Rekai Nyangadzayi Musuka c4c4332485 chore: add FPS counter 2022-10-21 05:11:51 -03:00
Rekai Nyangadzayi Musuka 2cec8d9f70 chore: improve code clarity 2022-10-21 05:11:51 -03:00
Rekai Nyangadzayi Musuka 8348d7c4bc feat(ppu): improve timings + implement BG mode 3 bitmap 2022-10-21 05:11:51 -03:00
Rekai Nyangadzayi Musuka c33068d831 fix: allocate framebuf on heap 2022-10-21 05:11:51 -03:00
Rekai Nyangadzayi Musuka f28b963f9d chore: add code for heap alloc of white texture 2022-10-21 05:11:51 -03:00
Rekai Nyangadzayi Musuka 7fc77f993f chore(gui): switch from RGBA8888 to BGR5555 to match BG Mode 3 2022-10-21 05:11:51 -03:00
Rekai Nyangadzayi Musuka 0e0b21d8c3 feat: draw white texture using SDL2 2022-10-21 05:11:50 -03:00
Rekai Nyangadzayi Musuka f3ad0eb3aa fix(ppu): deallocate palette RAM on cleanup 2022-10-21 05:11:50 -03:00
Rekai Nyangadzayi Musuka 036b861b05 chore: code cleanup 2022-10-21 05:11:50 -03:00
Rekai Nyangadzayi Musuka 880546468c chore(bus): refactor bus.zig 2022-10-21 05:11:50 -03:00
Rekai Nyangadzayi Musuka 1a9c9ba4cb chore: refactor instruction exec code 2022-10-21 05:11:50 -03:00
Rekai Nyangadzayi Musuka a9e7140a88 chore(io): alias @This() to Self in io.zig 2022-10-21 05:11:50 -03:00
Rekai Nyangadzayi Musuka 808633deb7 chore: refactor bios.zig and pak.zig 2022-10-21 05:11:49 -03:00
Rekai Nyangadzayi Musuka ee4fcd926b fix: by convention deinit() should not take pointers to self 2022-10-21 05:11:49 -03:00
Rekai Nyangadzayi Musuka 9d1229fe0c feat: implement PPU Timings in Scheduler 2022-10-21 05:11:49 -03:00
Rekai Nyangadzayi Musuka d54c8df7b3 feat(sched): add HBlank and VBlank events to the scheduler 2022-10-21 05:11:49 -03:00
Rekai Nyangadzayi Musuka d495f5b4c5 feat: implement S (when rd != 15) for several data processing instructions 2022-10-21 05:11:49 -03:00
Rekai Nyangadzayi Musuka 788bef188d feat: implement dedicated Barrel Shifter SHL and SHR 2022-10-21 05:11:49 -03:00
Rekai Nyangadzayi Musuka bff9be03cc chore: stub TST 2022-10-21 05:11:48 -03:00
Rekai Nyangadzayi Musuka 44424e0687 chore: comment-out logging by default 2022-10-21 05:11:48 -03:00
Rekai Nyangadzayi Musuka 4b43dcd256 fix(cpu): improve LDR/STR write-back logic 2022-10-21 05:11:48 -03:00
Rekai Nyangadzayi Musuka 47805fb60c feat(bus): implement Palette RAM and DISPSTAT 2022-10-21 05:11:48 -03:00
Rekai Nyangadzayi Musuka abe2fc431e fix(bus): restrict Game ROM and VRAM to a 16-bit bus 2022-10-21 05:11:48 -03:00
Rekai Nyangadzayi Musuka 46c694d95a fix(cpu): properly implement SUB/CMP CSPSR carry bit condition 2022-10-21 05:11:48 -03:00
Rekai Nyangadzayi Musuka faced77161 fix(cpu): resolve reversed if statement + write back on W = 0 2022-10-21 05:11:47 -03:00
Rekai Nyangadzayi Musuka 32f0b9d71c chore: add mgba compatible (minus disasm) log function 2022-10-21 05:11:47 -03:00
Rekai Nyangadzayi Musuka bbdcc0a8c2 chore: rename CPSR u32 from val to raw 2022-10-21 05:11:47 -03:00
Rekai Nyangadzayi Musuka 67bf975034 chore: remove print statements 2022-10-21 05:11:47 -03:00
Rekai Nyangadzayi Musuka da7300a78c chore: remove all memory leaks 2022-10-21 05:11:47 -03:00
Rekai Nyangadzayi Musuka 5c5179a553 feat(ppu): implement VRAM 2022-10-21 05:11:47 -03:00
Rekai Nyangadzayi Musuka dcf78d0f76 fix(emu): prevent infinite loop when advancing scheduler 2022-10-21 05:11:46 -03:00
Rekai Nyangadzayi Musuka 4836ea3bcf fix(io): fix DISPCNT is at wrong IO address 2022-10-21 05:11:46 -03:00
Rekai Nyangadzayi Musuka 182392bf1c feat(cpu): properly implement STR STRH and STRB 2022-10-21 05:11:46 -03:00
Rekai Nyangadzayi Musuka c6de540c8a feat(cpu): implement skipBios method 2022-10-21 05:11:46 -03:00
Rekai Nyangadzayi Musuka 82fb5e7a93 chore: panic on read from BIOS 
GBA Bios requires a lot of implemented features, so we're ignoring it
for now
 2022-10-21 05:11:46 -03:00
Rekai Nyangadzayi Musuka cbcc6282df feat(bus): add Io Struct 
Also, add more information to all panic messages
 2022-10-21 05:11:46 -03:00
Rekai Nyangadzayi Musuka 614ac4a262 chore: rename consturctors to fit convention 2022-10-21 05:11:45 -03:00
Rekai Nyangadzayi Musuka 80d49e03d6 chore: move bitfield library to lib director 
I'd presonally prefer to use a git submodule here but It doesn't quite
seem like git submodules are possible for individual files. I'll have to
check with FlorenceOS every once and a while to ensure that there are no
lingering soundness issues with the library.

Thanks to @N00byEdge for this wonderful library!
 2022-10-21 05:11:45 -03:00
Rekai Nyangadzayi Musuka 7016fcdb79 chore: use bitfield library 2022-10-21 05:11:45 -03:00
Rekai Nyangadzayi Musuka f030889d6c feat(bus): emu is now able to read from user-provided BIOS 2022-10-21 05:11:45 -03:00
Rekai Nyangadzayi Musuka d50aff30c9 feat(bus): implement Gameboy Advance MMIO 2022-10-21 05:11:45 -03:00
Rekai Nyangadzayi Musuka 5cbfae677a feat: implement ROM CLI argument 2022-10-21 05:11:45 -03:00
Rekai Nyangadzayi Musuka d660babecd fix(cpu): purposely overflow when calculating PC during branch 2022-10-21 05:11:44 -03:00
Rekai Nyangadzayi Musuka cb06c20864 feat(cpu): implement condition field behaviour 2022-10-21 05:11:44 -03:00
Rekai Nyangadzayi Musuka c98e8d384a chore: conform to zig style guides 2022-10-21 05:11:44 -03:00
Rekai Nyangadzayi Musuka 446eeba094 chore: run zig fmt 2022-10-21 05:11:44 -03:00
Rekai Nyangadzayi Musuka e841bf44ca chore(cpu): iron out some false assumptions 2022-10-21 05:11:44 -03:00
Rekai Nyangadzayi Musuka 1991bd8525 feat: implement LDR STR 2022-10-21 05:11:44 -03:00
Rekai Nyangadzayi Musuka 6c6d7d463d chore: run zig fmt 2022-10-21 05:11:43 -03:00
Rekai Nyangadzayi Musuka 5b3b81e4dc Initial Commit 2021-12-29 15:09:00 -06:00