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524 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka 00f75f0d39 chore: move OAM, PALRAM and VRAM structs to separate files 2022-10-21 05:38:20 -03:00
Rekai Nyangadzayi Musuka 4f9cb7d8a3 fix: 8-bit writes to WIN PPU registers 
Advance Wars depends on these registers similar to Mario Kart's 8-bit
writes to Affine Background registers:
 2022-10-21 05:38:20 -03:00
Rekai Nyangadzayi Musuka 6c2dfa9d05 chore: refactor window 2022-10-21 05:38:20 -03:00
Rekai Nyangadzayi Musuka 06addcfc71 chore: crude background window impl (no affine) 2022-10-21 05:38:20 -03:00
Rekai Nyangadzayi Musuka 7bb44894a7 chore: rename function (misspelt until now somehow) 2022-10-21 05:38:20 -03:00
Rekai Nyangadzayi Musuka 98fc82c17a chore(config): change defaults in example.toml 2022-10-21 05:37:46 -03:00
Rekai Nyangadzayi Musuka 9436888b28 chore(gitignore): update .gitignore 
sometimes I'm left with a src/zig-cache, and I want to
just make sure that I never-ever end up commiting that
 2022-10-21 05:13:13 -03:00
Rekai Nyangadzayi Musuka 583ed54ee3 feat: write default config.toml if it doesn't exist 
also resolves panic on missing /zba or /zba/save directory by ensuring
those directories exist as soon as we know the data directory
 2022-10-21 05:13:13 -03:00
Rekai Nyangadzayi Musuka 7944cd7abc chore: update README 2022-10-21 05:13:13 -03:00
Rekai Nyangadzayi Musuka ffd94c96ce Merge pull request 'Configure SDL2 to use OpenGL' (#4) from opengl into main 
Reviewed-on: #4
 2022-10-21 05:13:13 -03:00
Rekai Nyangadzayi Musuka 4fe612da61 fix(opengl): properly control whether vsync is enabled 2022-10-21 05:13:12 -03:00
Rekai Nyangadzayi Musuka 4262688fa8 chore(ppu): remove BGR555 -> RGBA888 LUT 
LUT probably couldn't fit in CPU cache anyways.

TODO: Consider whether LUTs for separate channels (size 32 * 3 * 3
instead of std.math.maxInt(u15))
 2022-10-21 05:13:12 -03:00
Rekai Nyangadzayi Musuka 35d685f032 chore: replace OpenGL 4.5 bindings with OpenGL 3.3 2022-10-21 05:13:12 -03:00
Rekai Nyangadzayi Musuka 5b9d3d0960 chore: remove unnecessary ptr cast 2022-10-21 05:13:12 -03:00
Rekai Nyangadzayi Musuka 44b2e9be88 chore(gpio): add missing errdefer 2022-10-21 05:13:11 -03:00
Rekai Nyangadzayi Musuka 4b7ef52a7a feat: implement better Colour Emulation 2022-10-21 05:13:11 -03:00
Rekai Nyangadzayi Musuka 5103fdf646 chore(main): report errors slightly better 2022-10-21 05:13:11 -03:00
Rekai Nyangadzayi Musuka acddaf76aa fix: lower required OpenGL version + resolve offset bug 2022-10-21 05:13:11 -03:00
Rekai Nyangadzayi Musuka 3da3b69e13 feat: use opengl 
TODO:
- Texture isn't scaling properly
- I need to reverse the colours in the frag shader
 2022-10-21 05:13:11 -03:00
Rekai Nyangadzayi Musuka 40062d4dfe chore(config): add log message 2022-10-21 05:13:10 -03:00
Rekai Nyangadzayi Musuka 1c91b497bc feat(config): add option to skip BIOS 2022-10-21 05:13:10 -03:00
Rekai Nyangadzayi Musuka e3286a9872 feat(cli): Add option to skip BIOS 2022-10-21 05:13:10 -03:00
Rekai Nyangadzayi Musuka ddb0e2f928 chore: Update README.md 2022-10-21 05:13:10 -03:00
Rekai Nyangadzayi Musuka d927ee6c90 Merge pull request 'Draft: Implement Instruction Pipeline' (#3) from pipeline into main 
Reviewed-on: #3
 2022-10-21 05:13:10 -03:00
Rekai Nyangadzayi Musuka 011f105bee feat(config): add config option to mute ZBA 2022-10-21 05:13:09 -03:00
Rekai Nyangadzayi Musuka 2c88f9bbce fix(bios): set addr_latch even if bios is skipped 2022-10-21 05:13:09 -03:00
Rekai Nyangadzayi Musuka 30c5fafec1 chore(config): add example config file 2022-10-21 05:13:09 -03:00
Rekai Nyangadzayi Musuka 3b144e581a fix(bus): make open bus impl aware of CPU pipeline 2022-10-21 05:13:09 -03:00
Rekai Nyangadzayi Musuka 0117a52f4d style(bus): cpu ptr doesn't need to be optional 2022-10-21 05:13:09 -03:00
Rekai Nyangadzayi Musuka 3cf7c83269 style: code cleanup 2022-10-21 05:13:09 -03:00
Rekai Nyangadzayi Musuka 85d4690c56 fix: resolve timing regressions 
make sure to use fetch timings when fetching instructions
 2022-10-21 05:13:08 -03:00
Rekai Nyangadzayi Musuka 130d40bc7f fix: rename Pipline to Pipeline 2022-10-21 05:13:08 -03:00
Rekai Nyangadzayi Musuka 2c928eafec feat: working pipeline implementation 2022-10-21 05:13:08 -03:00
Rekai Nyangadzayi Musuka dcbeeee7cc chore: refactor ARM/THUMB data processing instructions 2022-10-21 05:13:08 -03:00
Rekai Nyangadzayi Musuka 84ccb7224b fix: don't flush pipeline when reloading CPSR in ARM Data Processing 2022-10-21 05:13:08 -03:00
Rekai Nyangadzayi Musuka dd4bb4ff03 chore: don't write to CPSR + swap with SPSR at the same time 2022-10-21 05:13:07 -03:00
Rekai Nyangadzayi Musuka ecbfe67b27 chore: update README.md 2022-10-21 05:13:07 -03:00
Rekai Nyangadzayi Musuka e29c20019d fix: advance r15, even when the pipeline is reloaded from the scheduler 
The PC would fall behind whenever an IRQ was called because the pipeline
was reloaded (+8 to PC), however that was never actually done by any code

Now, the PC is always incremented when the pipeline is reloaded
 2022-10-21 05:13:07 -03:00
Rekai Nyangadzayi Musuka d8c397248f chore: dump pipeline state on cpu panic 2022-10-21 05:13:07 -03:00
Rekai Nyangadzayi Musuka 64aed01869 fix: reimpl THUMB.5 instructions 
pipeline branch now passes arm.gba and thumb.gba again

(TODO: Stop rewriting my commits away)
 2022-10-21 05:13:07 -03:00
Rekai Nyangadzayi Musuka 29f2a0288f fix: impl workaround for stage2 miscompilation 2022-10-21 05:13:07 -03:00
Rekai Nyangadzayi Musuka 27ada16377 chore: instantly refill the pipeline on flush 
I believe this to be necessary in order to get hardware interrupts
working.

thumb.gba test 108 fails but I'm committing anyways (despite the
regression) because this is kind of rebase/merge hell and I have
something that at least sort of works rn
 2022-10-21 05:13:06 -03:00
Rekai Nyangadzayi Musuka ad1cec58e7 fix: reimpl handleInterrupt code 2022-10-21 05:13:06 -03:00
Rekai Nyangadzayi Musuka 97d9edab93 feat: implement basic pipeline 
passes arm.gba, thumb.gb and armwrestler, fails in actual games
TODO: run FuzzARM debug specific titles
 2022-10-21 05:13:06 -03:00
Rekai Nyangadzayi Musuka 39f56e6d8a feat: resolve off-by-{word, halfword} errors when printing debug info 2022-10-21 05:13:06 -03:00
Rekai Nyangadzayi Musuka f0014e7179 feat: reimplement cpu logging 2022-10-21 05:13:06 -03:00
Rekai Nyangadzayi Musuka 8a804ea05e Merge pull request 'Add TOML Support' (#2) from toml into main 
Reviewed-on: #2
 2022-10-21 05:13:05 -03:00
Rekai Nyangadzayi Musuka efce1a6dce chore(emu): refactor code 2022-10-21 05:13:05 -03:00
Rekai Nyangadzayi Musuka 8b9ab6f4b5 feat(config): add support for (and read from) TOML config file 2022-10-21 05:13:05 -03:00
Rekai Nyangadzayi Musuka d21c860eb5 feat: parse config.toml in data folder 
Also took the chance to rework parts of the logic that determines
ZBA's save path
 2022-10-21 05:13:05 -03:00