chore: refactor instruction exec code
This commit is contained in:
29
src/cpu.zig
29
src/cpu.zig
@@ -9,9 +9,10 @@ const Scheduler = @import("scheduler.zig").Scheduler;
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const Bitfield = bitfield.Bitfield;
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const Bit = bitfield.Bit;
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const comptimeDataProcessing = @import("cpu/data_processing.zig").comptimeDataProcessing;
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const comptimeSingleDataTransfer = @import("cpu/single_data_transfer.zig").comptimeSingleDataTransfer;
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const comptimeHalfSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").comptimeHalfSignedDataTransfer;
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const dataProcessing = @import("cpu/data_processing.zig").dataProcessing;
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const singleDataTransfer = @import("cpu/single_data_transfer.zig").singleDataTransfer;
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const halfAndSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
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const branch = @import("cpu/branch.zig").branch;
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pub const InstrFn = fn (*Arm7tdmi, *Bus, u32) void;
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const arm_lut: [0x1000]InstrFn = populate();
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@@ -58,7 +59,7 @@ pub const Arm7tdmi = struct {
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return word;
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}
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fn fakePC(self: *const @This()) u32 {
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pub fn fakePC(self: *const @This()) u32 {
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return self.r[15] + 4;
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}
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@@ -128,7 +129,7 @@ fn populate() [0x1000]InstrFn {
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const S = i >> 4 & 1 == 1;
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const instrKind = i >> 5 & 0xF;
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lut[i] = comptimeDataProcessing(I, S, instrKind);
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lut[i] = dataProcessing(I, S, instrKind);
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}
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if (i >> 9 & 0x7 == 0b000 and i >> 3 & 1 == 1 and i & 1 == 1) {
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@@ -138,7 +139,7 @@ fn populate() [0x1000]InstrFn {
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const W = i >> 5 & 1 == 1;
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const L = i >> 4 & 1 == 1;
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lut[i] = comptimeHalfSignedDataTransfer(P, U, I, W, L);
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lut[i] = halfAndSignedDataTransfer(P, U, I, W, L);
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}
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if (i >> 10 & 0x3 == 0b01) {
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@@ -149,12 +150,12 @@ fn populate() [0x1000]InstrFn {
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const W = i >> 5 & 1 == 1;
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const L = i >> 4 & 1 == 1;
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lut[i] = comptimeSingleDataTransfer(I, P, U, B, W, L);
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lut[i] = singleDataTransfer(I, P, U, B, W, L);
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}
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if (i >> 9 & 0x7 == 0b101) {
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const L = i >> 8 & 1 == 1;
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lut[i] = comptimeBranch(L);
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lut[i] = branch(L);
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}
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}
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@@ -188,15 +189,3 @@ fn undefinedInstruction(_: *Arm7tdmi, _: *Bus, opcode: u32) void {
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const id = armIdx(opcode);
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std.debug.panic("[CPU] {{0x{X:}}} 0x{X:} is an illegal opcode", .{ id, opcode });
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}
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fn comptimeBranch(comptime L: bool) InstrFn {
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return struct {
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fn branch(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
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if (L) {
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cpu.r[14] = cpu.r[15] - 4;
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}
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cpu.r[15] = cpu.fakePC() +% util.u32SignExtend(24, opcode << 2);
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}
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}.branch;
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}
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