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chore(cpu): iron out some false assumptions

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-10-21 05:11:44 -03:00
parent 1991bd8525
commit e841bf44ca
4 changed files with 128 additions and 36 deletions
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17
src/cpu/data_processing.zig
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@@ -20,15 +20,32 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
switch (instrKind) {
0x4 => {
// ADD
cpu.r[rd] = cpu.r[op1] + op2;
if (S) std.debug.panic("TODO: implement ADD condition codes", .{});
},
0xD => {
// MOV
cpu.r[rd] = op2;
if (S) std.debug.panic("TODO: implement MOV condition codes", .{});
},
0xA => {
// CMP
var result: u32 = undefined;
const op1_val = cpu.r[op1];
const v_ctx = (op1_val >> 31 == 0x01) or (op2 >> 31 == 0x01);
const didOverflow = @subWithOverflow(u32, op1_val, op2, &result);
cpu.cpsr.set_v(v_ctx and (result >> 31 & 0x01 == 0x01));
cpu.cpsr.set_c(didOverflow);
cpu.cpsr.set_z(result == 0x00);
cpu.cpsr.set_n(result >> 31 & 0x01 == 0x01);
},
else => std.debug.panic("TODO: implement data processing type {}", .{instrKind}),
}
}

4
src/cpu/half_signed_data_transfer.zig
View File

@@ -40,12 +40,12 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
0b10 => {
// LDRSB
const byte = bus.readByte(address);
cpu.r[rd] = util.u32_sign_extend(@as(u32, byte), 8);
cpu.r[rd] = util.u32SignExtend(8, @as(u32, byte));
},
0b11 => {
// LDRSH
const halfword = bus.readHalfWord(address);
cpu.r[rd] = util.u32_sign_extend(@as(u32, halfword), 16);
cpu.r[rd] = util.u32SignExtend(16, @as(u32, halfword));
},
}
} else {