feat: implement Hblank and Vcount Interrupts
Also implemented unique behaviour when writing to IF
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@ -105,7 +105,7 @@ pub fn write16(bus: *Bus, addr: u32, halfword: u16) void {
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0x0400_001C => bus.ppu.bg[3].hofs.raw = halfword,
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0x0400_001E => bus.ppu.bg[3].vofs.raw = halfword,
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0x0400_0200 => bus.io.ie.raw = halfword,
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0x0400_0202 => bus.io.irq.raw = halfword,
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0x0400_0202 => bus.io.irq.raw &= ~halfword,
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0x0400_0208 => bus.io.ime = halfword & 1 == 1,
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else => std.debug.panic("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, addr }),
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}
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36
src/cpu.zig
36
src/cpu.zig
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@ -246,14 +246,8 @@ pub const Arm7tdmi = struct {
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}
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pub fn step(self: *Self) u64 {
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if (self.bus.io.is_halted) {
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// const ie = self.bus.io.ie.raw;
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// const irq = self.bus.io.irq.raw;
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// if (ie & irq != 0) self.bus.io.is_halted = false;
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// log.warn("FIXME: Enable GBA HALTing", .{});
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}
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// If we're halted, the cpu is disabled
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if (self.bus.io.is_halted) return 1;
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if (self.cpsr.t.read()) {
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const opcode = self.thumbFetch();
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@ -272,6 +266,32 @@ pub const Arm7tdmi = struct {
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return 1;
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}
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pub fn handleInterrupt(self: *Self) void {
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const should_handle = self.bus.io.ie.raw & self.bus.io.irq.raw;
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if (should_handle != 0) {
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self.bus.io.is_halted = false;
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// log.info("An Interrupt was Fired!", .{});
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// Either IME is not true or I in CPSR is true
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// Don't handle interrupts
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if (!self.bus.io.ime or self.cpsr.i.read()) return;
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// log.info("An interrupt was Handled!", .{});
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// TODO: Should this behave like Software Interrupts?
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const r15 = self.r[15] + if (self.cpsr.t.read()) @as(u32, 2) else 4;
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const cpsr = self.cpsr.raw;
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self.changeMode(.Irq);
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self.cpsr.t.write(false);
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self.cpsr.i.write(true);
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self.r[14] = r15;
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self.spsr.raw = cpsr;
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self.r[15] = 0x000_0018;
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}
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}
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fn thumbFetch(self: *Self) u16 {
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const halfword = self.bus.read16(self.r[15]);
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self.r[15] += 2;
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@ -25,8 +25,11 @@ pub const Scheduler = struct {
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self.queue.deinit();
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}
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pub fn handleEvent(self: *Self, _: *Arm7tdmi, bus: *Bus) void {
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pub fn handleEvent(self: *Self, cpu: *Arm7tdmi, bus: *Bus) void {
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const should_handle = if (self.queue.peek()) |e| self.tick >= e.tick else false;
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const stat = &bus.ppu.dispstat;
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const vcount = &bus.ppu.vcount;
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const irq = &bus.io.irq;
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if (should_handle) {
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const event = self.queue.remove();
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@ -38,19 +41,36 @@ pub const Scheduler = struct {
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},
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.HBlank => {
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// The End of a Hblank (During Draw or Vblank)
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const old_scanline = bus.ppu.vcount.scanline.read();
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const old_scanline = vcount.scanline.read();
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const scanline = (old_scanline + 1) % 228;
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bus.ppu.vcount.scanline.write(scanline);
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bus.ppu.dispstat.hblank.unset();
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vcount.scanline.write(scanline);
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stat.hblank.unset();
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// Perform Vc == VcT check
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const coincidence = scanline == stat.vcount_trigger.read();
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stat.coincidence.write(coincidence);
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if (coincidence and stat.vcount_irq.read()) {
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irq.coincidence.set();
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cpu.handleInterrupt();
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}
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if (scanline < 160) {
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// Transitioning to another Draw
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self.push(.Draw, self.tick + (240 * 4));
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} else {
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// Transitioning to a Vblank
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if (scanline < 227) bus.ppu.dispstat.vblank.set() else bus.ppu.dispstat.vblank.unset();
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if (scanline == 160) {
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stat.vblank.set();
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if (stat.vblank_irq.read()) {
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irq.vblank.set();
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cpu.handleInterrupt();
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}
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}
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if (scanline == 227) stat.vblank.unset();
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self.push(.VBlank, self.tick + (240 * 4));
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}
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},
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@ -59,11 +79,24 @@ pub const Scheduler = struct {
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bus.ppu.drawScanline();
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// Transitioning to a Hblank
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if (bus.ppu.dispstat.hblank_irq.read()) {
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bus.io.irq.hblank.set();
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cpu.handleInterrupt();
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}
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bus.ppu.dispstat.hblank.set();
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self.push(.HBlank, self.tick + (68 * 4));
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},
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.VBlank => {
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// The end of a Vblank
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// Transitioning to a Hblank
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if (bus.ppu.dispstat.hblank_irq.read()) {
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bus.io.irq.hblank.set();
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cpu.handleInterrupt();
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}
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bus.ppu.dispstat.hblank.set();
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self.push(.HBlank, self.tick + (68 * 4));
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},
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}
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