fix: implement register reads for Yoshi's Island
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16
src/apu.zig
16
src/apu.zig
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@ -42,7 +42,9 @@ pub fn read(comptime T: type, apu: *const Apu, addr: u32) T {
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},
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u8 => switch (byte) {
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0x60 => apu.ch1.getSoundCntL(), // NR10
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0x62 => apu.ch1.duty.raw, // NR11
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0x63 => apu.ch1.envelope.raw, // NR12
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0x68 => apu.ch2.duty.raw, // NR21
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0x69 => apu.ch2.envelope.raw, // NR22
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0x73 => apu.ch3.vol.raw, // NR32
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0x79 => apu.ch4.envelope.raw, // NR42
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@ -120,6 +122,8 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
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0x80 => apu.setNr50(value),
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0x81 => apu.setNr51(value),
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0x82 => apu.setSoundCntHL(value),
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0x83 => apu.setSoundCntHH(value),
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1), // NR52
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0x89 => apu.setSoundBiasH(value),
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0x90...0x9F => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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@ -192,6 +196,18 @@ pub const Apu = struct {
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self.ch4.reset();
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}
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/// SOUNDCNT_H_L
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fn setSoundCntHL(self: *Self, value: u8) void {
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const merged = (self.dma_cnt.raw & 0xFF00) | value;
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self.setSoundCntH(merged);
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}
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/// SOUNDCNT_H_H
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fn setSoundCntHH(self: *Self, value: u8) void {
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const merged = (self.dma_cnt.raw & 0x00FF) | (@as(u16, value) << 8);
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self.setSoundCntH(merged);
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}
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pub fn setSoundCntH(self: *Self, value: u16) void {
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const new: io.DmaSoundControl = .{ .raw = value };
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@ -296,6 +296,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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0x0400_000A => bus.ppu.bg[1].cnt.raw = (bus.ppu.bg[1].cnt.raw & 0xFF00) | value,
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0x0400_000B => bus.ppu.bg[1].cnt.raw = (@as(u16, value) << 8) | (bus.ppu.bg[1].cnt.raw & 0xFF),
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0x0400_0048 => log.debug("Wrote 0x{X:0>2} to WININ_L", .{value}),
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0x0400_0049 => log.debug("Wrote 0x{X:0>2} to WININ_H", .{value}),
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0x0400_004A => log.debug("Wrote 0x{X:0>2} to WINOUT_L", .{value}),
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0x0400_0054 => log.debug("Wrote 0x{X:0>2} to BLDY_L", .{value}),
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