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chore: refactor and genericize ARM data processing calculations

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-01-29 19:40:58 -04:00
parent e0acabf050
commit bce067557f
3 changed files with 146 additions and 87 deletions
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2
src/cpu/thumb/format1.zig
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@@ -15,7 +15,7 @@ pub fn format1(comptime op: u2, comptime offset: u5) InstrFn {
0b00 => shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rs], offset),
0b01 => shifter.logicalRight(true, &cpu.cpsr, cpu.r[rs], offset),
0b10 => shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rs], offset),
else => std.debug.panic("{} is an invalid op for Format 1 THUMB Instructions", .{op}),
else => std.debug.panic("[CPU|THUMB|Fmt1] {} is an invalid op", .{op}),
};
cpu.r[rd] = result;

8
src/cpu/thumb/format2.zig
View File

@@ -16,16 +16,16 @@ pub fn format2(comptime I: bool, is_sub: bool, rn: u3) InstrFn {
if (is_sub) {
// SUB
cpu.r[rd] = if (I) blk: {
break :blk sub(true, cpu, rd, cpu.r[rs], @as(u32, rn));
break :blk sub(true, cpu, cpu.r[rs], @as(u32, rn));
} else blk: {
break :blk sub(true, cpu, rd, cpu.r[rs], cpu.r[rn]);
break :blk sub(true, cpu, cpu.r[rs], cpu.r[rn]);
};
} else {
// ADD
cpu.r[rd] = if (I) blk: {
break :blk add(true, cpu, rd, cpu.r[rs], @as(u32, rn));
break :blk add(true, cpu, cpu.r[rs], @as(u32, rn));
} else blk: {
break :blk add(true, cpu, rd, cpu.r[rs], cpu.r[rn]);
break :blk add(true, cpu, cpu.r[rs], cpu.r[rn]);
};
}
}