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chore: dedup code in THUMB instructions

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-01-29 20:05:27 -04:00
parent bce067557f
commit ae4023e51c
8 changed files with 33 additions and 62 deletions
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14
src/cpu/thumb/format1.zig
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@@ -5,6 +5,8 @@ const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
const shifter = @import("../barrel_shifter.zig");
const setLogicOpFlags = @import("../arm/data_processing.zig").setLogicOpFlags;
pub fn format1(comptime op: u2, comptime offset: u5) InstrFn {
return struct {
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
@@ -12,17 +14,15 @@ pub fn format1(comptime op: u2, comptime offset: u5) InstrFn {
const rd = opcode & 0x7;
const result = switch (op) {
0b00 => shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rs], offset),
0b01 => shifter.logicalRight(true, &cpu.cpsr, cpu.r[rs], offset),
0b10 => shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rs], offset),
0b00 => shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rs], offset), // LSL
0b01 => shifter.logicalRight(true, &cpu.cpsr, cpu.r[rs], offset), // LSR
0b10 => shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rs], offset), // ASR
else => std.debug.panic("[CPU|THUMB|Fmt1] {} is an invalid op", .{op}),
};
// Equivalent to an ARM MOVS
cpu.r[rd] = result;
// Instructions of this type are equivalent to a MOVS
cpu.cpsr.n.write(result >> 31 & 1 == 1);
cpu.cpsr.z.write(result == 0);
setLogicOpFlags(true, cpu, result);
}
}.inner;
}