feat(cpu): implement THUMB format 9 loads / stores
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@ -25,6 +25,7 @@ const format4 = @import("cpu/thumb/format4.zig").format4;
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const format2 = @import("cpu/thumb/format2.zig").format2;
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const format2 = @import("cpu/thumb/format2.zig").format2;
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const format5 = @import("cpu/thumb/format5.zig").format5;
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const format5 = @import("cpu/thumb/format5.zig").format5;
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const format6 = @import("cpu/thumb/format6.zig").format6;
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const format6 = @import("cpu/thumb/format6.zig").format6;
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const format9 = @import("cpu/thumb/format9.zig").format9;
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const format12 = @import("cpu/thumb/format12.zig").format12;
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const format12 = @import("cpu/thumb/format12.zig").format12;
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const format15 = @import("cpu/thumb/format15.zig").format15;
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const format15 = @import("cpu/thumb/format15.zig").format15;
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const format16 = @import("cpu/thumb/format16.zig").format16;
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const format16 = @import("cpu/thumb/format16.zig").format16;
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@ -369,6 +370,14 @@ fn thumbPopulate() [0x400]ThumbInstrFn {
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lut[i] = format6(rd);
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lut[i] = format6(rd);
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}
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}
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if (i >> 7 & 0x7 == 0b011) {
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const B = i >> 6 & 1 == 1;
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const L = i >> 5 & 1 == 1;
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const offset = i & 0x1F;
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lut[i] = format9(B, L, offset);
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}
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if (i >> 6 & 0xF == 0b1010) {
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if (i >> 6 & 0xF == 0b1010) {
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const isSP = i >> 5 & 1 == 1;
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const isSP = i >> 5 & 1 == 1;
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const rd = i >> 2 & 0x7;
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const rd = i >> 2 & 0x7;
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@ -0,0 +1,36 @@
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const std = @import("std");
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
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pub fn format9(comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
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const rb = opcode >> 3 & 0x7;
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const rd = opcode & 0x7;
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if (L) {
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if (B) {
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// LDRB
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const address = cpu.r[rb] + offset;
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cpu.r[rd] = bus.read8(address);
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} else {
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// LDR
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const address = cpu.r[rb] + (@as(u32, offset) << 2);
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cpu.r[rd] = bus.read32(address & 0xFFFF_FFFC);
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}
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} else {
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if (B) {
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// STRB
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const address = cpu.r[rb] + offset;
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bus.write8(address, @truncate(u8, cpu.r[rd]));
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} else {
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// STR
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const address = cpu.r[rb] + (@as(u32, offset) << 2);
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bus.write32(address & 0xFFFF_FFFC, cpu.r[rd]);
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}
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}
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}
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}.inner;
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}
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