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fix(cpu): reimplement THUMB offset shifts

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-02-02 20:12:07 -04:00
parent 9affe01da8
commit 9fd03d2a92
1 changed files with 26 additions and 3 deletions
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29
src/cpu/thumb/format1.zig
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@ -14,9 +14,32 @@ pub fn format1(comptime op: u2, comptime offset: u5) InstrFn {
const rd = opcode & 0x7; const rd = opcode & 0x7;
const result = switch (op) { const result = switch (op) {
0b00 => shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rs], offset), // LSL 0b00 => blk: {
0b01 => shifter.logicalRight(true, &cpu.cpsr, cpu.r[rs], offset), // LSR // LSL
0b10 => shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rs], offset), // ASR if (offset == 0) {
break :blk cpu.r[rs];
} else {
break :blk shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rs], offset);
}
},
0b01 => blk: {
// LSR
if (offset == 0) {
cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
break :blk @as(u32, 0);
} else {
break :blk shifter.logicalRight(true, &cpu.cpsr, cpu.r[rs], offset);
}
},
0b10 => blk: {
// ASR
if (offset == 0) {
cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
break :blk @bitCast(u32, @bitCast(i32, cpu.r[rs]) >> 31);
} else {
break :blk shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rs], offset);
}
},
else => cpu.panic("[CPU|THUMB|Fmt1] {} is an invalid op", .{op}), else => cpu.panic("[CPU|THUMB|Fmt1] {} is an invalid op", .{op}),
}; };