feat(cpu): implement SWI
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14
src/cpu.zig
14
src/cpu.zig
@@ -15,6 +15,7 @@ const halfAndSignedDataTransfer = @import("cpu/arm/half_signed_data_transfer.zig
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const blockDataTransfer = @import("cpu/arm/block_data_transfer.zig").blockDataTransfer;
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const branch = @import("cpu/arm/branch.zig").branch;
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const branchAndExchange = @import("cpu/arm/branch.zig").branchAndExchange;
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const softwareInterrupt = @import("cpu/arm/software_interrupt.zig").softwareInterrupt;
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// THUMB Instruction Groups
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const format3 = @import("cpu/thumb/format3.zig").format3;
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@@ -95,12 +96,15 @@ pub const Arm7tdmi = struct {
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}
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pub fn setCpsr(self: *Self, value: u32) void {
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if (value & 0x1F != self.cpsr.raw & 0x1F) self.changeMode(@truncate(u5, value & 0x1F));
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if (value & 0x1F != self.cpsr.raw & 0x1F) self.changeModeFromIdx(@truncate(u5, value & 0x1F));
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self.cpsr.raw = value;
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}
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fn changeMode(self: *Self, next_idx: u5) void {
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const next = getMode(next_idx);
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fn changeModeFromIdx(self: *Self, next: u5) void {
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self.changeMode(getMode(next));
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}
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pub fn changeMode(self: *Self, next: Mode) void {
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const now = getMode(self.cpsr.mode.read());
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// Bank R8 -> r12
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@@ -142,7 +146,7 @@ pub const Arm7tdmi = struct {
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},
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}
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self.cpsr.mode.write(next_idx);
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self.cpsr.mode.write(@enumToInt(next));
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}
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pub fn skipBios(self: *Self) void {
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@@ -348,6 +352,8 @@ fn armPopulate() [0x1000]ArmInstrFn {
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const L = i >> 8 & 1 == 1;
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lut[i] = branch(L);
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}
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if (i >> 8 & 0xF == 0b1111) lut[i] = softwareInterrupt();
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}
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return lut;
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