fix(cpu): account for rn in rlist in block data transfer
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@ -11,34 +11,39 @@ pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, c
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const rn = opcode >> 16 & 0xF;
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const rn = opcode >> 16 & 0xF;
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const base = cpu.r[rn];
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const base = cpu.r[rn];
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var address: u32 = undefined;
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const in_list = opcode >> @truncate(u4, rn) & 1 == 1;
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var address: u32 = base;
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if (U) {
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if (U) {
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// Increment
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// Increment
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address = if (P) base + 4 else base;
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var i: u5 = 0;
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var i: u5 = 0;
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while (i < 0x10) : (i += 1) {
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while (i < 0x10) : (i += 1) {
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if (opcode >> i & 1 == 1) {
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if (opcode >> i & 1 == 1) {
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if (P) address += 4;
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transfer(cpu, bus, r15_present, i, address);
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transfer(cpu, bus, r15_present, i, address);
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address += 4;
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if (!P) address += 4;
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}
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}
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}
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}
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} else {
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} else {
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// Decrement
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// Decrement
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address = if (P) base - 4 else base;
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var i: u5 = 0x10;
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var i: u5 = 0x10;
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while (i > 0) : (i -= 1) {
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while (i > 0) : (i -= 1) {
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const j = i - 1;
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const j = i - 1;
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if (opcode >> j & 1 == 1) {
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if (opcode >> j & 1 == 1) {
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if (P) address -= 4;
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transfer(cpu, bus, r15_present, j, address);
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transfer(cpu, bus, r15_present, j, address);
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address -= 4;
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if (!P) address -= 4;
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}
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}
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}
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}
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}
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}
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if (W and P or !P) cpu.r[rn] = if (U) address else address + 4;
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if (W) {
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if (!L or (L and !in_list)) {
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cpu.r[rn] = address;
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}
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}
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}
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}
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fn transfer(cpu: *Arm7tdmi, bus: *Bus, r15_present: bool, i: u5, address: u32) void {
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fn transfer(cpu: *Arm7tdmi, bus: *Bus, r15_present: bool, i: u5, address: u32) void {
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