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fix: reimpl debug reads w/out throwing away *const Self

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-08-07 05:11:29 -05:00
parent 5a18b1dcc7
commit 739db99c83
6 changed files with 155 additions and 76 deletions
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166
src/core/Bus.zig
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@@ -77,70 +77,29 @@ pub fn attach(self: *Self, cpu: *Arm7tdmi) void {
self.cpu = cpu;
}
pub fn debugRead(self: *const Self, comptime T: type, address: u32) T {
const cached = self.sched.tick;
defer self.sched.tick = cached;
// FIXME: This is bad but it's a debug read so I don't care that much?
const this = @intToPtr(*Self, @ptrToInt(self));
return this.read(T, address);
}
fn readOpenBus(self: *const Self, comptime T: type, address: u32) T {
const r15 = self.cpu.?.r[15];
const word = if (self.cpu.?.cpsr.t.read()) blk: {
const page = @truncate(u8, r15 >> 24);
switch (page) {
// EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
0x02, 0x05, 0x06, 0x08...0x0D => {
const halfword = self.debugRead(u16, r15 + 2);
break :blk @as(u32, halfword) << 16 | halfword;
},
// BIOS or OAM (32-bit)
0x00, 0x07 => {
const offset: u32 = if (address & 3 == 0b00) 2 else 0;
break :blk @as(u32, self.debugRead(u16, (r15 + 2) + offset)) << 16 | self.debugRead(u16, r15 + offset);
},
// IWRAM (16-bit but special)
0x03 => {
const offset: u32 = if (address & 3 == 0b00) 2 else 0;
break :blk @as(u32, self.debugRead(u16, (r15 + 2) - offset)) << 16 | self.debugRead(u16, r15 + offset);
},
else => unreachable,
}
} else self.debugRead(u32, r15 + 4);
return @truncate(T, rotr(u32, word, 8 * (address & 3)));
}
fn readBios(self: *Self, comptime T: type, address: u32) T {
if (address < Bios.size) return self.bios.checkedRead(T, self.cpu.?.r[15], alignAddress(T, address));
return self.readOpenBus(T, address);
}
pub fn read(self: *Self, comptime T: type, address: u32) T {
pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
const page = @truncate(u8, address >> 24);
const align_addr = alignAddress(T, address);
defer self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
const aligned_addr = forceAlign(T, address);
return switch (page) {
// General Internal Memory
0x00 => self.readBios(T, address),
0x02 => self.ewram.read(T, align_addr),
0x03 => self.iwram.read(T, align_addr),
0x04 => io.read(self, T, align_addr),
0x00 => blk: {
if (address < Bios.size)
break :blk self.bios.dbgRead(T, self.cpu.?.r[15], aligned_addr);
break :blk self.readOpenBus(T, address);
},
0x02 => self.ewram.read(T, aligned_addr),
0x03 => self.iwram.read(T, aligned_addr),
0x04 => io.read(self, T, aligned_addr),
// Internal Display Memory
0x05 => self.ppu.palette.read(T, align_addr),
0x06 => self.ppu.vram.read(T, align_addr),
0x07 => self.ppu.oam.read(T, align_addr),
0x05 => self.ppu.palette.read(T, aligned_addr),
0x06 => self.ppu.vram.read(T, aligned_addr),
0x07 => self.ppu.oam.read(T, aligned_addr),
// External Memory (Game Pak)
0x08...0x0D => self.pak.read(T, align_addr),
0x08...0x0D => self.pak.dbgRead(T, aligned_addr),
0x0E...0x0F => blk: {
const value = self.pak.backup.read(address);
@@ -153,29 +112,100 @@ pub fn read(self: *Self, comptime T: type, address: u32) T {
break :blk @as(T, value) * multiplier;
},
else => readOpenBus(self, T, address),
else => self.readOpenBus(T, address),
};
}
fn readOpenBus(self: *const Self, comptime T: type, address: u32) T {
const r15 = self.cpu.?.r[15];
const word = if (self.cpu.?.cpsr.t.read()) blk: {
const page = @truncate(u8, r15 >> 24);
switch (page) {
// EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
0x02, 0x05, 0x06, 0x08...0x0D => {
const halfword = self.dbgRead(u16, r15 + 2);
break :blk @as(u32, halfword) << 16 | halfword;
},
// BIOS or OAM (32-bit)
0x00, 0x07 => {
const offset: u32 = if (address & 3 == 0b00) 2 else 0;
break :blk @as(u32, self.dbgRead(u16, (r15 + 2) + offset)) << 16 | self.dbgRead(u16, r15 + offset);
},
// IWRAM (16-bit but special)
0x03 => {
const offset: u32 = if (address & 3 == 0b00) 2 else 0;
break :blk @as(u32, self.dbgRead(u16, (r15 + 2) - offset)) << 16 | self.dbgRead(u16, r15 + offset);
},
else => unreachable,
}
} else self.dbgRead(u32, r15 + 4);
return @truncate(T, rotr(u32, word, 8 * (address & 3)));
}
pub fn read(self: *Self, comptime T: type, address: u32) T {
const page = @truncate(u8, address >> 24);
const aligned_addr = forceAlign(T, address);
self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
return switch (page) {
// General Internal Memory
0x00 => blk: {
if (address < Bios.size)
break :blk self.bios.read(T, self.cpu.?.r[15], aligned_addr);
break :blk self.readOpenBus(T, address);
},
0x02 => self.ewram.read(T, aligned_addr),
0x03 => self.iwram.read(T, aligned_addr),
0x04 => io.read(self, T, aligned_addr),
// Internal Display Memory
0x05 => self.ppu.palette.read(T, aligned_addr),
0x06 => self.ppu.vram.read(T, aligned_addr),
0x07 => self.ppu.oam.read(T, aligned_addr),
// External Memory (Game Pak)
0x08...0x0D => self.pak.read(T, aligned_addr),
0x0E...0x0F => blk: {
const value = self.pak.backup.read(address);
const multiplier = switch (T) {
u32 => 0x01010101,
u16 => 0x0101,
u8 => 1,
else => @compileError("Backup: Unsupported read width"),
};
break :blk @as(T, value) * multiplier;
},
else => self.readOpenBus(T, address),
};
}
pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
const page = @truncate(u8, address >> 24);
const align_addr = alignAddress(T, address);
defer self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
const aligned_addr = forceAlign(T, address);
self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
switch (page) {
// General Internal Memory
0x00 => self.bios.write(T, align_addr, value),
0x02 => self.ewram.write(T, align_addr, value),
0x03 => self.iwram.write(T, align_addr, value),
0x04 => io.write(self, T, align_addr, value),
0x00 => self.bios.write(T, aligned_addr, value),
0x02 => self.ewram.write(T, aligned_addr, value),
0x03 => self.iwram.write(T, aligned_addr, value),
0x04 => io.write(self, T, aligned_addr, value),
// Internal Display Memory
0x05 => self.ppu.palette.write(T, align_addr, value),
0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, align_addr, value),
0x07 => self.ppu.oam.write(T, align_addr, value),
0x05 => self.ppu.palette.write(T, aligned_addr, value),
0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, aligned_addr, value),
0x07 => self.ppu.oam.write(T, aligned_addr, value),
// External Memory (Game Pak)
0x08...0x0D => self.pak.write(T, self.dma[3].word_count, align_addr, value),
0x08...0x0D => self.pak.write(T, self.dma[3].word_count, aligned_addr, value),
0x0E...0x0F => {
const rotate_by = switch (T) {
u32 => address & 3,
@@ -190,7 +220,7 @@ pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
}
}
fn alignAddress(comptime T: type, address: u32) u32 {
fn forceAlign(comptime T: type, address: u32) u32 {
return switch (T) {
u32 => address & 0xFFFF_FFFC,
u16 => address & 0xFFFF_FFFE,