feat: target Zig v2024.1.0-mach

.gitmodules

@@ -4,6 +4,3 @@
 [submodule "lib/zgui"]
 	path = lib/zgui
 	url = https://git.musuka.dev/paoda/zgui
-[submodule "lib/zba-gdbstub"]
-	path = lib/zba-gdbstub
-	url = https://git.musuka.dev/paoda/zba-gdbstub

build.zig

@@ -1,16 +1,17 @@
 const std = @import("std");
 const builtin = @import("builtin");
 
-const Sdk = @import("lib/SDL.zig/Sdk.zig");
+const Sdk = @import("lib/SDL.zig/build.zig");
 const zgui = @import("lib/zgui/build.zig");
-const gdbstub = @import("lib/zba-gdbstub/build.zig");
+
+const SemVer = std.SemanticVersion;
+
+const expected_zig_version = "0.12.0-dev.2063+804cee3b9";
 
 pub fn build(b: *std.Build) void {
-    // Minimum Zig Version
+    const attempted_zig_version = builtin.zig_version;
-    const min_ver = std.SemanticVersion.parse("0.11.0") catch return; // https://github.com/ziglang/zig/tree/0.11.0
+    if (comptime attempted_zig_version.order(SemVer.parse(expected_zig_version) catch unreachable) != .eq) {
-    if (builtin.zig_version.order(min_ver).compare(.lt)) {
+        @compileError("ZBA must be built with Zig v" ++ expected_zig_version ++ ".");
-        std.log.err("{s}", .{b.fmt("Zig v{} does not meet the minimum version requirement. (Zig v{})", .{ builtin.zig_version, min_ver })});
-        std.os.exit(1);
     }
 
     const target = b.standardTargetOptions(.{});
@@ -22,42 +23,36 @@ pub fn build(b: *std.Build) void {
         .target = target,
         .optimize = optimize,
     });
-    exe.main_pkg_path = .{ .path = "." }; // Necessary so that src/main.zig can embed example.toml
 
-    exe.addModule("known_folders", b.dependency("known-folders", .{}).module("known-folders")); // https://github.com/ziglibs/known-folders
+    exe.root_module.addImport("known_folders", b.dependency("known-folders", .{}).module("known-folders")); // https://github.com/ziglibs/known-folders
-    exe.addModule("datetime", b.dependency("zig-datetime", .{}).module("zig-datetime")); // https://github.com/frmdstryr/zig-datetime
+    exe.root_module.addImport("datetime", b.dependency("zig-datetime", .{}).module("zig-datetime")); // https://github.com/frmdstryr/zig-datetime
-    exe.addModule("clap", b.dependency("zig-clap", .{}).module("clap")); // https://github.com/Hejsil/zig-clap
+    exe.root_module.addImport("clap", b.dependency("zig-clap", .{}).module("clap")); // https://github.com/Hejsil/zig-clap
-    exe.addModule("zba-util", b.dependency("zba-util", .{}).module("zba-util")); // https://git.musuka.dev/paoda/zba-util
+    exe.root_module.addImport("zba-util", b.dependency("zba-util", .{}).module("zba-util")); // https://git.musuka.dev/paoda/zba-util
-    exe.addModule("tomlz", b.dependency("tomlz", .{}).module("tomlz")); // https://github.com/mattyhall/tomlz
+    exe.root_module.addImport("tomlz", b.dependency("tomlz", .{}).module("tomlz")); // https://github.com/mattyhall/tomlz
-    exe.addModule("arm32", b.dependency("arm32", .{}).module("arm32")); // https://git.musuka.dev/paoda/arm32
+    exe.root_module.addImport("arm32", b.dependency("arm32", .{}).module("arm32")); // https://git.musuka.dev/paoda/arm32
+    exe.root_module.addImport("gdbstub", b.dependency("zba-gdbstub", .{}).module("gdbstub")); // https://git.musuka.dev/paoda/gdbstub
+    exe.root_module.addImport("nfd", b.dependency("nfd", .{}).module("nfd")); // https://github.com/fabioarnold/nfd-zig
 
-    exe.addModule("gdbstub", gdbstub.module(b)); // https://git.musuka.dev/paoda/gdbstub
+    exe.root_module.addAnonymousImport("bitfield", .{ .root_source_file = .{ .path = "lib/bitfield.zig" } }); // https://github.com/FlorenceOS/
-
+    exe.root_module.addAnonymousImport("gl", .{ .root_source_file = .{ .path = "lib/gl.zig" } }); // https://github.com/MasterQ32/zig-opengl
-    // https://github.com/fabioarnold/nfd-zig
+    exe.root_module.addAnonymousImport("example.toml", .{ .root_source_file = .{ .path = "example.toml" } });
-    const nfd_dep = b.dependency("nfd", .{ .target = target, .optimize = optimize });
-    exe.linkLibrary(nfd_dep.artifact("nfd"));
-    exe.addModule("nfd", nfd_dep.module("nfd"));
 
     // https://github.com/MasterQ32/SDL.zig
     const sdk = Sdk.init(b, null);
-    sdk.link(exe, .dynamic);
+    sdk.link(exe, .static);
-    exe.addModule("sdl2", sdk.getNativeModule());
+    exe.root_module.addImport("sdl2", sdk.getNativeModule());
 
     // https://git.musuka.dev/paoda/zgui
     // .shared option should stay in sync with SDL.zig call above where true == .dynamic, and false == .static
-    const zgui_pkg = zgui.package(b, target, optimize, .{ .options = .{ .backend = .sdl2_opengl3, .shared = true } });
+    const zgui_pkg = zgui.package(b, target, optimize, .{ .options = .{ .backend = .sdl2_opengl3 } });
     zgui_pkg.link(exe);
-
+    sdk.link(zgui_pkg.zgui_c_cpp, .static);
-    exe.addAnonymousModule("bitfield", .{ .source_file = .{ .path = "lib/bitfield.zig" } }); // https://github.com/FlorenceOS/
-    exe.addAnonymousModule("gl", .{ .source_file = .{ .path = "lib/gl.zig" } }); // https://github.com/MasterQ32/zig-opengl
 
     b.installArtifact(exe);
 
     const run_cmd = b.addRunArtifact(exe);
     run_cmd.step.dependOn(b.getInstallStep());
-    if (b.args) |args| {
+    if (b.args) |args| run_cmd.addArgs(args);
-        run_cmd.addArgs(args);
-    }
 
     const run_step = b.step("run", "Run the app");
     run_step.dependOn(&run_cmd.step);

build.zig.zon

@@ -1,34 +1,45 @@
 .{
     .name = "zba",
     .version = "0.1.0",
+    .paths = .{
+        "build.zig",
+        "build.zig.zon",
+        "lib/bitfield.zig",
+        "lib/gl.zig",
+        "src",
+    },
     .dependencies = .{
         .nfd = .{
-            .url = "https://github.com/paoda/nfd-zig/archive/3333a86186a0cb9fbf57823ac416aa77d472db61.tar.gz",
+            .url = "https://github.com/paoda/nfd-zig/archive/edc6a5df2642fdd614d5912faa30ba3f47256a2d.tar.gz",
-            .hash = "12201079ca80d9a7cfe9f2f3ffe4d5e92627a48dfdec5dd3c8cf9a1609f746a9e17f",
+            .hash = "122081c6edcc75a92b408cf6b5255b5a6195b0119b22c019dbd7b8a820c0427a0ff4",
         },
         .@"known-folders" = .{
-            .url = "https://github.com/ziglibs/known-folders/archive/fa75e1bc672952efa0cf06160bbd942b47f6d59b.tar.gz",
+            .url = "https://github.com/ziglibs/known-folders/archive/806ba01b872820004c7dec3117cb0db66b206af6.tar.gz",
-            .hash = "122048992ca58a78318b6eba4f65c692564be5af3b30fbef50cd4abeda981b2e7fa5",
+            .hash = "122094b48dea08e241b48d0ec32e3df6965e814091e3cabaff942e62d053f3ff9b5f",
         },
         .@"zig-datetime" = .{
-            .url = "https://github.com/frmdstryr/zig-datetime/archive/ddecb4e508e99ad6ab1314378225413959d54756.tar.gz",
+            .url = "https://github.com/frmdstryr/zig-datetime/archive/a9c75242dfc119a305c1381c2352d2fc16b2e0aa.tar.gz",
-            .hash = "12202cbb909feb6b09164ac997307c6b1ab35cb05a846198cf41f7ec608d842c1761",
+            .hash = "122038b4b5df08d2af6daf81e5f18d4c244d807c9323224db826cc107ce3894f6fa9",
         },
         .@"zig-clap" = .{
-            .url = "https://github.com/Hejsil/zig-clap/archive/f49b94700e0761b7514abdca0e4f0e7f3f938a93.tar.gz",
+            .url = "https://github.com/Hejsil/zig-clap/archive/4267b0b60ef6f87cccf3ee6ed481e6d0759180c6.tar.gz",
-            .hash = "1220f48518ce22882e102255ed3bcdb7aeeb4891f50b2cdd3bd74b5b2e24d3149ba2",
+            .hash = "12202fa30d679d821292bcd953458b9e76097a5d16999489125a206db63a53392833",
         },
         .@"zba-util" = .{
-            .url = "https://git.musuka.dev/paoda/zba-util/archive/14ea006f4ffae77a333de4993c89690ce94d4abc.tar.gz",
+            .url = "https://git.musuka.dev/paoda/zba-util/archive/78b944a98f18592512241f71ca2267ef951c82e1.tar.gz",
-            .hash = "1220f0d7c5802ae0a297844f96b2226ccc3d4d895277278e4345c3660161debbe85d",
+            .hash = "12207da7e1f5d6180666db9575f84373055b230cb4259a4b6310562293338dc10b9d",
+        },
+        .@"zba-gdbstub" = .{
+            .url = "https://git.musuka.dev/paoda/zba-gdbstub/archive/8c3a166a5daa453c3627dda42bc169c20a470c68.tar.gz",
+            .hash = "12201dd0f0ae0c9efc8928aedd6970738f146675b2b9cbe8190177e37d1d849a6b6d",
         },
         .tomlz = .{
-            .url = "https://github.com/mattyhall/tomlz/archive/47067cd7c902485f7d6e928331fd171ed47f72da.tar.gz",
+            .url = "https://github.com/paoda/tomlz/archive/f0aebccc31d48a131e57108cb05c8acfe4991eb8.tar.gz",
-            .hash = "12205771687a4d42700c515ef32e4fadb8b4dbf9e3f941b0a0e6f8bde5ef6dbc27d6",
+            .hash = "1220b6e2dd6770580a04acc513cbffef4275801a02a1914f388965e910305d8e2b9b",
         },
         .arm32 = .{
-            .url = "https://git.musuka.dev/paoda/arm32/archive/ba22b856ecb3bd6fc43530dddf6ee79b4b458b30.tar.gz",
+            .url = "https://git.musuka.dev/paoda/arm32/archive/6f0e27136072610e6dba97ff8aaf5e2ec86e2c09.tar.gz",
-            .hash = "1220f1cc3e23804eff5c68b93a4e77d948a9cfc3492d799d39f769d8c79b7c41d83e",
+            .hash = "122047d0affe12b9e9e9c655a7ba6d51b311f02d688e9f1c9a91394a03103f1c0cd5",
         },
     },
 }

lib/SDL.zig

@@ -1 +1 @@
-Subproject commit 602aeb7f1d33da71626aff54a25ef69fef7c613b
+Subproject commit 6d42434c4d92efb1199d58f821edb7f701812f7e

lib/zba-gdbstub

@@ -1 +0,0 @@
-Subproject commit 479319e7cad78c3fd38b6865c56e9fe9e78d495c

lib/zgui

@@ -1 +1 @@
-Subproject commit ca27a472249a70dd1e94fb94f05f26dd931363fb
+Subproject commit 1fff275f8d322d44355a08f2eac3e7c4905fc382

src/core/apu/signal/Wave.zig

@@ -18,7 +18,7 @@ pub fn read(self: *const Self, comptime T: type, nr30: io.WaveSelect, addr: u32)
     const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Read from the Opposite Bank in Use
 
     const i = base + addr - 0x0400_0090;
-    return std.mem.readIntSliceLittle(T, self.buf[i..][0..@sizeOf(T)]);
+    return std.mem.readInt(T, self.buf[i..][0..@sizeOf(T)], .little);
 }
 
 pub fn write(self: *Self, comptime T: type, nr30: io.WaveSelect, addr: u32, value: T) void {
@@ -26,7 +26,7 @@ pub fn write(self: *Self, comptime T: type, nr30: io.WaveSelect, addr: u32, valu
     const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Write to the Opposite Bank in Use
 
     const i = base + addr - 0x0400_0090;
-    std.mem.writeIntSliceLittle(T, self.buf[i..][0..@sizeOf(T)], value);
+    std.mem.writeInt(T, self.buf[i..][0..@sizeOf(T)], value, .little);
 }
 
 pub fn init(sched: *Scheduler) Self {

src/core/bus/Bios.zig

@@ -51,7 +51,7 @@ fn _read(self: *const Self, comptime T: type, addr: u32) T {
     const buf = self.buf orelse std.debug.panic("[BIOS] ZBA tried to read {} from 0x{X:0>8} but not BIOS was present", .{ T, addr });
 
     return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, buf[addr..][0..@sizeOf(T)]),
+        u32, u16, u8 => std.mem.readInt(T, buf[addr..][0..@sizeOf(T)], .little),
         else => @compileError("BIOS: Unsupported read width"),
     };
 }

src/core/bus/Ewram.zig

@@ -11,7 +11,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
     const addr = address & 0x3FFFF;
 
     return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
+        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
         else => @compileError("EWRAM: Unsupported read width"),
     };
 }
@@ -20,7 +20,7 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
     const addr = address & 0x3FFFF;
 
     return switch (T) {
-        u32, u16, u8 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
+        u32, u16, u8 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
         else => @compileError("EWRAM: Unsupported write width"),
     };
 }

src/core/bus/Iwram.zig

@@ -11,7 +11,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
     const addr = address & 0x7FFF;
 
     return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
+        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
         else => @compileError("IWRAM: Unsupported read width"),
     };
 }
@@ -20,7 +20,7 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
     const addr = address & 0x7FFF;
 
     return switch (T) {
-        u32, u16, u8 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
+        u32, u16, u8 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
         else => @compileError("IWRAM: Unsupported write width"),
     };
 }

src/core/bus/backup/eeprom.zig

@@ -121,7 +121,7 @@ pub const Eeprom = struct {
                     .Large => {
                         if (self.writer.len() == 14) {
                             const addr: u10 = @intCast(self.writer.finish());
-                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
+                            const value = std.mem.readInt(u64, buf[@as(u13, addr) * 8 ..][0..8], .little);
 
                             self.reader.configure(value);
                             self.state = .RequestEnd;
@@ -131,7 +131,7 @@ pub const Eeprom = struct {
                         if (self.writer.len() == 6) {
                             // FIXME: Duplicated code from above
                             const addr: u6 = @intCast(self.writer.finish());
-                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
+                            const value = std.mem.readInt(u64, buf[@as(u13, addr) * 8 ..][0..8], .little);
 
                             self.reader.configure(value);
                             self.state = .RequestEnd;
@@ -159,7 +159,7 @@ pub const Eeprom = struct {
             },
             .WriteTransfer => {
                 if (self.writer.len() == 64) {
-                    std.mem.writeIntSliceLittle(u64, buf[self.addr * 8 ..][0..8], self.writer.finish());
+                    std.mem.writeInt(u64, buf[self.addr * 8 ..][0..8], self.writer.finish(), .little);
                     self.state = .RequestEnd;
                 }
             },

src/core/bus/io.zig

@@ -382,7 +382,7 @@ pub const KeyInput = extern union {
 
 const AtomicKeyInput = struct {
     const Self = @This();
-    const Ordering = std.atomic.Ordering;
+    const AtomicOrder = std.builtin.AtomicOrder;
 
     inner: KeyInput,
 
@@ -390,18 +390,18 @@ const AtomicKeyInput = struct {
         return .{ .inner = value };
     }
 
-    pub inline fn load(self: *const Self, comptime ordering: Ordering) u16 {
+    pub inline fn load(self: *const Self, comptime ordering: AtomicOrder) u16 {
         return switch (ordering) {
             .AcqRel, .Release => @compileError("not supported for atomic loads"),
             else => @atomicLoad(u16, &self.inner.raw, ordering),
         };
     }
 
-    pub inline fn fetchOr(self: *Self, value: u16, comptime ordering: Ordering) void {
+    pub inline fn fetchOr(self: *Self, value: u16, comptime ordering: AtomicOrder) void {
         _ = @atomicRmw(u16, &self.inner.raw, .Or, value, ordering);
     }
 
-    pub inline fn fetchAnd(self: *Self, value: u16, comptime ordering: Ordering) void {
+    pub inline fn fetchAnd(self: *Self, value: u16, comptime ordering: AtomicOrder) void {
         _ = @atomicRmw(u16, &self.inner.raw, .And, value, ordering);
     }
 };

src/core/emu.zig

@@ -14,7 +14,7 @@ const isHalted = @import("cpu_util.zig").isHalted;
 const Timer = std.time.Timer;
 
 pub const Synchro = struct {
-    const AtomicBool = std.atomic.Atomic(bool);
+    const AtomicBool = std.atomic.Value(bool);
 
     // FIXME: This Enum ends up being really LARGE!!!
     pub const Message = union(enum) {
@@ -229,6 +229,49 @@ pub const EmuThing = struct {
     const Interface = @import("gdbstub").Emulator;
     const Allocator = std.mem.Allocator;
 
+    pub const target =
+        \\<target version="1.0">
+        \\    <architecture>armv4t</architecture>
+        \\    <feature name="org.gnu.gdb.arm.core">
+        \\        <reg name="r0" bitsize="32" type="uint32"/>
+        \\        <reg name="r1" bitsize="32" type="uint32"/>
+        \\        <reg name="r2" bitsize="32" type="uint32"/>
+        \\        <reg name="r3" bitsize="32" type="uint32"/>
+        \\        <reg name="r4" bitsize="32" type="uint32"/>
+        \\        <reg name="r5" bitsize="32" type="uint32"/>
+        \\        <reg name="r6" bitsize="32" type="uint32"/>
+        \\        <reg name="r7" bitsize="32" type="uint32"/>
+        \\        <reg name="r8" bitsize="32" type="uint32"/>
+        \\        <reg name="r9" bitsize="32" type="uint32"/>
+        \\        <reg name="r10" bitsize="32" type="uint32"/>
+        \\        <reg name="r11" bitsize="32" type="uint32"/>
+        \\        <reg name="r12" bitsize="32" type="uint32"/>
+        \\        <reg name="sp" bitsize="32" type="data_ptr"/>
+        \\        <reg name="lr" bitsize="32"/>
+        \\        <reg name="pc" bitsize="32" type="code_ptr"/>
+        \\
+        \\        <reg name="cpsr" bitsize="32" regnum="25"/>
+        \\    </feature>
+        \\</target>
+    ;
+
+    // Game Pak SRAM isn't included
+    // TODO: Can i be more specific here?
+    pub const map =
+        \\ <memory-map version="1.0">
+        \\     <memory type="rom" start="0x00000000" length="0x00004000"/>
+        \\     <memory type="ram" start="0x02000000" length="0x00040000"/>
+        \\     <memory type="ram" start="0x03000000" length="0x00008000"/>
+        \\     <memory type="ram" start="0x04000000" length="0x00000400"/>
+        \\     <memory type="ram" start="0x05000000" length="0x00000400"/>
+        \\     <memory type="ram" start="0x06000000" length="0x00018000"/>
+        \\     <memory type="ram" start="0x07000000" length="0x00000400"/>
+        \\     <memory type="rom" start="0x08000000" length="0x02000000"/>
+        \\     <memory type="rom" start="0x0A000000" length="0x02000000"/>
+        \\     <memory type="rom" start="0x0C000000" length="0x02000000"/>
+        \\ </memory-map>
+    ;
+
     cpu: *Arm7tdmi,
     scheduler: *Scheduler,
 

src/core/ppu/Oam.zig

@@ -12,7 +12,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
     const addr = address & 0x3FF;
 
     return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
+        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
         else => @compileError("OAM: Unsupported read width"),
     };
 }
@@ -21,7 +21,7 @@ pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
     const addr = address & 0x3FF;
 
     switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
+        u32, u16 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
         u8 => return, // 8-bit writes are explicitly ignored
         else => @compileError("OAM: Unsupported write width"),
     }

src/core/ppu/Palette.zig

@@ -12,7 +12,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
     const addr = address & 0x3FF;
 
     return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
+        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
         else => @compileError("PALRAM: Unsupported read width"),
     };
 }
@@ -21,10 +21,10 @@ pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
     const addr = address & 0x3FF;
 
     switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
+        u32, u16 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
         u8 => {
             const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
-            std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
+            std.mem.writeInt(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101, .little);
         },
         else => @compileError("PALRAM: Unsupported write width"),
     }
@@ -47,5 +47,5 @@ pub fn deinit(self: *Self) void {
 }
 
 pub inline fn backdrop(self: *const Self) u16 {
-    return std.mem.readIntNative(u16, self.buf[0..2]);
+    return std.mem.readInt(u16, self.buf[0..2], .little);
 }

src/core/ppu/Vram.zig

@@ -13,7 +13,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
     const addr = Self.mirror(address);
 
     return switch (T) {
-        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
+        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
         else => @compileError("VRAM: Unsupported read width"),
     };
 }
@@ -23,7 +23,7 @@ pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address:
     const idx = Self.mirror(address);
 
     switch (T) {
-        u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
+        u32, u16 => std.mem.writeInt(T, self.buf[idx..][0..@sizeOf(T)], value, .little),
         u8 => {
             // Ignore write if it falls within the boundaries of OBJ VRAM
             switch (mode) {
@@ -32,7 +32,7 @@ pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address:
             }
 
             const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
-            std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
+            std.mem.writeInt(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101, .little);
         },
         else => @compileError("VRAM: Unsupported write width"),
     }

src/main.zig

@@ -61,7 +61,8 @@ pub fn main() void {
     defer allocator.free(config_path);
 
     // Parse CLI
-    const result = clap.parse(clap.Help, &params, clap.parsers.default, .{}) catch |e| exitln("failed to parse cli: {}", .{e});
+
+    const result = clap.parse(clap.Help, &params, clap.parsers.default, .{ .allocator = allocator }) catch |e| exitln("failed to parse cli: {}", .{e});
     defer result.deinit();
 
     // TODO: Move config file to XDG Config directory?
@@ -101,8 +102,8 @@ pub fn main() void {
 
     var bus: Bus = undefined;
 
-    var ischeduler = IScheduler.init(&scheduler);
+    const ischeduler = IScheduler.init(&scheduler);
-    var ibus = IBus.init(&bus);
+    const ibus = IBus.init(&bus);
 
     var cpu = Arm7tdmi.init(ischeduler, ibus);
 
@@ -132,7 +133,10 @@ pub fn main() void {
 
         log.info("Ready to connect", .{});
 
-        var server = Server.init(emulator) catch |e| exitln("failed to init gdb server: {}", .{e});
+        var server = Server.init(
+            emulator,
+            .{ .memory_map = EmuThing.map, .target = EmuThing.target },
+        ) catch |e| exitln("failed to init gdb server: {}", .{e});
         defer server.deinit(allocator);
 
         log.info("Starting GDB Server Thread", .{});
@@ -193,7 +197,7 @@ fn configFilePath(allocator: Allocator, config_path: []const u8) ![]const u8 {
         const config_file = std.fs.createFileAbsolute(path, .{}) catch |err| exitln("failed to create \"{s}\": {}", .{ path, err });
         defer config_file.close();
 
-        try config_file.writeAll(@embedFile("../example.toml"));
+        try config_file.writeAll(@embedFile("example.toml"));
     };
 
     return path;

src/util.zig

@@ -11,13 +11,13 @@ pub const FpsTracker = struct {
     const Self = @This();
 
     fps: u32,
-    count: std.atomic.Atomic(u32),
+    count: std.atomic.Value(u32),
     timer: std.time.Timer,
 
     pub fn init() Self {
         return .{
             .fps = 0,
-            .count = std.atomic.Atomic(u32).init(0),
+            .count = std.atomic.Value(u32).init(0),
             .timer = std.time.Timer.start() catch unreachable,
         };
     }