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chore: reimplement bus read/writes

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-10-21 05:12:33 -03:00
parent 886b9abf3d
commit 601e717850
11 changed files with 130 additions and 166 deletions
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181
src/Bus.zig
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@@ -54,136 +54,91 @@ pub fn deinit(self: Self) void {
self.ppu.deinit();
}
pub fn read32(self: *const Self, address: u32) u32 {
const align_addr = address & 0xFFFF_FFFC; // Force Aligned
pub fn read(self: *const Self, comptime T: type, address: u32) T {
const page = @truncate(u8, address >> 24);
const align_addr = alignAddress(T, address);
return switch (address) {
return switch (page) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.read(u32, align_addr),
0x0200_0000...0x02FF_FFFF => self.ewram.read(u32, align_addr),
0x0300_0000...0x03FF_FFFF => self.iwram.read(u32, align_addr),
0x0400_0000...0x0400_03FE => io.read32(self, align_addr),
// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u32, align_addr),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u32, align_addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u32, align_addr),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.read(u32, align_addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.read(u32, align_addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.read(u32, align_addr),
0x0E00_0000...0x0FFF_FFFF => @as(u32, self.pak.backup.read(address)) * 0x01010101,
else => undRead("Tried to read from 0x{X:0>8}", .{address}),
};
}
pub fn write32(self: *Self, address: u32, word: u32) void {
const align_addr = address & 0xFFFF_FFFC; // Force Aligned
switch (address) {
// General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.write(u32, align_addr, word),
0x0300_0000...0x03FF_FFFF => self.iwram.write(u32, align_addr, word),
0x0400_0000...0x0400_03FE => io.write32(self, align_addr, word),
// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u32, align_addr, word),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u32, align_addr, word),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u32, align_addr, word),
0x0E00_0000...0x0FFF_FFFF => self.pak.backup.write(address, @truncate(u8, rotr(u32, word, 8 * (address & 3)))),
else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, address }),
}
}
pub fn read16(self: *const Self, address: u32) u16 {
const align_addr = address & 0xFFFF_FFFE; // Force Aligned
return switch (address) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.read(u16, align_addr),
0x0200_0000...0x02FF_FFFF => self.ewram.read(u16, align_addr),
0x0300_0000...0x03FF_FFFF => self.iwram.read(u16, align_addr),
0x0400_0000...0x0400_03FE => io.read16(self, align_addr),
// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u16, align_addr),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u16, align_addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u16, align_addr),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.read(u16, align_addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.read(u16, align_addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.read(u16, align_addr),
0x0E00_0000...0x0FFF_FFFF => @as(u16, self.pak.backup.read(address)) * 0x0101,
else => undRead("Tried to read from 0x{X:0>8}", .{address}),
};
}
pub fn write16(self: *Self, address: u32, halfword: u16) void {
const align_addr = address & 0xFFFF_FFFE;
switch (address) {
// General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.write(u16, align_addr, halfword),
0x0300_0000...0x03FF_FFFF => self.iwram.write(u16, align_addr, halfword),
0x0400_0000...0x0400_03FE => io.write16(self, align_addr, halfword),
// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u16, align_addr, halfword),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u16, align_addr, halfword),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u16, align_addr, halfword),
0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}),
// External Memory (Game Pak)
0x0E00_0000...0x0FFF_FFFF => {
self.pak.backup.write(address, @truncate(u8, rotr(u16, halfword, 8 * (address & 1))));
0x00 => self.bios.read(T, align_addr),
0x02 => self.ewram.read(T, align_addr),
0x03 => self.iwram.read(T, align_addr),
0x04 => switch (T) {
u32 => io.read32(self, align_addr),
u16 => io.read16(self, align_addr),
u8 => io.read8(self, align_addr),
else => @compileError("I/O: Unsupported read width"),
},
else => undWrite("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, address }),
}
}
pub fn read8(self: *const Self, address: u32) u8 {
return switch (address) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.read(u8, address),
0x0200_0000...0x02FF_FFFF => self.ewram.read(u8, address),
0x0300_0000...0x03FF_FFFF => self.iwram.read(u8, address),
0x0400_0000...0x0400_03FE => io.read8(self, address),
// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u8, address),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u8, address),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u8, address),
0x05 => self.ppu.palette.read(T, align_addr),
0x06 => self.ppu.vram.read(T, align_addr),
0x07 => self.ppu.oam.read(T, align_addr),
// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.read(u8, address),
0x0A00_0000...0x0BFF_FFFF => self.pak.read(u8, address),
0x0C00_0000...0x0DFF_FFFF => self.pak.read(u8, address),
0x0E00_0000...0x0FFF_FFFF => self.pak.backup.read(address),
0x08...0x0D => self.pak.read(T, align_addr),
0x0E...0x0F => blk: {
const value = self.pak.backup.read(address);
else => undRead("Tried to read from 0x{X:0>2}", .{address}),
const multiplier = switch (T) {
u32 => 0x01010101,
u16 => 0x0101,
u8 => 1,
else => @compileError("Backup: Unsupported read width"),
};
break :blk @as(T, value) * multiplier;
},
else => undRead("Tried to read {} from 0x{X:0>8}", .{ T, address }),
};
}
pub fn write8(self: *Self, address: u32, byte: u8) void {
switch (address) {
pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
const page = @truncate(u8, address >> 24);
const align_addr = alignAddress(T, address);
switch (page) {
// General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.write(u8, address, byte),
0x0300_0000...0x03FF_FFFF => self.iwram.write(u8, address, byte),
0x0400_0000...0x0400_03FE => io.write8(self, address, byte),
0x0400_0410 => log.info("Ignored write of 0x{X:0>2} to 0x{X:0>8}", .{ byte, address }),
0x00 => self.bios.write(T, align_addr, value),
0x02 => self.ewram.write(T, align_addr, value),
0x03 => self.iwram.write(T, align_addr, value),
0x04 => switch (T) {
u32 => io.write32(self, align_addr, value),
u16 => io.write16(self, align_addr, value),
u8 => io.write8(self, align_addr, value),
else => @compileError("I/O: Unsupported write width"),
},
// Internal Display Memory
0x05 => self.ppu.palette.write(T, align_addr, value),
0x06 => self.ppu.vram.write(T, align_addr, value),
0x07 => self.ppu.oam.write(T, align_addr, value),
// External Memory (Game Pak)
0x0E00_0000...0x0FFF_FFFF => self.pak.backup.write(address, byte),
else => undWrite("Tried to write 0x{X:0>2} to 0x{X:0>8}", .{ byte, address }),
0x08...0x0D => {},
0x0E...0x0F => {
const rotate_by = switch (T) {
u32 => address & 3,
u16 => address & 1,
u8 => 0,
else => @compileError("Backup: Unsupported write width"),
};
self.pak.backup.write(address, @truncate(u8, rotr(T, value, 8 * rotate_by)));
},
else => undWrite("Tried to write {} 0x{X:} to 0x{X:0>8}", .{ T, value, address }),
}
}
fn alignAddress(comptime T: type, address: u32) u32 {
return switch (T) {
u32 => address & 0xFFFF_FFFC,
u16 => address & 0xFFFF_FFFE,
u8 => address,
else => @compileError("Bus: Invalid read/write type"),
};
}
fn undRead(comptime format: []const u8, args: anytype) u8 {
if (panic_on_und_bus) std.debug.panic(format, args) else log.warn(format, args);
return 0;