fix: resolve bugs in VRAM unpredictable read/writes
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parent
887bd89668
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5d37c212e2
23
src/ppu.zig
23
src/ppu.zig
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@ -658,11 +658,8 @@ const Palette = struct {
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switch (T) {
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u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
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u8 => {
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const halfword: u16 = @as(u16, value) * 0x0101;
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// FIXME: I don't think my comment here makes sense?
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const weird_addr = addr & ~@as(u32, 1); // *was* 8-bit read so address won't be aligned
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std.mem.writeIntSliceLittle(u16, self.buf[weird_addr..(weird_addr + @sizeOf(u16))], halfword);
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const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
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std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
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},
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else => @compileError("PALRAM: Unsupported write width"),
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}
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@ -705,21 +702,19 @@ const Vram = struct {
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pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address: usize, value: T) void {
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const mode: u3 = dispcnt.bg_mode.read();
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const addr = Self.mirror(address);
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const idx = Self.mirror(address);
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switch (T) {
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u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
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u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
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u8 => {
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// Ignore if write is in OBJ
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// Ignore write if it falls within the boundaries of OBJ VRAM
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switch (mode) {
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0, 1, 2 => if (0x0601_0000 <= address and address < 0x0601_8000) return,
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else => if (0x0601_4000 <= address and address < 0x0601_8000) return,
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0, 1, 2 => if (0x0001_0000 <= idx) return,
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else => if (0x0001_4000 <= idx) return,
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}
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const halfword: u16 = @as(u16, value) * 0x0101;
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const weird_addr = addr & ~@as(u32, 1);
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std.mem.writeIntSliceLittle(u16, self.buf[weird_addr..(weird_addr + @sizeOf(u16))], halfword);
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const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
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std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
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},
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else => @compileError("VRAM: Unsupported write width"),
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}
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