chore: remove TODOs and some useless imports

src/cpu.zig

@@ -220,7 +220,6 @@ pub const Arm7tdmi = struct {
             .User, .System => {
                 self.r[13] = self.banked_r[bankedIdx(next) * 2 + 0];
                 self.r[14] = self.banked_r[bankedIdx(next) * 2 + 1];
-                // FIXME: Should we clear out SPSR?
             },
             else => {
                 self.r[13] = self.banked_r[bankedIdx(next) * 2 + 0];

src/cpu/arm/block_data_transfer.zig

@@ -1,5 +1,3 @@
-const std = @import("std");
-
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ArmInstrFn;

src/cpu/arm/branch.zig

@@ -1,19 +1,16 @@
 const std = @import("std");
-const util = @import("../../util.zig");
 
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ArmInstrFn;
 
+const u32SignExtend = @import("../../util.zig").u32SignExtend;
+
 pub fn branch(comptime L: bool) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
-            if (L) {
+            if (L) cpu.r[14] = cpu.r[15];
-                // TODO: Debugging beeg.gba w/ MGBA seems to suggest that I don't do anything here
+            cpu.r[15] = cpu.fakePC() +% u32SignExtend(24, opcode << 2);
-                cpu.r[14] = cpu.r[15];
-            }
-
-            cpu.r[15] = cpu.fakePC() +% util.u32SignExtend(24, opcode << 2);
         }
     }.inner;
 }
@@ -21,7 +18,5 @@ pub fn branch(comptime L: bool) InstrFn {
 pub fn branchAndExchange(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
     const rn = opcode & 0xF;
     cpu.cpsr.t.write(cpu.r[rn] & 1 == 1);
-
-    // TODO: Is this how I should do it?
     cpu.r[15] = cpu.r[rn] & 0xFFFF_FFFE;
 }

src/cpu/arm/data_processing.zig

@@ -1,10 +1,10 @@
-const std = @import("std");
-
-const shifter = @import("../barrel_shifter.zig");
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ArmInstrFn;
 
+const rotateRight = @import("../barrel_shifter.zig").rotateRight;
+const execute = @import("../barrel_shifter.zig").execute;
+
 pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
@@ -20,9 +20,9 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
             var op2: u32 = undefined;
             if (I) {
                 const amount = @truncate(u8, (opcode >> 8 & 0xF) << 1);
-                op2 = shifter.rotateRight(S, &cpu.cpsr, opcode & 0xFF, amount);
+                op2 = rotateRight(S, &cpu.cpsr, opcode & 0xFF, amount);
             } else {
-                op2 = shifter.execute(S, cpu, opcode);
+                op2 = execute(S, cpu, opcode);
             }
 
             // Undo special condition from above
@@ -275,7 +275,7 @@ fn setTestOpFlags(comptime S: bool, cpu: *Arm7tdmi, opcode: u32, result: u32) vo
     cpu.cpsr.n.write(result >> 31 & 1 == 1);
     cpu.cpsr.z.write(result == 0);
     // Barrel Shifter should always calc CPSR C in TST
-    if (!S) _ = shifter.execute(true, cpu, opcode);
+    if (!S) _ = execute(true, cpu, opcode);
 }
 
 fn undefinedTestBehaviour(cpu: *Arm7tdmi) void {

src/cpu/arm/half_signed_data_transfer.zig

@@ -1,10 +1,11 @@
 const std = @import("std");
-const util = @import("../../util.zig");
 
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ArmInstrFn;
 
+const u32SignExtend = @import("../../util.zig").u32SignExtend;
+
 pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
@@ -41,14 +42,14 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
                     },
                     0b10 => {
                         // LDRSB
-                        result = util.u32SignExtend(8, bus.read8(address));
+                        result = u32SignExtend(8, bus.read8(address));
                     },
                     0b11 => {
                         // LDRSH
                         const value = if (address & 1 == 1) blk: {
-                            break :blk util.u32SignExtend(8, bus.read8(address));
+                            break :blk u32SignExtend(8, bus.read8(address));
                         } else blk: {
-                            break :blk util.u32SignExtend(16, bus.read16(address));
+                            break :blk u32SignExtend(16, bus.read16(address));
                         };
 
                         result = std.math.rotr(u32, value, 8 * (address & 1));

src/cpu/arm/multiply.zig

@@ -1,5 +1,3 @@
-const std = @import("std");
-
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ArmInstrFn;

src/cpu/arm/software_interrupt.zig

@@ -1,5 +1,3 @@
-const std = @import("std");
-
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ArmInstrFn;

src/cpu/thumb/alu.zig

@@ -1,9 +1,6 @@
-const std = @import("std");
-
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
-const shifter = @import("../barrel_shifter.zig");
 
 const adc = @import("../arm/data_processing.zig").adc;
 const sbc = @import("../arm/data_processing.zig").sbc;
@@ -13,6 +10,11 @@ const cmn = @import("../arm/data_processing.zig").cmn;
 const setTestOpFlags = @import("../arm/data_processing.zig").setTestOpFlags;
 const setLogicOpFlags = @import("../arm/data_processing.zig").setLogicOpFlags;
 
+const logicalLeft = @import("../barrel_shifter.zig").logicalLeft;
+const logicalRight = @import("../barrel_shifter.zig").logicalRight;
+const arithmeticRight = @import("../barrel_shifter.zig").arithmeticRight;
+const rotateRight = @import("../barrel_shifter.zig").rotateRight;
+
 pub fn format4(comptime op: u4) InstrFn {
     return struct {
         fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
@@ -35,19 +37,19 @@ pub fn format4(comptime op: u4) InstrFn {
                 },
                 0x2 => {
                     // LSL
-                    const result = shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    const result = logicalLeft(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
                     cpu.r[rd] = result;
                     setLogicOpFlags(true, cpu, result);
                 },
                 0x3 => {
                     // LSR
-                    const result = shifter.logicalRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    const result = logicalRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
                     cpu.r[rd] = result;
                     setLogicOpFlags(true, cpu, result);
                 },
                 0x4 => {
                     // ASR
-                    const result = shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    const result = arithmeticRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
                     cpu.r[rd] = result;
                     setLogicOpFlags(true, cpu, result);
                 },
@@ -61,14 +63,14 @@ pub fn format4(comptime op: u4) InstrFn {
                 },
                 0x7 => {
                     // ROR
-                    const result = shifter.rotateRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    const result = rotateRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
                     cpu.r[rd] = result;
                     setLogicOpFlags(true, cpu, result);
                 },
                 0x8 => {
                     // TST
                     const result = cpu.r[rd] & cpu.r[rs];
-                    setLogicOpFlags(true, cpu, result); // FIXME: Barrel Shifter?
+                    setLogicOpFlags(true, cpu, result);
                 },
                 0x9 => {
                     // NEG

src/cpu/thumb/data_processing.zig

@@ -101,7 +101,7 @@ pub fn format12(comptime isSP: bool, comptime rd: u3) InstrFn {
             // ADD
             const left = if (isSP) cpu.r[13] else (cpu.r[15] + 2) & 0xFFFF_FFFD;
             const right = (opcode & 0xFF) << 2;
-            const result = left + right; // TODO: What about overflows?
+            const result = left + right;
             cpu.r[rd] = result;
         }
     }.inner;

src/cpu/thumb/data_transfer.zig

@@ -9,8 +9,6 @@ pub fn format6(comptime rd: u3) InstrFn {
         fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
             // LDR
             const offset = (opcode & 0xFF) << 2;
-
-            // FIXME: Should this overflow?
             cpu.r[rd] = bus.read32((cpu.r[15] + 2 & 0xFFFF_FFFD) + offset);
         }
     }.inner;

src/cpu/thumb/processing_branch.zig

@@ -1,5 +1,3 @@
-const std = @import("std");
-
 const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").ThumbInstrFn;