chore: rename arm7tdmi variables to just cpu

Less verbose, specifying arm7tdmi doesn't really do much when there's
no other CPU in the system
This commit is contained in:
Rekai Nyangadzayi Musuka 2022-09-03 17:56:37 -03:00
parent 6a798d2c9d
commit 59669ba3a5
4 changed files with 51 additions and 51 deletions

View File

@ -53,11 +53,11 @@ pub fn init(title: [12]u8, width: i32, height: i32) Self {
};
}
pub fn run(self: *Self, arm7tdmi: *Arm7tdmi, scheduler: *Scheduler) !void {
pub fn run(self: *Self, cpu: *Arm7tdmi, scheduler: *Scheduler) !void {
var quit = std.atomic.Atomic(bool).init(false);
var frame_rate = FpsTracker.init();
const thread = try std.Thread.spawn(.{}, emu.run, .{ &quit, &frame_rate, scheduler, arm7tdmi });
const thread = try std.Thread.spawn(.{}, emu.run, .{ &quit, &frame_rate, scheduler, cpu });
defer thread.join();
var title_buf: [0x100]u8 = [_]u8{0} ** 0x100;
@ -68,7 +68,7 @@ pub fn run(self: *Self, arm7tdmi: *Arm7tdmi, scheduler: *Scheduler) !void {
switch (event.type) {
SDL.SDL_QUIT => break :emu_loop,
SDL.SDL_KEYDOWN => {
const io = &arm7tdmi.bus.io;
const io = &cpu.bus.io;
const key_code = event.key.keysym.sym;
switch (key_code) {
@ -86,7 +86,7 @@ pub fn run(self: *Self, arm7tdmi: *Arm7tdmi, scheduler: *Scheduler) !void {
}
},
SDL.SDL_KEYUP => {
const io = &arm7tdmi.bus.io;
const io = &cpu.bus.io;
const key_code = event.key.keysym.sym;
switch (key_code) {
@ -100,12 +100,12 @@ pub fn run(self: *Self, arm7tdmi: *Arm7tdmi, scheduler: *Scheduler) !void {
SDL.SDLK_s => io.keyinput.shoulder_r.set(),
SDL.SDLK_RETURN => io.keyinput.start.set(),
SDL.SDLK_RSHIFT => io.keyinput.select.set(),
SDL.SDLK_i => log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(arm7tdmi.bus.apu.stream)) / (2 * @sizeOf(u16))}),
SDL.SDLK_i => log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(cpu.bus.apu.stream)) / (2 * @sizeOf(u16))}),
SDL.SDLK_j => log.err("Scheduler Capacity: {} | Scheduler Event Count: {}", .{ scheduler.queue.capacity(), scheduler.queue.count() }),
SDL.SDLK_k => {
// Dump IWRAM to file
log.info("PC: 0x{X:0>8}", .{arm7tdmi.r[15]});
log.info("LR: 0x{X:0>8}", .{arm7tdmi.r[14]});
log.info("PC: 0x{X:0>8}", .{cpu.r[15]});
log.info("LR: 0x{X:0>8}", .{cpu.r[14]});
// const iwram_file = try std.fs.cwd().createFile("iwram.bin", .{});
// defer iwram_file.close();
@ -119,7 +119,7 @@ pub fn run(self: *Self, arm7tdmi: *Arm7tdmi, scheduler: *Scheduler) !void {
}
// Emulator has an internal Double Buffer
const framebuf = arm7tdmi.bus.ppu.framebuf.get(.Renderer);
const framebuf = cpu.bus.ppu.framebuf.get(.Renderer);
_ = SDL.SDL_UpdateTexture(self.texture, null, framebuf.ptr, pitch);
_ = SDL.SDL_RenderCopy(self.renderer, self.texture, null, null);
SDL.SDL_RenderPresent(self.renderer);
@ -174,8 +174,8 @@ const Audio = struct {
self.* = undefined;
}
pub fn play(this: *This) void {
SDL.SDL_PauseAudioDevice(this.device, 0);
pub fn play(self: *This) void {
SDL.SDL_PauseAudioDevice(self.device, 0);
}
export fn callback(userdata: ?*anyopaque, stream: [*c]u8, len: c_int) void {

View File

@ -444,29 +444,29 @@ const ToneSweep = struct {
};
}
pub fn tick(this: *This, ch1: *Self) void {
if (this.timer != 0) this.timer -= 1;
pub fn tick(self: *This, ch1: *Self) void {
if (self.timer != 0) self.timer -= 1;
if (this.timer == 0) {
if (self.timer == 0) {
const period = ch1.sweep.period.read();
this.timer = if (period == 0) 8 else period;
if (!this.calc_performed) this.calc_performed = true;
self.timer = if (period == 0) 8 else period;
if (!self.calc_performed) self.calc_performed = true;
if (this.enabled and period != 0) {
const new_freq = this.calcFrequency(ch1);
if (self.enabled and period != 0) {
const new_freq = self.calcFrequency(ch1);
if (new_freq <= 0x7FF and ch1.sweep.shift.read() != 0) {
ch1.freq.frequency.write(@truncate(u11, new_freq));
this.shadow = @truncate(u11, new_freq);
self.shadow = @truncate(u11, new_freq);
_ = this.calcFrequency(ch1);
_ = self.calcFrequency(ch1);
}
}
}
}
fn calcFrequency(this: *This, ch1: *Self) u12 {
const shadow = @as(u12, this.shadow);
fn calcFrequency(self: *This, ch1: *Self) u12 {
const shadow = @as(u12, self.shadow);
const shadow_shifted = shadow >> ch1.sweep.shift.read();
const decrease = ch1.sweep.direction.read();

View File

@ -129,45 +129,45 @@ pub const Logger = struct {
try self.buf.writer().print(format, args);
}
pub fn mgbaLog(self: *Self, arm7tdmi: *const Arm7tdmi, opcode: u32) void {
pub fn mgbaLog(self: *Self, cpu: *const Arm7tdmi, opcode: u32) void {
const fmt_base = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | ";
const thumb_fmt = fmt_base ++ "{X:0>4}:\n";
const arm_fmt = fmt_base ++ "{X:0>8}:\n";
if (arm7tdmi.cpsr.t.read()) {
if (cpu.cpsr.t.read()) {
if (opcode >> 11 == 0x1E) {
// Instruction 1 of a BL Opcode, print in ARM mode
const low = arm7tdmi.bus.dbgRead(u16, arm7tdmi.r[15]);
const low = cpu.bus.dbgRead(u16, cpu.r[15]);
const bl_opcode = @as(u32, opcode) << 16 | low;
self.print(arm_fmt, Self.fmtArgs(arm7tdmi, bl_opcode)) catch @panic("failed to write to log file");
self.print(arm_fmt, Self.fmtArgs(cpu, bl_opcode)) catch @panic("failed to write to log file");
} else {
self.print(thumb_fmt, Self.fmtArgs(arm7tdmi, opcode)) catch @panic("failed to write to log file");
self.print(thumb_fmt, Self.fmtArgs(cpu, opcode)) catch @panic("failed to write to log file");
}
} else {
self.print(arm_fmt, Self.fmtArgs(arm7tdmi, opcode)) catch @panic("failed to write to log file");
self.print(arm_fmt, Self.fmtArgs(cpu, opcode)) catch @panic("failed to write to log file");
}
}
fn fmtArgs(arm7tdmi: *const Arm7tdmi, opcode: u32) FmtArgTuple {
fn fmtArgs(cpu: *const Arm7tdmi, opcode: u32) FmtArgTuple {
return .{
arm7tdmi.r[0],
arm7tdmi.r[1],
arm7tdmi.r[2],
arm7tdmi.r[3],
arm7tdmi.r[4],
arm7tdmi.r[5],
arm7tdmi.r[6],
arm7tdmi.r[7],
arm7tdmi.r[8],
arm7tdmi.r[9],
arm7tdmi.r[10],
arm7tdmi.r[11],
arm7tdmi.r[12],
arm7tdmi.r[13],
arm7tdmi.r[14],
arm7tdmi.r[15],
arm7tdmi.cpsr.raw,
cpu.r[0],
cpu.r[1],
cpu.r[2],
cpu.r[3],
cpu.r[4],
cpu.r[5],
cpu.r[6],
cpu.r[7],
cpu.r[8],
cpu.r[9],
cpu.r[10],
cpu.r[11],
cpu.r[12],
cpu.r[13],
cpu.r[14],
cpu.r[15],
cpu.cpsr.raw,
opcode,
};
}

View File

@ -14,7 +14,7 @@ const Allocator = std.mem.Allocator;
const log = std.log.scoped(.CLI);
const width = @import("core/ppu.zig").width;
const height = @import("core/ppu.zig").height;
const arm7tdmi_logging = @import("core/emu.zig").cpu_logging;
const cpu_logging = @import("core/emu.zig").cpu_logging;
pub const log_level = if (builtin.mode != .Debug) .info else std.log.default_level;
// TODO: Reimpl Logging
@ -40,7 +40,7 @@ pub fn main() anyerror!void {
const paths = try handleArguments(allocator, &result);
defer if (paths.save) |path| allocator.free(path);
const log_file: ?std.fs.File = if (arm7tdmi_logging) try std.fs.cwd().createFile("zba.log", .{}) else null;
const log_file: ?std.fs.File = if (cpu_logging) try std.fs.cwd().createFile("zba.log", .{}) else null;
defer if (log_file) |file| file.close();
// TODO: Take Emulator Init Code out of main.zig
@ -48,17 +48,17 @@ pub fn main() anyerror!void {
defer scheduler.deinit();
var bus: Bus = undefined;
var arm7tdmi = Arm7tdmi.init(&scheduler, &bus, log_file);
if (paths.bios == null) arm7tdmi.fastBoot();
var cpu = Arm7tdmi.init(&scheduler, &bus, log_file);
if (paths.bios == null) cpu.fastBoot();
try bus.init(allocator, &scheduler, &arm7tdmi, paths);
try bus.init(allocator, &scheduler, &cpu, paths);
defer bus.deinit();
var gui = Gui.init(bus.pak.title, width, height);
gui.initAudio(&bus.apu);
defer gui.deinit();
try gui.run(&arm7tdmi, &scheduler);
try gui.run(&cpu, &scheduler);
}
fn getSavePath(allocator: Allocator) !?[]const u8 {