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chore: rename arm7tdmi variables to just cpu

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Less verbose, specifying arm7tdmi doesn't really do much when there's
no other CPU in the system
This commit is contained in:
Rekai Nyangadzayi Musuka
2022-09-03 17:56:37 -03:00
parent 6a798d2c9d
commit 59669ba3a5
4 changed files with 51 additions and 51 deletions
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22
src/core/apu.zig
View File

@@ -444,29 +444,29 @@ const ToneSweep = struct {
};
}
pub fn tick(this: *This, ch1: *Self) void {
if (this.timer != 0) this.timer -= 1;
pub fn tick(self: *This, ch1: *Self) void {
if (self.timer != 0) self.timer -= 1;
if (this.timer == 0) {
if (self.timer == 0) {
const period = ch1.sweep.period.read();
this.timer = if (period == 0) 8 else period;
if (!this.calc_performed) this.calc_performed = true;
self.timer = if (period == 0) 8 else period;
if (!self.calc_performed) self.calc_performed = true;
if (this.enabled and period != 0) {
const new_freq = this.calcFrequency(ch1);
if (self.enabled and period != 0) {
const new_freq = self.calcFrequency(ch1);
if (new_freq <= 0x7FF and ch1.sweep.shift.read() != 0) {
ch1.freq.frequency.write(@truncate(u11, new_freq));
this.shadow = @truncate(u11, new_freq);
self.shadow = @truncate(u11, new_freq);
_ = this.calcFrequency(ch1);
_ = self.calcFrequency(ch1);
}
}
}
}
fn calcFrequency(this: *This, ch1: *Self) u12 {
const shadow = @as(u12, this.shadow);
fn calcFrequency(self: *This, ch1: *Self) u12 {
const shadow = @as(u12, self.shadow);
const shadow_shifted = shadow >> ch1.sweep.shift.read();
const decrease = ch1.sweep.direction.read();

48
src/core/util.zig
View File

@@ -129,45 +129,45 @@ pub const Logger = struct {
try self.buf.writer().print(format, args);
}
pub fn mgbaLog(self: *Self, arm7tdmi: *const Arm7tdmi, opcode: u32) void {
pub fn mgbaLog(self: *Self, cpu: *const Arm7tdmi, opcode: u32) void {
const fmt_base = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | ";
const thumb_fmt = fmt_base ++ "{X:0>4}:\n";
const arm_fmt = fmt_base ++ "{X:0>8}:\n";
if (arm7tdmi.cpsr.t.read()) {
if (cpu.cpsr.t.read()) {
if (opcode >> 11 == 0x1E) {
// Instruction 1 of a BL Opcode, print in ARM mode
const low = arm7tdmi.bus.dbgRead(u16, arm7tdmi.r[15]);
const low = cpu.bus.dbgRead(u16, cpu.r[15]);
const bl_opcode = @as(u32, opcode) << 16 | low;
self.print(arm_fmt, Self.fmtArgs(arm7tdmi, bl_opcode)) catch @panic("failed to write to log file");
self.print(arm_fmt, Self.fmtArgs(cpu, bl_opcode)) catch @panic("failed to write to log file");
} else {
self.print(thumb_fmt, Self.fmtArgs(arm7tdmi, opcode)) catch @panic("failed to write to log file");
self.print(thumb_fmt, Self.fmtArgs(cpu, opcode)) catch @panic("failed to write to log file");
}
} else {
self.print(arm_fmt, Self.fmtArgs(arm7tdmi, opcode)) catch @panic("failed to write to log file");
self.print(arm_fmt, Self.fmtArgs(cpu, opcode)) catch @panic("failed to write to log file");
}
}
fn fmtArgs(arm7tdmi: *const Arm7tdmi, opcode: u32) FmtArgTuple {
fn fmtArgs(cpu: *const Arm7tdmi, opcode: u32) FmtArgTuple {
return .{
arm7tdmi.r[0],
arm7tdmi.r[1],
arm7tdmi.r[2],
arm7tdmi.r[3],
arm7tdmi.r[4],
arm7tdmi.r[5],
arm7tdmi.r[6],
arm7tdmi.r[7],
arm7tdmi.r[8],
arm7tdmi.r[9],
arm7tdmi.r[10],
arm7tdmi.r[11],
arm7tdmi.r[12],
arm7tdmi.r[13],
arm7tdmi.r[14],
arm7tdmi.r[15],
arm7tdmi.cpsr.raw,
cpu.r[0],
cpu.r[1],
cpu.r[2],
cpu.r[3],
cpu.r[4],
cpu.r[5],
cpu.r[6],
cpu.r[7],
cpu.r[8],
cpu.r[9],
cpu.r[10],
cpu.r[11],
cpu.r[12],
cpu.r[13],
cpu.r[14],
cpu.r[15],
cpu.cpsr.raw,
opcode,
};
}