chore: don't init bus in Arm7tdmi init

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-07-27 13:44:24 -03:00
parent c397b7069d
commit 53eec5c3ff
3 changed files with 17 additions and 18 deletions

View File

@ -7,7 +7,6 @@ const Bitfield = @import("bitfield").Bitfield;
const Scheduler = @import("scheduler.zig").Scheduler; const Scheduler = @import("scheduler.zig").Scheduler;
const FilePaths = @import("util.zig").FilePaths; const FilePaths = @import("util.zig").FilePaths;
const Allocator = std.mem.Allocator;
const File = std.fs.File; const File = std.fs.File;
// ARM Instructions // ARM Instructions
@ -234,7 +233,7 @@ pub const Arm7tdmi = struct {
r: [16]u32, r: [16]u32,
sched: *Scheduler, sched: *Scheduler,
bus: Bus, bus: *Bus,
cpsr: PSR, cpsr: PSR,
spsr: PSR, spsr: PSR,
@ -252,11 +251,11 @@ pub const Arm7tdmi = struct {
log_buf: [0x100]u8, log_buf: [0x100]u8,
binary_log: bool, binary_log: bool,
pub fn init(alloc: Allocator, sched: *Scheduler, paths: FilePaths) !Self { pub fn init(sched: *Scheduler, bus: *Bus) Self {
return Self{ return Self{
.r = [_]u32{0x00} ** 16, .r = [_]u32{0x00} ** 16,
.sched = sched, .sched = sched,
.bus = try Bus.init(alloc, sched, paths), .bus = bus,
.cpsr = .{ .raw = 0x0000_001F }, .cpsr = .{ .raw = 0x0000_001F },
.spsr = .{ .raw = 0x0000_0000 }, .spsr = .{ .raw = 0x0000_0000 },
.banked_fiq = [_]u32{0x00} ** 10, .banked_fiq = [_]u32{0x00} ** 10,
@ -268,10 +267,6 @@ pub const Arm7tdmi = struct {
}; };
} }
pub fn deinit(self: Self) void {
self.bus.deinit();
}
pub fn useLogger(self: *Self, file: *const File, is_binary: bool) void { pub fn useLogger(self: *Self, file: *const File, is_binary: bool) void {
self.log_file = file; self.log_file = file;
self.binary_log = is_binary; self.binary_log = is_binary;
@ -433,13 +428,13 @@ pub const Arm7tdmi = struct {
const opcode = self.fetch(u16); const opcode = self.fetch(u16);
if (enable_logging) if (self.log_file) |file| self.debug_log(file, opcode); if (enable_logging) if (self.log_file) |file| self.debug_log(file, opcode);
thumb.lut[thumbIdx(opcode)](self, &self.bus, opcode); thumb.lut[thumbIdx(opcode)](self, self.bus, opcode);
} else { } else {
const opcode = self.fetch(u32); const opcode = self.fetch(u32);
if (enable_logging) if (self.log_file) |file| self.debug_log(file, opcode); if (enable_logging) if (self.log_file) |file| self.debug_log(file, opcode);
if (checkCond(self.cpsr, @truncate(u4, opcode >> 28))) { if (checkCond(self.cpsr, @truncate(u4, opcode >> 28))) {
arm.lut[armIdx(opcode)](self, &self.bus, opcode); arm.lut[armIdx(opcode)](self, self.bus, opcode);
} }
} }
} }

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@ -573,7 +573,7 @@ pub const Ppu = struct {
// See if HBlank DMA is present and not enabled // See if HBlank DMA is present and not enabled
if (!self.dispstat.vblank.read()) if (!self.dispstat.vblank.read())
pollBlankingDma(&cpu.bus, .HBlank); pollBlankingDma(cpu.bus, .HBlank);
self.dispstat.hblank.set(); self.dispstat.hblank.set();
self.sched.push(.HBlank, 68 * 4 -| late); self.sched.push(.HBlank, 68 * 4 -| late);
@ -615,7 +615,7 @@ pub const Ppu = struct {
self.aff_bg[1].latchRefPoints(); self.aff_bg[1].latchRefPoints();
// See if Vblank DMA is present and not enabled // See if Vblank DMA is present and not enabled
pollBlankingDma(&cpu.bus, .VBlank); pollBlankingDma(cpu.bus, .VBlank);
} }
if (scanline == 227) self.dispstat.vblank.unset(); if (scanline == 227) self.dispstat.vblank.unset();

View File

@ -5,6 +5,7 @@ const known_folders = @import("known_folders");
const clap = @import("clap"); const clap = @import("clap");
const Gui = @import("Gui.zig"); const Gui = @import("Gui.zig");
const Bus = @import("core/Bus.zig");
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi; const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
const Scheduler = @import("core/scheduler.zig").Scheduler; const Scheduler = @import("core/scheduler.zig").Scheduler;
const FilePaths = @import("core/util.zig").FilePaths; const FilePaths = @import("core/util.zig").FilePaths;
@ -42,13 +43,16 @@ pub fn main() anyerror!void {
var scheduler = Scheduler.init(allocator); var scheduler = Scheduler.init(allocator);
defer scheduler.deinit(); defer scheduler.deinit();
var arm7tdmi = try Arm7tdmi.init(allocator, &scheduler, paths); var bus = try Bus.init(allocator, &scheduler, paths);
arm7tdmi.bus.attach(&arm7tdmi); defer bus.deinit();
if (paths.bios == null) arm7tdmi.fastBoot();
defer arm7tdmi.deinit();
var gui = Gui.init(arm7tdmi.bus.pak.title, width, height); var arm7tdmi = Arm7tdmi.init(&scheduler, &bus);
gui.initAudio(&arm7tdmi.bus.apu);
bus.attach(&arm7tdmi); // TODO: Shrink Surface (only CPSR and r15?)
if (paths.bios == null) arm7tdmi.fastBoot();
var gui = Gui.init(bus.pak.title, width, height);
gui.initAudio(&bus.apu);
defer gui.deinit(); defer gui.deinit();
try gui.run(&arm7tdmi, &scheduler); try gui.run(&arm7tdmi, &scheduler);