fix(bus): resolve simple oversights
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2851c140ea
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505b1b9608
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@ -88,8 +88,8 @@ pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi
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// Internal Display Memory behavious unusually on 8-bit reads
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// Internal Display Memory behavious unusually on 8-bit reads
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// so we have two different tables depending on whether there's an 8-bit read or not
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// so we have two different tables depending on whether there's an 8-bit read or not
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fillWriteTable(u16, self, left_write); // T could also be u32 here
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fillWriteTable(u8, self, left_write);
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fillWriteTable(u8, self, right_write);
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fillWriteTable(u32, self, right_write);
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}
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}
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pub fn deinit(self: *Self) void {
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pub fn deinit(self: *Self) void {
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@ -147,7 +147,6 @@ fn fillWriteTable(comptime T: type, bus: *Self, table: *[table_len]?*const anyop
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0x0400_0000...0x0400_03FF => null, // I/O
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0x0400_0000...0x0400_03FF => null, // I/O
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// Internal Display Memory
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// Internal Display Memory
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// FIXME: Different table for different integer width writes?
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0x0500_0000...0x05FF_FFFF => if (T != u8) &bus.ppu.palette.buf[addr & 0x3FF] else null,
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0x0500_0000...0x05FF_FFFF => if (T != u8) &bus.ppu.palette.buf[addr & 0x3FF] else null,
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0x0600_0000...0x06FF_FFFF => if (T != u8) &bus.ppu.vram.buf[vramMirror(addr)] else null,
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0x0600_0000...0x06FF_FFFF => if (T != u8) &bus.ppu.vram.buf[vramMirror(addr)] else null,
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0x0700_0000...0x07FF_FFFF => if (T != u8) &bus.ppu.oam.buf[addr & 0x3FF] else null,
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0x0700_0000...0x07FF_FFFF => if (T != u8) &bus.ppu.oam.buf[addr & 0x3FF] else null,
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@ -243,6 +242,7 @@ fn readIo(self: *const Self, comptime T: type, address: u32) T {
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}
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}
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fn openBus(self: *const Self, comptime T: type, address: u32) T {
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fn openBus(self: *const Self, comptime T: type, address: u32) T {
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@setCold(true);
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const r15 = self.cpu.r[15];
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const r15 = self.cpu.r[15];
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const word = blk: {
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const word = blk: {
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@ -308,10 +308,10 @@ pub fn read(self: *Self, comptime T: type, unaligned_address: u32) T {
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const offset = unaligned_address & (page_size - 1);
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const offset = unaligned_address & (page_size - 1);
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// whether or not we do this in slowmem or fastmem, we should advance the scheduler
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// whether or not we do this in slowmem or fastmem, we should advance the scheduler
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self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
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self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
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// We're doing some serious out-of-bounds open-bus reads
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// We're doing some serious out-of-bounds open-bus reads
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if (page > table_len) return self.slowRead(T, unaligned_address);
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if (page > table_len) return self.openBus(T, unaligned_address);
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if (self.read_table[page]) |some_ptr| {
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if (self.read_table[page]) |some_ptr| {
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// We have a pointer to a page, cast the pointer to it's underlying type
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// We have a pointer to a page, cast the pointer to it's underlying type
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@ -374,12 +374,12 @@ pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) vo
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const offset = unaligned_address & (page_size - 1);
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const offset = unaligned_address & (page_size - 1);
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// whether or not we do this in slowmem or fastmem, we should advance the scheduler
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// whether or not we do this in slowmem or fastmem, we should advance the scheduler
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self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
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self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
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// We're doing some serious out-of-bounds open-bus writes, they do nothing though
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// We're doing some serious out-of-bounds open-bus writes, they do nothing though
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if (page > table_len) return;
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if (page > table_len) return;
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if (self.write_tables[if (T == u8) 1 else 0][page]) |some_ptr| {
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if (self.write_tables[@boolToInt(T == u32)][page]) |some_ptr| {
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// We have a pointer to a page, cast the pointer to it's underlying type
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// We have a pointer to a page, cast the pointer to it's underlying type
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const Ptr = [*]T;
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const Ptr = [*]T;
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const alignment = @alignOf(std.meta.Child(Ptr));
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const alignment = @alignOf(std.meta.Child(Ptr));
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@ -390,7 +390,7 @@ pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) vo
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ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
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ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
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} else {
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} else {
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// we can return early if this is an 8-bit OAM write
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// we can return early if this is an 8-bit OAM write
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if (T == u8 and @truncate(u8, unaligned_address) == 0x07) return;
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if (T == u8 and @truncate(u8, unaligned_address >> 24) == 0x07) return;
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self.slowWrite(T, unaligned_address, value);
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self.slowWrite(T, unaligned_address, value);
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}
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}
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