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feat: pass retAddr.gba

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-10-21 05:12:22 -03:00
parent d30a4d7ee5
commit 4d75d156e5
1 changed files with 2 additions and 2 deletions
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4
src/cpu.zig
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@ -278,8 +278,8 @@ pub const Arm7tdmi = struct {
if (!self.bus.io.ime or self.cpsr.i.read()) return;
// log.info("An interrupt was Handled!", .{});
// TODO: Should this behave like Software Interrupts?
const r15 = self.r[15] + if (self.cpsr.t.read()) @as(u32, 2) else 4;
// retAddr.gba says r15 on it's own is off by -04h in both ARM and THUMB mode
const r15 = self.r[15] + 4;
const cpsr = self.cpsr.raw;
self.changeMode(.Irq);