chore(io): replace some bitfields with enums
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fd9ffb20b4
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4885a86833
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@ -14,7 +14,7 @@ pub const Io = struct {
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ie: InterruptEnable,
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irq: InterruptRequest,
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postflg: PostFlag,
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is_halted: bool,
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haltcnt: HaltControl,
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keyinput: KeyInput,
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@ -23,9 +23,9 @@ pub const Io = struct {
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.ime = false,
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.ie = .{ .raw = 0x0000 },
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.irq = .{ .raw = 0x0000 },
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.postflg = .{ .raw = 0x00 },
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.keyinput = .{ .raw = 0x03FF },
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.is_halted = false,
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.postflg = .FirstBoot,
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.haltcnt = .Execute,
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};
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}
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};
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@ -169,7 +169,7 @@ pub fn read8(bus: *const Bus, addr: u32) u8 {
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0x0400_0000 => @truncate(u8, bus.ppu.dispcnt.raw),
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0x0400_0004 => @truncate(u8, bus.ppu.dispstat.raw),
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0x0400_0200 => @truncate(u8, bus.io.ie.raw),
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0x0400_0300 => bus.io.postflg.raw,
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0x0400_0300 => @enumToInt(bus.io.postflg),
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0x0400_0006 => @truncate(u8, bus.ppu.vcount.raw),
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0x0400_0089 => failed_read("Tried to read (high) byte from SOUNDBIAS", .{}),
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else => std.debug.panic("Tried to read byte from 0x{X:0>8}", .{addr}),
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@ -181,7 +181,7 @@ pub fn write8(self: *Bus, addr: u32, byte: u8) void {
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0x0400_0004 => self.ppu.dispstat.raw = (self.ppu.dispstat.raw & 0xFF00) | byte,
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0x0400_0005 => self.ppu.dispstat.raw = (@as(u16, byte) << 8) | (self.ppu.dispstat.raw & 0xFF),
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0x0400_0208 => self.io.ime = byte & 1 == 1,
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0x0400_0301 => self.io.is_halted = byte >> 7 & 1 == 0, // TODO: Implement Stop?
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0x0400_0301 => self.io.haltcnt = if (byte >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
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0x0400_0063 => log.warn("Tried to write 0x{X:0>2} to SOUND1CNT_H (high)", .{byte}),
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0x0400_0065 => log.warn("Tried to write 0x{X:0>2} to SOUND1CNT_X (high)", .{byte}),
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0x0400_0069 => log.warn("Tried to write 0x{X:0>2} to SOUND2CNT_L (high)", .{byte}),
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@ -200,11 +200,17 @@ fn failed_read(comptime format: []const u8, args: anytype) u8 {
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return 0;
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}
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/// Read / Write
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pub const PostFlag = extern union {
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/// 0 if First Boot, 1 if a Reset has been done
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not_first_boot: Bit(u8, 0),
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raw: u8,
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/// Read / Write
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pub const PostFlag = enum(u1) {
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FirstBoot = 0,
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FurtherBoots = 1,
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};
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/// Write Only
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pub const HaltControl = enum {
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Halt,
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Stop,
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Execute,
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};
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/// Read / Write
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@ -247,7 +247,7 @@ pub const Arm7tdmi = struct {
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pub fn step(self: *Self) u64 {
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// If we're halted, the cpu is disabled
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if (self.bus.io.is_halted) return 1;
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if (self.bus.io.haltcnt == .Halt) return 1;
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if (self.cpsr.t.read()) {
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const opcode = self.thumbFetch();
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@ -270,7 +270,7 @@ pub const Arm7tdmi = struct {
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const should_handle = self.bus.io.ie.raw & self.bus.io.irq.raw;
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if (should_handle != 0) {
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self.bus.io.is_halted = false;
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self.bus.io.haltcnt = .Execute;
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// log.info("An Interrupt was Fired!", .{});
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// Either IME is not true or I in CPSR is true
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