fix(apu): disable APU writes when APU is disabled
This commit is contained in:
parent
002e33b48b
commit
46e29245b7
201
src/core/apu.zig
201
src/core/apu.zig
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@ -108,106 +108,121 @@ pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
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pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
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pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
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const byte_addr = @truncate(u8, addr);
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const byte_addr = @truncate(u8, addr);
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if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
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switch (T) {
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switch (T) {
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u32 => switch (byte_addr) {
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u32 => {
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0x60 => apu.ch1.setSound1Cnt(value),
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// 0x80 and 0x81 handled in setSoundCnt
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0x64 => apu.ch1.setSound1CntX(&apu.fs, @truncate(u16, value)),
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if (byte_addr < 0x80 and !apu.cnt.apu_enable.read()) return;
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0x68 => apu.ch2.setSound2CntL(@truncate(u16, value)),
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switch (byte_addr) {
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0x6C => apu.ch2.setSound2CntH(&apu.fs, @truncate(u16, value)),
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0x60 => apu.ch1.setSound1Cnt(value),
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0x64 => apu.ch1.setSound1CntX(&apu.fs, @truncate(u16, value)),
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0x70 => apu.ch3.setSound3Cnt(value),
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0x68 => apu.ch2.setSound2CntL(@truncate(u16, value)),
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0x74 => apu.ch3.setSound3CntX(&apu.fs, @truncate(u16, value)),
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0x6C => apu.ch2.setSound2CntH(&apu.fs, @truncate(u16, value)),
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0x78 => apu.ch4.setSound4CntL(@truncate(u16, value)),
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0x70 => apu.ch3.setSound3Cnt(value),
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0x7C => apu.ch4.setSound4CntH(&apu.fs, @truncate(u16, value)),
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0x74 => apu.ch3.setSound3CntX(&apu.fs, @truncate(u16, value)),
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0x80 => apu.setSoundCnt(value),
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0x78 => apu.ch4.setSound4CntL(@truncate(u16, value)),
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
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0x7C => apu.ch4.setSound4CntH(&apu.fs, @truncate(u16, value)),
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0x88 => apu.bias.raw = @truncate(u16, value),
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0x8C => {},
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0x90, 0x94, 0x98, 0x9C => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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0x80 => apu.setSoundCnt(value),
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0xA0 => apu.chA.push(value), // FIFO_A
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
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0xA4 => apu.chB.push(value), // FIFO_B
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0x88 => apu.bias.raw = @truncate(u16, value),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
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0x8C => {},
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0x90, 0x94, 0x98, 0x9C => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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0xA0 => apu.chA.push(value), // FIFO_A
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0xA4 => apu.chB.push(value), // FIFO_B
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else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
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}
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},
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},
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u16 => switch (byte_addr) {
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u16 => {
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0x60 => apu.ch1.setSound1CntL(@truncate(u8, value)), // SOUND1CNT_L
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if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
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0x62 => apu.ch1.setSound1CntH(value),
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0x64 => apu.ch1.setSound1CntX(&apu.fs, value),
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0x66 => {},
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0x68 => apu.ch2.setSound2CntL(value),
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switch (byte_addr) {
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0x6A => {},
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0x60 => apu.ch1.setSound1CntL(@truncate(u8, value)), // SOUND1CNT_L
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0x6C => apu.ch2.setSound2CntH(&apu.fs, value),
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0x62 => apu.ch1.setSound1CntH(value),
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0x6E => {},
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0x64 => apu.ch1.setSound1CntX(&apu.fs, value),
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0x66 => {},
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0x70 => apu.ch3.setSound3CntL(@truncate(u8, value)),
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0x68 => apu.ch2.setSound2CntL(value),
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0x72 => apu.ch3.setSound3CntH(value),
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0x6A => {},
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0x74 => apu.ch3.setSound3CntX(&apu.fs, value),
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0x6C => apu.ch2.setSound2CntH(&apu.fs, value),
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0x76 => {},
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0x6E => {},
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0x78 => apu.ch4.setSound4CntL(value),
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0x70 => apu.ch3.setSound3CntL(@truncate(u8, value)),
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0x7A => {},
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0x72 => apu.ch3.setSound3CntH(value),
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0x7C => apu.ch4.setSound4CntH(&apu.fs, value),
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0x74 => apu.ch3.setSound3CntX(&apu.fs, value),
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0x7E => {},
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0x76 => {},
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0x80 => apu.setSoundCntL(value),
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0x78 => apu.ch4.setSound4CntL(value),
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0x82 => apu.setSoundCntH(value),
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0x7A => {},
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
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0x7C => apu.ch4.setSound4CntH(&apu.fs, value),
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0x86 => {},
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0x7E => {},
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0x88 => apu.bias.raw = value, // SOUNDBIAS
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0x8A, 0x8C, 0x8E => {},
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0x90, 0x92, 0x94, 0x96, 0x98, 0x9A, 0x9C, 0x9E => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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0x80 => apu.setSoundCntL(value),
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0xA0, 0xA2 => log.err("Tried to write 0x{X:0>4}{} to FIFO_A", .{ value, T }),
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0x82 => apu.setSoundCntH(value),
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0xA4, 0xA6 => log.err("Tried to write 0x{X:0>4}{} to FIFO_B", .{ value, T }),
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
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0x86 => {},
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0x88 => apu.bias.raw = value, // SOUNDBIAS
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0x8A, 0x8C, 0x8E => {},
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0x90, 0x92, 0x94, 0x96, 0x98, 0x9A, 0x9C, 0x9E => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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0xA0, 0xA2 => log.err("Tried to write 0x{X:0>4}{} to FIFO_A", .{ value, T }),
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0xA4, 0xA6 => log.err("Tried to write 0x{X:0>4}{} to FIFO_B", .{ value, T }),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
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}
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},
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},
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u8 => switch (byte_addr) {
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u8 => {
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0x60 => apu.ch1.setSound1CntL(value),
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if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
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0x61 => {},
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0x62 => apu.ch1.setNr11(value),
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0x63 => apu.ch1.setNr12(value),
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0x64 => apu.ch1.setNr13(value),
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0x65 => apu.ch1.setNr14(&apu.fs, value),
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0x66, 0x67 => {},
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0x68 => apu.ch2.setNr21(value),
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switch (byte_addr) {
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0x69 => apu.ch2.setNr22(value),
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0x60 => apu.ch1.setSound1CntL(value),
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0x6A, 0x6B => {},
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0x61 => {},
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0x6C => apu.ch2.setNr23(value),
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0x62 => apu.ch1.setNr11(value),
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0x6D => apu.ch2.setNr24(&apu.fs, value),
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0x63 => apu.ch1.setNr12(value),
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0x6E, 0x6F => {},
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0x64 => apu.ch1.setNr13(value),
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0x65 => apu.ch1.setNr14(&apu.fs, value),
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0x66, 0x67 => {},
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0x70 => apu.ch3.setSound3CntL(value), // NR30
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0x68 => apu.ch2.setNr21(value),
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0x71 => {},
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0x69 => apu.ch2.setNr22(value),
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0x72 => apu.ch3.setNr31(value),
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0x6A, 0x6B => {},
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0x73 => apu.ch3.vol.raw = value, // NR32
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0x6C => apu.ch2.setNr23(value),
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0x74 => apu.ch3.setNr33(value),
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0x6D => apu.ch2.setNr24(&apu.fs, value),
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0x75 => apu.ch3.setNr34(&apu.fs, value),
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0x6E, 0x6F => {},
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0x76, 0x77 => {},
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0x78 => apu.ch4.setNr41(value),
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0x70 => apu.ch3.setSound3CntL(value), // NR30
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0x79 => apu.ch4.setNr42(value),
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0x71 => {},
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0x7A, 0x7B => {},
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0x72 => apu.ch3.setNr31(value),
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0x7C => apu.ch4.poly.raw = value, // NR 43
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0x73 => apu.ch3.vol.raw = value, // NR32
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0x7D => apu.ch4.setNr44(&apu.fs, value),
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0x74 => apu.ch3.setNr33(value),
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0x7E, 0x7F => {},
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0x75 => apu.ch3.setNr34(&apu.fs, value),
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0x76, 0x77 => {},
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0x80, 0x81 => apu.setSoundCntL(setHalf(u16, apu.psg_cnt.raw, byte_addr, value)),
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0x78 => apu.ch4.setNr41(value),
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0x82, 0x83 => apu.setSoundCntH(setHalf(u16, apu.dma_cnt.raw, byte_addr, value)),
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0x79 => apu.ch4.setNr42(value),
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
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0x7A, 0x7B => {},
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0x85 => {},
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0x7C => apu.ch4.poly.raw = value, // NR 43
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0x86, 0x87 => {},
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0x7D => apu.ch4.setNr44(&apu.fs, value),
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0x88, 0x89 => apu.bias.raw = setHalf(u16, apu.bias.raw, byte_addr, value), // SOUNDBIAS
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0x7E, 0x7F => {},
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0x8A...0x8F => {},
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0x90...0x9F => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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0x80, 0x81 => apu.setSoundCntL(setHalf(u16, apu.psg_cnt.raw, byte_addr, value)),
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0xA0...0xA3 => log.err("Tried to write 0x{X:0>2}{} to FIFO_A", .{ value, T }),
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0x82, 0x83 => apu.setSoundCntH(setHalf(u16, apu.dma_cnt.raw, byte_addr, value)),
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0xA4...0xA7 => log.err("Tried to write 0x{X:0>2}{} to FIFO_B", .{ value, T }),
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0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
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0x85 => {},
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0x86, 0x87 => {},
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0x88, 0x89 => apu.bias.raw = setHalf(u16, apu.bias.raw, byte_addr, value), // SOUNDBIAS
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0x8A...0x8F => {},
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0x90...0x9F => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
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0xA0...0xA3 => log.err("Tried to write 0x{X:0>2}{} to FIFO_A", .{ value, T }),
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0xA4...0xA7 => log.err("Tried to write 0x{X:0>2}{} to FIFO_B", .{ value, T }),
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else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
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}
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},
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},
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else => @compileError("APU: Unsupported write width"),
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else => @compileError("APU: Unsupported write width"),
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}
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}
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@ -275,15 +290,20 @@ pub const Apu = struct {
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}
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}
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fn reset(self: *Self) void {
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fn reset(self: *Self) void {
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// All PSG Registers between 0x0400_0060..0x0400_0081 are zeroed
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// 0x0400_0082 and 0x0400_0088 retain their values
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self.ch1.reset();
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self.ch1.reset();
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self.ch2.reset();
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self.ch2.reset();
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self.ch3.reset();
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self.ch3.reset();
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self.ch4.reset();
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self.ch4.reset();
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// GBATEK says 4000060h..4000081h I take this to mean inclusive
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self.psg_cnt.raw = 0x0000;
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}
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}
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/// SOUNDCNT
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/// SOUNDCNT
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fn setSoundCnt(self: *Self, value: u32) void {
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fn setSoundCnt(self: *Self, value: u32) void {
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self.setSoundCntL(@truncate(u16, value));
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if (self.cnt.apu_enable.read()) self.setSoundCntL(@truncate(u16, value));
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self.setSoundCntH(@truncate(u16, value >> 16));
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self.setSoundCntH(@truncate(u16, value >> 16));
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}
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}
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@ -322,11 +342,14 @@ pub const Apu = struct {
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self.fs.step = 0; // Reset Frame Sequencer
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self.fs.step = 0; // Reset Frame Sequencer
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// Reset Square Wave Offsets
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// Reset Square Wave Offsets
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self.ch1.square.pos = 0;
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self.ch1.square.reset();
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self.ch2.square.pos = 0;
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self.ch2.square.reset();
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// Reset Wave Device Offsets
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// Reset Wave
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self.ch3.wave_dev.offset = 0;
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self.ch3.wave_dev.reset();
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// Rest Noise
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self.ch4.lfsr.reset();
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} else {
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} else {
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self.reset();
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self.reset();
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}
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}
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@ -395,8 +418,8 @@ pub const Apu = struct {
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right += if (self.dma_cnt.chB_right.read()) chB_sample else 0;
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right += if (self.dma_cnt.chB_right.read()) chB_sample else 0;
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// Add SOUNDBIAS
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// Add SOUNDBIAS
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// FIXME: Is SOUNDBIAS 9-bit or 10-bit?
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// FIXME: SOUNDBIAS is 10-bit but The waveform is centered around 0 if I treat it as 11-bit
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const bias = @as(i16, self.bias.level.read()) << 1;
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const bias = @as(i16, self.bias.level.read()) << 2;
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left += bias;
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left += bias;
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right += bias;
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right += bias;
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@ -49,10 +49,13 @@ pub fn init(sched: *Scheduler) Self {
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}
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}
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pub fn reset(self: *Self) void {
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pub fn reset(self: *Self) void {
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self.len = 0;
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self.len = 0; // NR41
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self.envelope.raw = 0;
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self.envelope.raw = 0; // NR42
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self.poly.raw = 0;
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self.poly.raw = 0; // NR43
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self.cnt.raw = 0;
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self.cnt.raw = 0; // NR44
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self.len_dev.reset();
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self.env_dev.reset();
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self.sample = 0;
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self.sample = 0;
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self.enabled = false;
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self.enabled = false;
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@ -43,9 +43,12 @@ pub fn init(sched: *Scheduler) Self {
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}
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}
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pub fn reset(self: *Self) void {
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pub fn reset(self: *Self) void {
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self.duty.raw = 0;
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self.duty.raw = 0; // NR21
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self.envelope.raw = 0;
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self.envelope.raw = 0; // NR22
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self.freq.raw = 0;
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self.freq.raw = 0; // NR32, NR24
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self.len_dev.reset();
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self.env_dev.reset();
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self.sample = 0;
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self.sample = 0;
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self.enabled = false;
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self.enabled = false;
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@ -50,12 +50,14 @@ pub fn init(sched: *Scheduler) Self {
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}
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}
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pub fn reset(self: *Self) void {
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pub fn reset(self: *Self) void {
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self.sweep.raw = 0;
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self.sweep.raw = 0; // NR10
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self.sweep_dev.calc_performed = false;
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self.duty.raw = 0; // NR11
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self.envelope.raw = 0; // NR12
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self.freq.raw = 0; // NR13, NR14
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self.duty.raw = 0;
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self.len_dev.reset();
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self.envelope.raw = 0;
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self.sweep_dev.reset();
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self.freq.raw = 0;
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self.env_dev.reset();
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self.sample = 0;
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self.sample = 0;
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self.enabled = false;
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self.enabled = false;
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@ -42,10 +42,13 @@ pub fn init(sched: *Scheduler) Self {
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}
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}
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pub fn reset(self: *Self) void {
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pub fn reset(self: *Self) void {
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self.select.raw = 0;
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self.select.raw = 0; // NR30
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self.length = 0;
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self.length = 0; // NR31
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self.vol.raw = 0;
|
self.vol.raw = 0; // NR32
|
||||||
self.freq.raw = 0;
|
self.freq.raw = 0; // NR33, NR34
|
||||||
|
|
||||||
|
self.len_dev.reset();
|
||||||
|
self.wave_dev.reset();
|
||||||
|
|
||||||
self.sample = 0;
|
self.sample = 0;
|
||||||
self.enabled = false;
|
self.enabled = false;
|
||||||
|
|
|
@ -11,6 +11,11 @@ pub fn create() Self {
|
||||||
return .{ .timer = 0, .vol = 0 };
|
return .{ .timer = 0, .vol = 0 };
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub fn reset(self: *Self) void {
|
||||||
|
self.timer = 0;
|
||||||
|
self.vol = 0;
|
||||||
|
}
|
||||||
|
|
||||||
pub fn tick(self: *Self, nrx2: io.Envelope) void {
|
pub fn tick(self: *Self, nrx2: io.Envelope) void {
|
||||||
if (nrx2.period.read() != 0) {
|
if (nrx2.period.read() != 0) {
|
||||||
if (self.timer != 0) self.timer -= 1;
|
if (self.timer != 0) self.timer -= 1;
|
||||||
|
|
|
@ -6,6 +6,10 @@ pub fn create() Self {
|
||||||
return .{ .timer = 0 };
|
return .{ .timer = 0 };
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub fn reset(self: *Self) void {
|
||||||
|
self.timer = 0;
|
||||||
|
}
|
||||||
|
|
||||||
pub fn tick(self: *Self, enabled: bool, ch_enable: *bool) void {
|
pub fn tick(self: *Self, enabled: bool, ch_enable: *bool) void {
|
||||||
if (enabled) {
|
if (enabled) {
|
||||||
if (self.timer == 0) return;
|
if (self.timer == 0) return;
|
||||||
|
|
|
@ -18,6 +18,13 @@ pub fn create() Self {
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub fn reset(self: *Self) void {
|
||||||
|
self.timer = 0;
|
||||||
|
self.enabled = false;
|
||||||
|
self.shadow = 0;
|
||||||
|
self.calc_performed = false;
|
||||||
|
}
|
||||||
|
|
||||||
pub fn tick(self: *Self, ch1: *ToneSweep) void {
|
pub fn tick(self: *Self, ch1: *ToneSweep) void {
|
||||||
if (self.timer != 0) self.timer -= 1;
|
if (self.timer != 0) self.timer -= 1;
|
||||||
|
|
||||||
|
|
|
@ -19,6 +19,11 @@ pub fn create(sched: *Scheduler) Self {
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub fn reset(self: *Self) void {
|
||||||
|
self.shift = 0;
|
||||||
|
self.timer = 0;
|
||||||
|
}
|
||||||
|
|
||||||
pub fn sample(self: *const Self) i8 {
|
pub fn sample(self: *const Self) i8 {
|
||||||
return if ((~self.shift & 1) == 1) 1 else -1;
|
return if ((~self.shift & 1) == 1) 1 else -1;
|
||||||
}
|
}
|
||||||
|
|
|
@ -20,6 +20,11 @@ pub fn init(sched: *Scheduler) Self {
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub fn reset(self: *Self) void {
|
||||||
|
self.timer = 0;
|
||||||
|
self.pos = 0;
|
||||||
|
}
|
||||||
|
|
||||||
/// Scheduler Event Handler for Square Synth Timer Expire
|
/// Scheduler Event Handler for Square Synth Timer Expire
|
||||||
pub fn onSquareTimerExpire(self: *Self, comptime T: type, nrx34: io.Frequency, late: u64) void {
|
pub fn onSquareTimerExpire(self: *Self, comptime T: type, nrx34: io.Frequency, late: u64) void {
|
||||||
comptime std.debug.assert(T == ToneSweep or T == Tone);
|
comptime std.debug.assert(T == ToneSweep or T == Tone);
|
||||||
|
|
|
@ -38,6 +38,13 @@ pub fn init(sched: *Scheduler) Self {
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub fn reset(self: *Self) void {
|
||||||
|
self.timer = 0;
|
||||||
|
self.offset = 0;
|
||||||
|
|
||||||
|
// sample buffer isn't reset because it's outside of the range of what NR52{7}'s effects
|
||||||
|
}
|
||||||
|
|
||||||
/// Reload internal Wave Timer
|
/// Reload internal Wave Timer
|
||||||
pub fn reload(self: *Self, value: u11) void {
|
pub fn reload(self: *Self, value: u11) void {
|
||||||
self.sched.removeScheduledEvent(.{ .ApuChannel = 2 });
|
self.sched.removeScheduledEvent(.{ .ApuChannel = 2 });
|
||||||
|
|
Loading…
Reference in New Issue