feat(cpu): properly implement STR STRH and STRB

2022-01-03 17:48:43 -06:00
parent dee0e113d8
commit 44d52d8137
2 changed files with 4 additions and 15 deletions
--- a/src/cpu/half_signed_data_transfer.zig
+++ b/src/cpu/half_signed_data_transfer.zig
@@ -51,10 +51,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
            } else {
                if (opcode >> 5 & 0x01 == 0x01) {
                    // STRH
-                    const src = @truncate(u16, cpu.r[rd]);
-
-                    bus.write16(address + 2, src);
-                    bus.write16(address, src);
+                    bus.write16(address, @truncate(u16, cpu.r[rd]));
                } else {
                    std.debug.panic("[CPU] TODO: Figure out if this is also SWP", .{});
                }