style: code cleanup
This commit is contained in:
parent
85d4690c56
commit
3cf7c83269
|
@ -2,8 +2,8 @@ const Bus = @import("../../Bus.zig");
|
||||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||||
|
|
||||||
const rotateRight = @import("../barrel_shifter.zig").rotateRight;
|
const exec = @import("../barrel_shifter.zig").exec;
|
||||||
const execute = @import("../barrel_shifter.zig").execute;
|
const ror = @import("../barrel_shifter.zig").ror;
|
||||||
|
|
||||||
pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) InstrFn {
|
pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) InstrFn {
|
||||||
return struct {
|
return struct {
|
||||||
|
@ -18,7 +18,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
|
||||||
const op1 = cpu.r[rn];
|
const op1 = cpu.r[rn];
|
||||||
|
|
||||||
const amount = @truncate(u8, (opcode >> 8 & 0xF) << 1);
|
const amount = @truncate(u8, (opcode >> 8 & 0xF) << 1);
|
||||||
const op2 = if (I) rotateRight(S, &cpu.cpsr, opcode & 0xFF, amount) else execute(S, cpu, opcode);
|
const op2 = if (I) ror(S, &cpu.cpsr, opcode & 0xFF, amount) else exec(S, cpu, opcode);
|
||||||
|
|
||||||
// Undo special condition from above
|
// Undo special condition from above
|
||||||
if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
|
if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
|
||||||
|
@ -146,7 +146,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
|
||||||
} else {
|
} else {
|
||||||
// TST, TEQ specific
|
// TST, TEQ specific
|
||||||
// Barrel Shifter should always calc CPSR C in TST
|
// Barrel Shifter should always calc CPSR C in TST
|
||||||
if (!S) _ = execute(true, cpu, opcode);
|
if (!S) _ = exec(true, cpu, opcode);
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
}
|
}
|
||||||
|
|
|
@ -17,7 +17,7 @@ pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool,
|
||||||
// rn is r15 and L is not set, the PC is 12 ahead
|
// rn is r15 and L is not set, the PC is 12 ahead
|
||||||
const base = cpu.r[rn] + if (!L and rn == 0xF) 4 else @as(u32, 0);
|
const base = cpu.r[rn] + if (!L and rn == 0xF) 4 else @as(u32, 0);
|
||||||
|
|
||||||
const offset = if (I) shifter.immShift(false, cpu, opcode) else opcode & 0xFFF;
|
const offset = if (I) shifter.immediate(false, cpu, opcode) else opcode & 0xFFF;
|
||||||
|
|
||||||
const modified_base = if (U) base +% offset else base -% offset;
|
const modified_base = if (U) base +% offset else base -% offset;
|
||||||
var address = if (P) modified_base else base;
|
var address = if (P) modified_base else base;
|
||||||
|
|
|
@ -5,31 +5,31 @@ const CPSR = @import("../cpu.zig").PSR;
|
||||||
|
|
||||||
const rotr = @import("../../util.zig").rotr;
|
const rotr = @import("../../util.zig").rotr;
|
||||||
|
|
||||||
pub fn execute(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
||||||
var result: u32 = undefined;
|
var result: u32 = undefined;
|
||||||
if (opcode >> 4 & 1 == 1) {
|
if (opcode >> 4 & 1 == 1) {
|
||||||
result = registerShift(S, cpu, opcode);
|
result = register(S, cpu, opcode);
|
||||||
} else {
|
} else {
|
||||||
result = immShift(S, cpu, opcode);
|
result = immediate(S, cpu, opcode);
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
fn registerShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
fn register(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
||||||
const rs_idx = opcode >> 8 & 0xF;
|
const rs_idx = opcode >> 8 & 0xF;
|
||||||
const rm = cpu.r[opcode & 0xF];
|
const rm = cpu.r[opcode & 0xF];
|
||||||
const rs = @truncate(u8, cpu.r[rs_idx]);
|
const rs = @truncate(u8, cpu.r[rs_idx]);
|
||||||
|
|
||||||
return switch (@truncate(u2, opcode >> 5)) {
|
return switch (@truncate(u2, opcode >> 5)) {
|
||||||
0b00 => logicalLeft(S, &cpu.cpsr, rm, rs),
|
0b00 => lsl(S, &cpu.cpsr, rm, rs),
|
||||||
0b01 => logicalRight(S, &cpu.cpsr, rm, rs),
|
0b01 => lsr(S, &cpu.cpsr, rm, rs),
|
||||||
0b10 => arithmeticRight(S, &cpu.cpsr, rm, rs),
|
0b10 => asr(S, &cpu.cpsr, rm, rs),
|
||||||
0b11 => rotateRight(S, &cpu.cpsr, rm, rs),
|
0b11 => ror(S, &cpu.cpsr, rm, rs),
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn immShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
pub fn immediate(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
||||||
const amount = @truncate(u8, opcode >> 7 & 0x1F);
|
const amount = @truncate(u8, opcode >> 7 & 0x1F);
|
||||||
const rm = cpu.r[opcode & 0xF];
|
const rm = cpu.r[opcode & 0xF];
|
||||||
|
|
||||||
|
@ -60,17 +60,17 @@ pub fn immShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
switch (@truncate(u2, opcode >> 5)) {
|
switch (@truncate(u2, opcode >> 5)) {
|
||||||
0b00 => result = logicalLeft(S, &cpu.cpsr, rm, amount),
|
0b00 => result = lsl(S, &cpu.cpsr, rm, amount),
|
||||||
0b01 => result = logicalRight(S, &cpu.cpsr, rm, amount),
|
0b01 => result = lsr(S, &cpu.cpsr, rm, amount),
|
||||||
0b10 => result = arithmeticRight(S, &cpu.cpsr, rm, amount),
|
0b10 => result = asr(S, &cpu.cpsr, rm, amount),
|
||||||
0b11 => result = rotateRight(S, &cpu.cpsr, rm, amount),
|
0b11 => result = ror(S, &cpu.cpsr, rm, amount),
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn logicalLeft(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
pub fn lsl(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
||||||
const amount = @truncate(u5, total_amount);
|
const amount = @truncate(u5, total_amount);
|
||||||
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
||||||
|
|
||||||
|
@ -97,7 +97,7 @@ pub fn logicalLeft(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn logicalRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
|
pub fn lsr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
|
||||||
const amount = @truncate(u5, total_amount);
|
const amount = @truncate(u5, total_amount);
|
||||||
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
||||||
|
|
||||||
|
@ -121,7 +121,7 @@ pub fn logicalRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn arithmeticRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
pub fn asr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
||||||
const amount = @truncate(u5, total_amount);
|
const amount = @truncate(u5, total_amount);
|
||||||
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
||||||
|
|
||||||
|
@ -138,7 +138,7 @@ pub fn arithmeticRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8)
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn rotateRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
pub fn ror(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
||||||
const result = rotr(u32, rm, total_amount);
|
const result = rotr(u32, rm, total_amount);
|
||||||
|
|
||||||
if (S and total_amount != 0) {
|
if (S and total_amount != 0) {
|
||||||
|
|
|
@ -5,10 +5,10 @@ const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||||
const adc = @import("../arm/data_processing.zig").adc;
|
const adc = @import("../arm/data_processing.zig").adc;
|
||||||
const sbc = @import("../arm/data_processing.zig").sbc;
|
const sbc = @import("../arm/data_processing.zig").sbc;
|
||||||
|
|
||||||
const lsl = @import("../barrel_shifter.zig").logicalLeft;
|
const lsl = @import("../barrel_shifter.zig").lsl;
|
||||||
const lsr = @import("../barrel_shifter.zig").logicalRight;
|
const lsr = @import("../barrel_shifter.zig").lsr;
|
||||||
const asr = @import("../barrel_shifter.zig").arithmeticRight;
|
const asr = @import("../barrel_shifter.zig").asr;
|
||||||
const ror = @import("../barrel_shifter.zig").rotateRight;
|
const ror = @import("../barrel_shifter.zig").ror;
|
||||||
|
|
||||||
pub fn fmt4(comptime op: u4) InstrFn {
|
pub fn fmt4(comptime op: u4) InstrFn {
|
||||||
return struct {
|
return struct {
|
||||||
|
|
|
@ -6,9 +6,9 @@ const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||||
|
|
||||||
const add = @import("../arm/data_processing.zig").add;
|
const add = @import("../arm/data_processing.zig").add;
|
||||||
|
|
||||||
const lsl = @import("../barrel_shifter.zig").logicalLeft;
|
const lsl = @import("../barrel_shifter.zig").lsl;
|
||||||
const lsr = @import("../barrel_shifter.zig").logicalRight;
|
const lsr = @import("../barrel_shifter.zig").lsr;
|
||||||
const asr = @import("../barrel_shifter.zig").arithmeticRight;
|
const asr = @import("../barrel_shifter.zig").asr;
|
||||||
|
|
||||||
pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
|
pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
|
||||||
return struct {
|
return struct {
|
||||||
|
|
Loading…
Reference in New Issue