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feat: implement dedicated Barrel Shifter SHL and SHR

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-01-05 13:58:11 -05:00
parent 7473ffedc7
commit 28a70d0112
6 changed files with 126 additions and 38 deletions
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45
src/cpu/data_processing.zig
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@@ -1,9 +1,10 @@
const std = @import("std");
const processor = @import("../cpu.zig");
const arm = @import("../cpu.zig");
const BarrelShifter = @import("barrel_shifter.zig");
const Bus = @import("../bus.zig").Bus;
const Arm7tdmi = processor.Arm7tdmi;
const InstrFn = processor.InstrFn;
const Arm7tdmi = arm.Arm7tdmi;
const InstrFn = arm.InstrFn;
pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
return struct {
@@ -15,7 +16,7 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
if (I) {
op2 = std.math.rotr(u32, opcode & 0xFF, (opcode >> 8 & 0xF) << 1);
} else {
op2 = registerOp2(cpu, opcode);
op2 = BarrelShifter.exec(cpu, opcode);
}
switch (instrKind) {
@@ -45,7 +46,7 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
cpu.cpsr.n.write(result >> 31 & 1 == 1);
cpu.cpsr.z.write(result == 0);
cpu.cpsr.c.write(op2 <= op1_val);
cpu.cpsr.v.write(v_ctx and (result >> 31 & 1== 1));
cpu.cpsr.v.write(v_ctx and (result >> 31 & 1 == 1));
},
else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
}
@@ -53,22 +54,22 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
}.dataProcessing;
}
fn registerOp2(cpu: *const Arm7tdmi, opcode: u32) u32 {
var amount: u32 = undefined;
if (opcode >> 4 & 0x01 == 0x01) {
amount = cpu.r[opcode >> 8 & 0xF] & 0xFF;
} else {
amount = opcode >> 7 & 0x1F;
}
// fn registerOp2(cpu: *const Arm7tdmi, opcode: u32) u32 {
// var amount: u32 = undefined;
// if (opcode >> 4 & 0x01 == 0x01) {
// amount = cpu.r[opcode >> 8 & 0xF] & 0xFF;
// } else {
// amount = opcode >> 7 & 0x1F;
// }
const rm = opcode & 0xF;
const r_val = cpu.r[rm];
// const rm = opcode & 0xF;
// const r_val = cpu.r[rm];
return switch (opcode >> 5 & 0x03) {
0b00 => r_val << @truncate(u5, amount),
0b01 => r_val >> @truncate(u5, amount),
0b10 => @bitCast(u32, @bitCast(i32, r_val) >> @truncate(u5, amount)),
0b11 => std.math.rotr(u32, r_val, amount),
else => unreachable,
};
}
// return switch (opcode >> 5 & 0x03) {
// 0b00 => r_val << @truncate(u5, amount),
// 0b01 => r_val >> @truncate(u5, amount),
// 0b10 => @bitCast(u32, @bitCast(i32, r_val) >> @truncate(u5, amount)),
// 0b11 => std.math.rotr(u32, r_val, amount),
// else => unreachable,
// };
// }